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foss-eda-tools
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shuttle
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sky130
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mpw-002
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slot-026
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ad56cf702fe6dfe37433d6f771e38b03fa1100f5
commit
ad56cf702fe6dfe37433d6f771e38b03fa1100f5
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author
Tom <tom>
Fri Jun 18 19:03:31 2021 -0700
committer
Tom <tom>
Fri Jun 18 19:03:31 2021 -0700
tree
638fd7542ccacd117316a14b8eb3ebba7bfe3d4b
parent
e0f9816966b00d7d90481aa85aeb100f5ce22249
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diff
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Updating RTL to match wrapper
verilog/rtl/bgr_amp.v
[Copied from verilog/rtl/bgr.v -
diff
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verilog/rtl/bgr_top.v
[Renamed from verilog/rtl/bgr.v -
diff
]
verilog/rtl/ldo_top.v
[Copied from verilog/rtl/bgr.v -
diff
]
verilog/rtl/pswitch_top.v
[Copied from verilog/rtl/bgr.v -
diff
]
verilog/rtl/user_analog_project_wrapper.v
[
diff
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5 files changed
tree: 638fd7542ccacd117316a14b8eb3ebba7bfe3d4b
.github/
docs/
gds/
mag/
netgen/
openlane/
verilog/
xschem/
caravel
columbus
.gitmodules
info.yaml
LICENSE
Makefile
README.md
README.md
Caravel Analog User
:exclamation: Important Note
Please fill in your project documentation in this README.md file
:warning:
Use this sample project for analog user projects.
Refer to
README
for this sample project documentation.