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foss-eda-tools / third_party / shuttle / sky130 / mpw-002 / slot-023 / 36c4df1dabeccf484048920fd69857f05b3ddb5b
commit36c4df1dabeccf484048920fd69857f05b3ddb5b[log] [tgz]
authorAnmol Purty <62499408+an3ol@users.noreply.github.com>Mon May 03 17:58:19 2021 +0530
committerGitHub <noreply@github.com>Mon May 03 17:58:19 2021 +0530
tree7cd8a3f169fbbd3c8d4ae62b63e028c9a2b6e4d9
parent80fb38c8b838402a588bbfc7ea72c502d19bdca2 [diff]
Delete resistor30K.mag
1 file changed
tree: 7cd8a3f169fbbd3c8d4ae62b63e028c9a2b6e4d9
  1. def/
  2. docs/
  3. Documents/
  4. gds/
  5. Layout/
  6. lef/
  7. libs/
  8. mag/
  9. maglef/
  10. photo/
  11. Post_Layout_Simulations/
  12. Pre_Layout_Simulations/
  13. signoff/
  14. spi/
  15. info.yaml
  16. LICENSE
  17. Makefile
  18. NMOS120.mag
  19. nmos2metal.mag
  20. pmos_substrate.mag
  21. README.md
  22. resistor273K.mag
README.md

General Purpose Bandgap Reference Circuit - avsdbgp_3v3_sky130_v2

A Bandgap Reference is an analog circuit, which is used to provide a constant output reference voltage being independent of Temperature, Process and Supply voltage variations. The analog IP avsdbgp_3v3 is a General Purpose Bandgap Reference ciruit, which is designed using Sky130nm technology in this project.

For detailed information regarding the Bandgap Reference circuit click here. The Design specifications provided for avsdbgp_3v3 can be found here.

Table of Contents

  • Performance parameters Bandgap Reference IP

  • Circuit Implementation of Bandgap Reference IP

    • Block Diagram of Bandgap Reference IP
    • Schematic of Bandgap Reference IP

  • Downloading the files on your System

  • Pre-Layout Simulation of Bandgap Reference IP circuit using Ngspice

    • Ngspice
    • Pre-Layout Simulation plots of Bandgap Reference IP circuit
    • Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot
    • Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot
    • Temperature Coefficient of Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot
    • Voltage Coefficient of Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot
    • Start-Up Time of Vbgp @ RL = 100M ohms plot
    • On-Off-Current of Vbgp wrt Enable @ RL = 100M ohms plot

  • BGR Layout

    • Magic
    • Layout

  • Post-Layout Simulation of Bandgap Reference IP circuit using Ngspice

    • Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot
    • Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot
    • Temperature Coefficient of Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot
    • Voltage Coefficient of Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot
    • Start-Up Time of Vbgp @ RL = 100M ohms plot
    • On-Off-Current of Vbgp wrt Enable @ RL = 100M ohms plot

Performance parameters of Bandgap Reference IP

ParameterDescriptionMinTypeMaxUnitCondition
VBGPOutput reference voltage1.194901.197561.19764VoltT= -40 to 140C, VDD=3.3V
VBGPOutput reference voltage1.114001.197561.21933VoltVDD=2V to VDD=4V, T=27C
VDDSupply Voltage3.3VoltT=-40C to 125C
IDDSupply Current21.9636uAEN=1
IDDSupply Current24.4pAEN=0
RLLoad Resistance100MohmVDD=3.3V, T=27C

Circuit Implementation of Bandgap Reference IP

Block Diagram of Bandgap Reference IP

Block diagram

Schematic of Bandgap Reference IP

Schematic

Downloading the files on your System

The files from this repository can be downloaded and used by the following commands :-

sudo apt install -y git

git clone https://github.com/vsdip/avsdbgp_3v3_sky130_v2.git

Pre-Layout Simulation of Bandgap Reference IP circuit

The circuit implementation of Bandgap reference IP avsdbgp_3v3 is simulated using Ngspice to analyse its performance according to the Design Specifications provided.

Ngspice

sudo apt-get install -y ngspice

After successful installation, to invoke Ngspice type the following command on the terminal window.

ngspice <circuit file to be simulated>

Pre- Layout Simulation plots of Bandgap Reference IP circuit

To simulate the files for Pre- Layout simulations

cd avsdbgp_3v3_sky130_v2/Pre_Layout_Simulations/Circuits/

Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot

ngspice temp_avsdbgp_3v3.cir

Vbgp vs Temperature

Vbgp Vptat Vctat vs Temperature

Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot

ngspice vdd_variation_avsdbgp_3v3.cir

Voltage vs Vbgp

Temperature Coefficient of Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot

ngspice Temp_coeff_avsdbgp_3v3.cir

Temperature coefficient of Vbgp

Voltage Coefficient of Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot

ngspice voltage_coeff_avsdbgp_3v3.cir

Voltage coefficient of Vbgp

Start-Up Time of Vbgp @ RL = 100M ohms plot

ngspice Start_up_avsdbgp_3v3.cir

Start up circuit

On-Off-Current of Vbgp wrt Enable @ RL = 100M ohms plot

ngspice enable_current.cir

Enable

BGR Layout

Magic

The Layout for the circuit was done using Magic Layout editor tool. To observe the layout, install magic using the following commands :-

sudo wget "http://opencircuitdesign.com/magic/archive/magic-8.3.122.tgz"

tar -xvzf magic-8.3.122.tgz

cd magic-8.3.122

sudo ./configure

sudo make

sudo make install

Layout

After successful installation, type:-

cd avsdbgp_3v3_sky130_v2/Layout/

magic -T ../libs/sky130A.tech BGR.mag

Layout

Post-Layout Simulation plots of Bandgap Reference IP circuit

To simulate the files for Post-Layout simulations using ngspice :-

cd avsdbgp_3v3_sky130_v2/Post_Layout_Simulations/Circuits/

Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot

ngspice temp_avsdbgp_3v3.spice

Vbgp vs Temperature

Vbgp Vptat Vctat vs Temperature

Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot

ngspice vdd_variation_avsdbgp_3v3.spice

Voltage vs Vbgp

Temperature Coefficient of Vbgp v/s Temperature [ -40C - 140C] @ RL = 100M ohms plot

ngspice Temp_coeff_avsdbgp_3v3.spice

Temperature coefficient of Vbgp

Voltage Coefficient of Vbgp v/s VDD [ 2V - 4V] @ RL = 100M ohms plot

ngspice voltage_coeff_avsdbgp_3v3.spice

Voltage coefficient of Vbgp

Start-Up Time of Vbgp @ RL = 100M ohms plot

ngspice Start_up_avsdbgp_3v3.spice

Start up circuit

Author

Acknowledgements

  • Kunal Ghosh, Co-founder of VLSI System Design (VSD) Corp. Pvt. Ltd.
  • Tim Edwards, Senior Vice President of Analog and Design at efabless corporation.
  • Sheryl Corina Serrao, Undergraduate Student, Mumbai University.

Contact Information