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foss-eda-tools/third_party/shuttle/sky130/mpw-002/slot-023/1f1d11d2e2dbbc4c4d326d3e6b7ecb4cca584e22^!/.
commit
1f1d11d2e2dbbc4c4d326d3e6b7ecb4cca584e22
[log]
author
an3ol <62499408+an3ol@users.noreply.github.com>
Tue Mar 23 18:29:23 2021 +0530
committer
GitHub <noreply@github.com>
Tue Mar 23 18:29:23 2021 +0530
tree
0ff85819781585f798df447a1a2ea90565ce4569
parent
c858a2cb311139c5a192a1a336579db786bc61cb [diff]
Add files via upload
diff --git a/Pre_Layout_Simulations/Circuits/Start_up_avsdbgp_3v3.cir b/Pre_Layout_Simulations/Circuits/Start_up_avsdbgp_3v3.cir
new file mode 100644
index 0000000..3213bb1
--- /dev/null
+++ b/Pre_Layout_Simulations/Circuits/Start_up_avsdbgp_3v3.cir

@@ -0,0 +1,49 @@
+* General Purpose Bandgap Reference circuit avsdbgp_3v3- Technology: sky130
+
+.options savecurrents
+.lib "../../libs/models/sky130.lib.spice" tt
+.include "../../libs/models/sky130_fd_pr__model__pnp.model.spice"
+
+*BGR circuit
+
+XM1 A C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM2 C C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM3 H C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM4 A A B GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM5 C A D GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+X6 GND GND I GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+X7 GND GND E GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=8
+X8 GND GND F GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+
+XM9 C G GND GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM10 G A GND GND sky130_fd_pr__nfet_g5v0d10v5 l=1 w=20
+
+*Enable circuit
+
+XM11 B En Vx GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM12 D En Vy GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM13 H En Vz GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM14 K En G GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+R1 J E 30K
+R2 F VBGP 273K
+R3 GND VBGP 100MEG
+R4 VPWR Vw 200K
+
+Vsrc Vx I DC 0V
+Vsrc1 Vy J DC 0V
+Vsrc2 Vz VBGP DC 0V
+Vsrc3 Vw K DC 0V
+
+VD En GND DC 3.3V
+
+VDDA VPWR GND pulse(0V 3.3V 100u 100u 0 0.5 1 0)
+
+
+.tran 0.1u 500u
+.control
+run
+plot v(VPWR) v(vbgp)
+.endc
+.end

diff --git a/Pre_Layout_Simulations/Circuits/Temp_coeff_avsdbgp_3v3.cir b/Pre_Layout_Simulations/Circuits/Temp_coeff_avsdbgp_3v3.cir
new file mode 100644
index 0000000..94d1b7e
--- /dev/null
+++ b/Pre_Layout_Simulations/Circuits/Temp_coeff_avsdbgp_3v3.cir

@@ -0,0 +1,53 @@
+* General Purpose Bandgap Reference circuit avsdbgp_3v3- Technology: sky130
+
+.options savecurrents
+.lib "../../libs/models/sky130.lib.spice" tt
+.include "../../libs/models/sky130_fd_pr__model__pnp.model.spice"
+
+*BGR circuit
+
+XM1 A C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM2 C C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM3 H C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM4 A A B GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM5 C A D GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+X6 GND GND I GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+X7 GND GND E GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=8
+X8 GND GND F GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+
+*Start-up circuit
+
+XM9 C G GND GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM10 G A GND GND sky130_fd_pr__nfet_g5v0d10v5 l=1 w=20
+
+*Enable circuit
+
+XM11 B En Vx GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM12 D En Vy GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM13 H En Vz GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM14 K En G GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+R1 J E 30K
+R2 F VBGP 273K
+R3 GND VBGP 100MEG
+R4 VPWR Vw 200K
+
+Vsrc Vx I DC 0V
+Vsrc1 Vy J DC 0V
+Vsrc2 Vz VBGP DC 0V
+Vsrc3 Vw K DC 0V
+
+VDDA VPWR GND DC 3.3V
+VD En GND DC 3.3V
+
+.dc temp -40 140 0.1
+
+.control
+run
+plot deriv(v(VBGP))/1.19
+
+.endc
+
+.end
+

diff --git a/Pre_Layout_Simulations/Circuits/bsim4v5.out b/Pre_Layout_Simulations/Circuits/bsim4v5.out
new file mode 100644
index 0000000..238892d
--- /dev/null
+++ b/Pre_Layout_Simulations/Circuits/bsim4v5.out

@@ -0,0 +1,5 @@
+BSIM4v5: Berkeley Short Channel IGFET Model-4
+Developed by Xuemei (Jane) Xi, Mohan Dunga, Prof. Ali Niknejad and Prof. Chenming Hu in 2003.
+
+++++++++++ BSIM4v5 PARAMETER CHECKING BELOW ++++++++++
+Model = xm1:sky130_fd_pr__pfet_g5v0d10v5__model.2

diff --git a/Pre_Layout_Simulations/Circuits/enable_current.cir b/Pre_Layout_Simulations/Circuits/enable_current.cir
new file mode 100644
index 0000000..c290c2e
--- /dev/null
+++ b/Pre_Layout_Simulations/Circuits/enable_current.cir

@@ -0,0 +1,52 @@
+* General Purpose Bandgap Reference circuit avsdbgp_3v3- Technology: sky130
+
+.options savecurrents
+.lib "../../libs/models/sky130.lib.spice" tt
+.include "../../libs/models/sky130_fd_pr__model__pnp.model.spice"
+
+*BGR circuit
+
+XM1 A C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM2 C C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM3 H C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM4 A A B GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM5 C A D GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+X6 GND GND I GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+X7 GND GND E GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=8
+X8 GND GND F GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+
+*Start-up circuit
+
+XM9 C G GND GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM10 G A GND GND sky130_fd_pr__nfet_g5v0d10v5 l=1 w=20
+
+*Enable circuit
+
+XM11 B En Vx GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM12 D En Vy GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM13 H En Vz GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM14 K En G GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+R1 J E 30K
+R2 F VBGP 273K
+R3 GND VBGP 100MEG
+R4 VPWR Vw 200K
+
+Vsrc Vx I DC 0V
+Vsrc1 Vy J DC 0V
+Vsrc2 Vz VBGP DC 0V
+Vsrc3 Vw K DC 0V
+
+VDDA VPWR GND DC 3.3V
+Vd En GND pulse(0V 3.3V 100u 0 0 0.5 1)
+
+
+.tran 1u 200u
+.control
+run
+plot V(En)
+plot -I(Vdda)
+.endc
+.end
+

diff --git a/Pre_Layout_Simulations/Circuits/temp_avsdbgp_3v3.cir b/Pre_Layout_Simulations/Circuits/temp_avsdbgp_3v3.cir
new file mode 100644
index 0000000..8eaf90d
--- /dev/null
+++ b/Pre_Layout_Simulations/Circuits/temp_avsdbgp_3v3.cir

@@ -0,0 +1,52 @@
+* General Purpose Bandgap Reference circuit avsdbgp_3v3- Technology: sky130
+
+.options savecurrents
+.lib "../../libs/models/sky130.lib.spice" tt
+.include "../../libs/models/sky130_fd_pr__model__pnp.model.spice"
+
+*BGR circuit
+
+XM1 A C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM2 C C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM3 H C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM4 A A B GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM5 C A D GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+X6 GND GND I GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+X7 GND GND E GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=8
+X8 GND GND F GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+
+*Start-up circuit
+
+XM9 C G GND GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM10 G A GND GND sky130_fd_pr__nfet_g5v0d10v5 l=1 w=20
+
+*Enable circuit
+
+XM11 B En Vx GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM12 D En Vy GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM13 H En Vz GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM14 K En G GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+R1 J E 30K
+R2 F VBGP 273K
+R3 GND VBGP 100MEG
+R4 VPWR Vw 200K
+
+Vsrc Vx I DC 0V
+Vsrc1 Vy J DC 0V
+Vsrc2 Vz VBGP DC 0V
+Vsrc3 Vw K DC 0V
+
+VDDA VPWR GND DC 3.3V
+VD En GND DC 3.3V
+
+.dc temp -40 140 0.1
+
+.control
+run
+plot v(vbgp) v(f) v(vbgp,f)
+plot v(VBGP)
+.endc
+
+.end

diff --git a/Pre_Layout_Simulations/Circuits/vdd_variation_avsdbgp_3v3.cir b/Pre_Layout_Simulations/Circuits/vdd_variation_avsdbgp_3v3.cir
new file mode 100644
index 0000000..d718586
--- /dev/null
+++ b/Pre_Layout_Simulations/Circuits/vdd_variation_avsdbgp_3v3.cir

@@ -0,0 +1,51 @@
+* General Purpose Bandgap Reference circuit avsdbgp_3v3- Technology: sky130
+
+.options savecurrents
+.lib "../../libs/models/sky130.lib.spice" tt
+.include "../../libs/models/sky130_fd_pr__model__pnp.model.spice"
+
+*BGR circuit
+
+XM1 A C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM2 C C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM3 H C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM4 A A B GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM5 C A D GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+X6 GND GND I GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+X7 GND GND E GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=8
+X8 GND GND F GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+
+*Start-up circuit
+
+XM9 C G GND GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM10 G A GND GND sky130_fd_pr__nfet_g5v0d10v5 l=1 w=20
+
+*Enable circuit
+
+XM11 B En Vx GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM12 D En Vy GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM13 H En Vz GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM14 K En G GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+R1 J E 30K
+R2 F VBGP 273K
+R3 GND VBGP 100MEG
+R4 VPWR Vw 200K
+
+Vsrc Vx I DC 0V
+Vsrc1 Vy J DC 0V
+Vsrc2 Vz VBGP DC 0V
+Vsrc3 Vw K DC 0V
+
+VDDA VPWR GND DC 3.3V
+VD En GND DC 3.3V
+
+.dc VDDA 2 4 0.1
+
+.control
+run
+plot v(VBGP)
+.endc
+
+.end

diff --git a/Pre_Layout_Simulations/Circuits/voltage_coeff_avsdbgp_3v3.cir b/Pre_Layout_Simulations/Circuits/voltage_coeff_avsdbgp_3v3.cir
new file mode 100644
index 0000000..c511091
--- /dev/null
+++ b/Pre_Layout_Simulations/Circuits/voltage_coeff_avsdbgp_3v3.cir

@@ -0,0 +1,51 @@
+* General Purpose Bandgap Reference circuit avsdbgp_3v3- Technology: sky130
+
+.options savecurrents
+.lib "../../libs/models/sky130.lib.spice" tt
+.include "../../libs/models/sky130_fd_pr__model__pnp.model.spice"
+
+*BGR circuit
+
+XM1 A C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM2 C C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM3 H C VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 l=5 w=20
+XM4 A A B GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM5 C A D GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+X6 GND GND I GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+X7 GND GND E GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=8
+X8 GND GND F GND sky130_fd_pr__pnp_05v5_W3p40L3p40 M=1
+
+*Start-up circuit
+
+XM9 C G GND GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM10 G A GND GND sky130_fd_pr__nfet_g5v0d10v5 l=1 w=20
+
+*Enable circuit
+
+XM11 B En Vx GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM12 D En Vy GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM13 H En Vz GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+XM14 K En G GND sky130_fd_pr__nfet_g5v0d10v5 l=5 w=20
+
+R1 J E 30K
+R2 F VBGP 273K
+R3 GND VBGP 100MEG
+R4 VPWR Vw 200K
+
+Vsrc Vx I DC 0V
+Vsrc1 Vy J DC 0V
+Vsrc2 Vz VBGP DC 0V
+Vsrc3 Vw K DC 0V
+
+VDDA VPWR GND DC 3.3V
+VD En GND DC 3.3V
+
+.dc VDDA 2 4 0.1
+
+.control
+run
+plot deriv(v(VBGP))
+.endc
+
+.end

diff --git a/Pre_Layout_Simulations/Results/Startup.png b/Pre_Layout_Simulations/Results/Startup.png
new file mode 100644
index 0000000..dd8c037
--- /dev/null
+++ b/Pre_Layout_Simulations/Results/Startup.png
Binary files differ

diff --git a/Pre_Layout_Simulations/Results/enable_current.png b/Pre_Layout_Simulations/Results/enable_current.png
new file mode 100644
index 0000000..5b824c3
--- /dev/null
+++ b/Pre_Layout_Simulations/Results/enable_current.png
Binary files differ

diff --git a/Pre_Layout_Simulations/Results/temp_all.png b/Pre_Layout_Simulations/Results/temp_all.png
new file mode 100644
index 0000000..3fdb038
--- /dev/null
+++ b/Pre_Layout_Simulations/Results/temp_all.png
Binary files differ

diff --git a/Pre_Layout_Simulations/Results/temp_coeff.png b/Pre_Layout_Simulations/Results/temp_coeff.png
new file mode 100644
index 0000000..098e358
--- /dev/null
+++ b/Pre_Layout_Simulations/Results/temp_coeff.png
Binary files differ

diff --git a/Pre_Layout_Simulations/Results/temp_var.png b/Pre_Layout_Simulations/Results/temp_var.png
new file mode 100644
index 0000000..0a9e4a2
--- /dev/null
+++ b/Pre_Layout_Simulations/Results/temp_var.png
Binary files differ

diff --git a/Pre_Layout_Simulations/Results/vdd_var.png b/Pre_Layout_Simulations/Results/vdd_var.png
new file mode 100644
index 0000000..d020238
--- /dev/null
+++ b/Pre_Layout_Simulations/Results/vdd_var.png
Binary files differ

diff --git a/Pre_Layout_Simulations/Results/vol_coeff.png b/Pre_Layout_Simulations/Results/vol_coeff.png
new file mode 100644
index 0000000..16a3e32
--- /dev/null
+++ b/Pre_Layout_Simulations/Results/vol_coeff.png
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