blob: c8cc1e3397c5af2d547d23cfccc9a1ee259c44e7 [file] [log] [blame]
---
project:
description: "Second version of SOFA eFPGA with Heterogeneous eFPGA with enhanced DSP features"
foundry: "SkyWater"
git_url: "https://github.com/lnis-uofu/SOFA-Plus-eFPGA.git"
organization: "lnis"
organization_url: "https://sites.google.com/site/pegaillardon/home"
owner: "Grant Brown"
process: "SKY130"
project_name: "Caravel"
project_id: "00000000"
tags:
- "Open MPW"
- "Test Harness"
- "SOFA"
- "eFPGA"
category: "eFPGA"
top_level_netlist: "verilog/gl/caravel.v"
user_level_netlist: "verilog/gl/user_project_wrapper.v"
version: "1.00"
cover_image: "https://raw.githubusercontent.com/lnis-uofu/OpenFPGA/master/docs/source/overview/figures/OpenFPGA_logo.png"