commit | fc2aa4814fe1baf54e2ec0f33220f7ea8b1452a5 | [log] [tgz] |
---|---|---|
author | Jeff DiCorpo <jeffdi@efabless.com> | Tue Jul 20 10:59:29 2021 +0000 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Tue Jul 20 10:59:29 2021 +0000 |
tree | d68a0c035e0892c969416eaa91ac7e81348f7910 | |
parent | d519ca6cb2222e691e235ad2353b1af625971fe2 [diff] |
tapeout.log
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.