commit | d519ca6cb2222e691e235ad2353b1af625971fe2 | [log] [tgz] |
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author | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 14:37:24 2021 -0700 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 14:37:24 2021 -0700 |
tree | d12ffc45b6c7ae7064cf0d43d2f20ecc1da57cbe | |
parent | 5a61fe838242f28c69320cab0a7a562007fcfaa0 [diff] |
updating ./signoff
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.