updated README
diff --git a/README.md b/README.md index 8fe3f0d..f6af6a9 100644 --- a/README.md +++ b/README.md
@@ -20,8 +20,7 @@ [](https://opensource.org/licenses/Apache-2.0) [](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml) [](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml) # Azadi RISC-V SoC -Azadi is an SoC with 32-bit RISC-V signal core extented version of [ibex](https://github.com/lowRISC/ibex) we named it as "buraq", it is a 3-stage pipeline core which implements the RV32IMF instruction set architecture, limited number of peripherals UART, SPI, GPIO, PWM and timer. -The parent repository of azadi-soc can be found [here](https://github.com/merledu/azadi). +Azadi is an SoC with a 32-bit RISC-V signal core extended version of [ibex](https://github.com/lowRISC/ibex) we named it "buraq", it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found [here](https://github.com/merledu/azadi). ## Azadi SoC DFFRAM: Flattened with user_project_wrapper 