updated files with SPDX header
diff --git a/README.md b/README.md
index 94e35a8..8fe3f0d 100644
--- a/README.md
+++ b/README.md
@@ -1,3 +1,20 @@
+ <!---
+ # SPDX-FileCopyrightText: 2020 Efabless Corporation
+ #
+ # Licensed under the Apache License, Version 2.0 (the "License");
+ # you may not use this file except in compliance with the License.
+ # You may obtain a copy of the License at
+ #
+ # http://www.apache.org/licenses/LICENSE-2.0
+ #
+ # Unless required by applicable law or agreed to in writing, software
+ # distributed under the License is distributed on an "AS IS" BASIS,
+ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ # See the License for the specific language governing permissions and
+ # limitations under the License.
+ #
+ # SPDX-License-Identifier: Apache-2.0
+ -->
# Caravel User Project
[](https://opensource.org/licenses/Apache-2.0) [](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml) [](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml)
diff --git a/verilog/rtl/azadi_soc_top_caravel.v b/verilog/rtl/azadi_soc_top_caravel.v
index cea49fb..4c44102 100644
--- a/verilog/rtl/azadi_soc_top_caravel.v
+++ b/verilog/rtl/azadi_soc_top_caravel.v
@@ -1,3 +1,19 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// SPDX-License-Identifier: Apache-2.0
+
// Designed by a Team at Micro Electronics Research Lab, Usman Institute of Technology.
// https://www.merledupk.org
`default_nettype wire
diff --git a/verilog/rtl/azadi_soc_top_dffram.v b/verilog/rtl/azadi_soc_top_dffram.v
index 75f507d..174a726 100644
--- a/verilog/rtl/azadi_soc_top_dffram.v
+++ b/verilog/rtl/azadi_soc_top_dffram.v
@@ -1,5 +1,23 @@
-/*azadi_soc_top_conv-v0.6*/
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// SPDX-License-Identifier: Apache-2.0
+
+// Designed by a Team at Micro Electronics Research Lab, Usman Institute of Technology.
+// https://www.merledupk.org
+/*azadi_soc_top_conv-v0.6*/
`default_nettype wire
module azadi_soc_top (
`ifdef USE_POWER_PINS
diff --git a/verilog/rtl/azadi_soc_top_dffram_2kb.v b/verilog/rtl/azadi_soc_top_dffram_2kb.v
index a834005..dac4a1b 100644
--- a/verilog/rtl/azadi_soc_top_dffram_2kb.v
+++ b/verilog/rtl/azadi_soc_top_dffram_2kb.v
@@ -1,5 +1,23 @@
-/*azadi_soc_top_conv-v0.6*/
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// SPDX-License-Identifier: Apache-2.0
+
+// Designed by a Team at Micro Electronics Research Lab, Usman Institute of Technology.
+// https://www.merledupk.org
+/*azadi_soc_top_conv-v0.6*/
`default_nettype wire
module azadi_soc_top (
`ifdef USE_POWER_PINS
diff --git a/verilog/rtl/azadi_soc_top_dffram_4kb.v b/verilog/rtl/azadi_soc_top_dffram_4kb.v
index e7c6c5b..075a6ed 100644
--- a/verilog/rtl/azadi_soc_top_dffram_4kb.v
+++ b/verilog/rtl/azadi_soc_top_dffram_4kb.v
@@ -1,5 +1,23 @@
-/*azadi_soc_top_conv-v0.6*/
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// SPDX-License-Identifier: Apache-2.0
+
+// Designed by a Team at Micro Electronics Research Lab, Usman Institute of Technology.
+// https://www.merledupk.org
+/*azadi_soc_top_conv-v0.6*/
`default_nettype wire
module azadi_soc_top (
`ifdef USE_POWER_PINS
diff --git a/verilog/rtl/azadi_soc_top_sram.v b/verilog/rtl/azadi_soc_top_sram.v
index beda406..641fa3f 100644
--- a/verilog/rtl/azadi_soc_top_sram.v
+++ b/verilog/rtl/azadi_soc_top_sram.v
@@ -1,5 +1,23 @@
-/*azadi_soc_top_conv-v0.6*/
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// SPDX-License-Identifier: Apache-2.0
+
+// Designed by a Team at Micro Electronics Research Lab, Usman Institute of Technology.
+// https://www.merledupk.org
+/*azadi_soc_top_conv-v0.6*/
`default_nettype wire
module azadi_soc_top (
`ifdef USE_POWER_PINS
