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foss-eda-tools
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third_party
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shuttle
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sky130
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mpw-002
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slot-016
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2c77be4674254cf7614277d621e161db76115c48
commit
2c77be4674254cf7614277d621e161db76115c48
[
log
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author
irem <iremnurcolak34@gmail.com>
Fri Jun 18 13:28:39 2021 +0300
committer
irem <iremnurcolak34@gmail.com>
Fri Jun 18 13:28:39 2021 +0300
tree
e0d70563a0507b4aab84414bcab3e1f5d80566e7
parent
f875a8e3fffc6f32f2f44217e5748f60f5037b21
[
diff
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clock frequency is made 50 MHz
verilog/rtl/user_proj_example.v
[
diff
]
1 file changed
tree: e0d70563a0507b4aab84414bcab3e1f5d80566e7
.github/
def/
docs/
gds/
lef/
mag/
maglef/
openlane/
signoff/
spi/
verilog/
caravel
.gitignore
.gitmodules
info.yaml
LICENSE
Makefile
README.md
README.md
Caravel User Project
:exclamation: Important Note
Please fill in your project documentation in this README.md file
Refer to
README
for this sample project documentation.