ngspice/user_analog_project_wrapper.ext

timestamp 1624220454
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
use 10bitdac_cap_layout_design 10bitdac_cap_layout_design_0 1 0 27354 0 1 122658
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node "wbs_adr_i[3]" 1 631.648 21800 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_sel_i[2]" 1 631.648 20618 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_dat_o[2]" 1 631.648 19436 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_dat_i[2]" 1 631.648 18254 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_adr_i[2]" 1 631.648 17072 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_sel_i[1]" 1 631.648 15890 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_dat_o[1]" 1 631.648 14708 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_dat_i[1]" 1 631.648 13526 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_adr_i[1]" 1 631.648 12344 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_sel_i[0]" 1 631.648 11162 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_dat_o[0]" 1 631.648 9980 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_dat_i[0]" 1 631.648 8798 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_adr_i[0]" 1 631.648 7616 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_we_i" 1 631.648 6434 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_stb_i" 1 631.648 5252 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_cyc_i" 1 631.648 4070 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wbs_ack_o" 1 631.648 2888 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wb_rst_i" 1 631.648 1706 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wb_clk_i" 1 631.648 524 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "vssd2" 0 20209.9 2946 174588 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4369308 54396 13928760 19452 0 0 0 0 0 0
node "io_in[22]" 14 206013 1322 77946 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 62813816 533604 97344 1640 123480 1596 143360 2784 0 0 0 0 0 0
node "io_in[21]" 14 178410 1326 121192 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60309812 440464 199984 3240 119544 1580 143360 2784 0 0 0 0 0 0
node "io_in[23]" 15 248222 1442 34732 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 64680496 679920 105688 2816 108228 1592 143360 2784 0 0 0 0 0 0
node "io_in[24]" 14 361611 1048 13336 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 153593636 793096 249388 3260 73600 1240 143360 2784 0 0 0 0 0 0
node "li_28750_232468#" 15 662.162 28750 232468 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10388 408 59824 1336 44580 1412 0 0 0 0 0 0 0 0
node "li_28944_232638#" 13 41.9654 28944 232638 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1368 148 0 0 0 0 0 0 0 0 0 0 0 0
node "io_in[20]" 15 32415.4 1478 248820 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6367608 84544 1306220 9444 136024 1780 143360 2784 0 0 0 0 0 0
node "io_in[19]" 14 58451.2 1210 291848 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11381864 170504 72900 1272 86724 1524 143360 2784 0 0 0 0 0 0
node "io_in[18]" 15 104568 1434 334992 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31310140 268168 492148 5576 145332 1864 143360 2784 0 0 0 0 0 0
node "io_in[17]" 15 301665 1396 378264 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 215452872 363796 653044 6552 149800 1828 143360 2784 0 0 0 0 0 0
node "io_in[16]" 17 262856 1052 421516 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 116097780 552268 1155816 12964 70372 1256 143360 2784 0 0 0 0 0 0
node "io_in[15]" 15 262694 1280 464720 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 108881572 558756 9648212 24380 143120 1792 143360 2784 0 0 0 0 0 0
node "io_in[14]" 14 438752 1040 507948 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 249103420 681716 35854492 43156 82960 1316 143360 2784 0 0 0 0 0 0
substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
cap "vccd2" "io_in[18]" 180.944
cap "io_analog[5]" "io_clamp_high[1]" 525
cap "io_analog[6]" "io_clamp_low[2]" 525
cap "io_analog[5]" "io_clamp_low[1]" 525
cap "io_analog[6]" "io_clamp_high[2]" 525
cap "io_in[16]" "io_in[15]" 1470.06
cap "io_clamp_low[1]" "io_clamp_high[1]" 525
cap "vccd2" "io_in[17]" 340.68
cap "io_clamp_low[2]" "io_clamp_high[2]" 525
cap "io_in[16]" "io_in[14]" 2244.02
cap "io_clamp_low[0]" "io_clamp_high[0]" 525
cap "io_clamp_low[0]" "io_analog[4]" 525
cap "vccd2" "io_in[15]" 187.762
cap "io_analog[4]" "io_clamp_high[0]" 525
cap "vccd2" "io_in[14]" 132.244
cap "io_in[16]" "vccd2" 130.296
cap "io_in[20]" "io_in[19]" 283.725
subcap "wb_clk_i" -348.26
subcap "wb_clk_i" -283.388
subcap "wbs_sel_i[1]" -315.824
subcap "wbs_sel_i[1]" -315.824
subcap "wbs_dat_i[5]" -283.388
subcap "wbs_dat_i[5]" -348.26
subcap "wbs_dat_o[11]" -338.72
subcap "wbs_dat_o[11]" -292.928
subcap "wbs_adr_i[16]" -306.284
subcap "wbs_adr_i[16]" -325.364
subcap "wbs_dat_i[20]" -273.848
subcap "wbs_dat_i[20]" -357.8
subcap "wbs_dat_i[22]" -361.616
subcap "wbs_dat_i[22]" -270.032
subcap "wbs_dat_o[26]" -329.18
subcap "wbs_dat_o[26]" -302.468
subcap "wbs_adr_i[31]" -296.744
subcap "wbs_adr_i[31]" -334.904
subcap "la_data_out[3]" -264.308
subcap "la_data_out[3]" -367.34
subcap "la_data_out[5]" -352.076
subcap "la_data_out[5]" -279.572
subcap "la_oenb[9]" -319.64
subcap "la_oenb[9]" -312.008
subcap "la_data_in[14]" -287.204
subcap "la_data_in[14]" -344.444
subcap "la_data_out[20]" -342.536
subcap "la_data_out[20]" -289.112
subcap "la_oenb[24]" -310.1
subcap "la_oenb[24]" -321.548
subcap "la_data_in[29]" -277.664
subcap "la_data_in[29]" -353.984
subcap "la_data_in[31]" -365.432
subcap "la_data_in[31]" -266.216
subcap "la_data_out[35]" -332.996
subcap "la_data_out[35]" -298.652
subcap "la_oenb[39]" -300.56
subcap "la_oenb[39]" -331.088
subcap "la_data_in[44]" -268.124
subcap "la_data_in[44]" -363.524
subcap "la_data_in[46]" -355.892
subcap "la_data_in[46]" -275.756
subcap "la_data_out[50]" -323.456
subcap "la_data_out[50]" -308.192
subcap "la_oenb[54]" -291.02
subcap "la_oenb[54]" -340.628
subcap "la_data_in[61]" -346.352
subcap "la_data_in[61]" -285.296
subcap "la_data_out[65]" -313.916
subcap "la_data_out[65]" -317.732
subcap "la_oenb[69]" -281.48
subcap "la_oenb[69]" -350.168
subcap "la_oenb[71]" -369.248
subcap "la_data_in[76]" -336.812
subcap "la_data_in[76]" -294.836
subcap "la_data_out[80]" -304.376
subcap "la_data_out[80]" -327.272
subcap "la_oenb[84]" -271.94
subcap "la_oenb[84]" -359.708
subcap "la_oenb[86]" -359.708
subcap "la_oenb[86]" -271.94
subcap "la_data_in[91]" -327.272
subcap "la_data_in[91]" -304.376
subcap "la_data_out[95]" -294.836
subcap "la_data_out[95]" -336.812
subcap "la_oenb[99]" -369.248
subcap "la_oenb[101]" -350.168
subcap "la_oenb[101]" -281.48
subcap "la_data_in[106]" -317.732
subcap "la_data_in[106]" -313.916
subcap "la_data_out[110]" -285.296
subcap "la_data_out[110]" -346.352
subcap "la_oenb[116]" -340.628
subcap "la_oenb[116]" -291.02
subcap "la_data_in[121]" -308.192
subcap "la_data_in[121]" -323.456
subcap "la_data_out[125]" -275.756
subcap "la_data_out[125]" -355.892
subcap "la_data_out[127]" -363.524
subcap "la_data_out[127]" -268.124
subcap "io_in_3v3[0]" -224.354
subcap "io_in[0]" -224.354
subcap "io_out[0]" -224.354
subcap "io_oeb[0]" -224.354
subcap "io_in_3v3[1]" -224.354
subcap "io_in[1]" -224.354
subcap "io_out[1]" -224.354
subcap "io_oeb[1]" -224.354
subcap "io_in_3v3[2]" -224.354
subcap "io_in[2]" -224.354
subcap "io_in_3v3[24]" -308.452
subcap "io_out[2]" -224.354
subcap "io_oeb[2]" -419.947
subcap "io_in_3v3[24]" -305.276
subcap "io_oeb[2]" -418.136
subcap "io_in_3v3[3]" -224.354
subcap "io_in[3]" -224.354
subcap "io_out[3]" -224.354
subcap "io_oeb[3]" -224.354
subcap "io_in_3v3[4]" -224.354
subcap "io_in[4]" -224.354
subcap "io_out[4]" -224.354
subcap "io_oeb[4]" -224.354
subcap "gpio_analog[16]" -297.336
subcap "gpio_analog[16]" -316.392
subcap "io_in_3v3[5]" -224.354
subcap "io_in[5]" -397.307
subcap "io_in[5]" -440.776
subcap "io_out[5]" -224.354
subcap "io_oeb[5]" -224.354
subcap "gpio_noesd[15]" -329.096
subcap "gpio_noesd[15]" -284.632
subcap "io_in_3v3[6]" -431.72
subcap "io_in_3v3[6]" -406.363
subcap "io_in[6]" -224.354
subcap "io_out[6]" -224.354
subcap "io_oeb[6]" -224.354
cap "io_in[21]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d7" 160.102
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d7" "io_in[21]" 16.8875
subcap "vssa1" -6019.57
subcap "vssa1" -6096.93
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d8" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/switch_layout_0/INV_0/a_160_n242#" 11.6471
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d8" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/x2_out_v" 137.394
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d8" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/gnd!" 153.072
cap "io_in[24]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/x2_out_v" 8.89888
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/x2_out_v" "io_in[24]" 7.97191
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/switch_layout_0/INV_0/a_160_n242#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d8" 0.352941
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/x2_out_v" "io_in[24]" 86.4952
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/x2_out_v" "io_in[24]" -11.4433
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/gnd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp2" 43.2448
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/gnd!" 41.1616
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x2_inp1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/gnd!" -0.7904
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/gnd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d0" 57.6728
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x2_inp1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/gnd!" -69.8444
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/gnd!" "io_in[24]" 40.904
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/gnd!" "io_in[24]" -79.75
cap "10bitdac_cap_layout_design_0/d9" "10bitdac_cap_layout_design_0/10bitdac_layout_0/gnd!" 6.11458
cap "10bitdac_cap_layout_design_0/d9" "10bitdac_cap_layout_design_0/10bitdac_layout_0/gnd!" 12.6059
cap "10bitdac_cap_layout_design_0/d9" "10bitdac_cap_layout_design_0/10bitdac_layout_0/gnd!" 8.66949
cap "10bitdac_cap_layout_design_0/d9" "10bitdac_cap_layout_design_0/10bitdac_layout_0/gnd!" 18.1819
subcap "vssd1" -5942.21
subcap "vssd1" -6019.57
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/d5" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/switch_layout_0/INV_0/w_0_0#" 2.23235
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/switch_layout_0/INV_0/w_0_0#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/d5" 5.83846
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/d5" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/gnd!" 0.748528
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/switch_layout_0/INV_0/a_160_n242#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/d5" 3.66667
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/switch_layout_0/INV_0/w_0_0#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/d5" 21.1718
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/switch_layout_0/INV_0/w_0_0#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/d5" 56.3077
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/vdd!" 16.96
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/vdd!" -44.28
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/vdd!" 13.598
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/vdd!" -28.922
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/d4" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/switch_layout_0/INV_0/w_0_0#" 1.7574
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/x1_out_v" 0.288435
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/x1_out_v" "io_in[14]" 33.8299
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/switch_layout_0/INV_0/w_0_0#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/d4" 45.3411
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/vdd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/d4" 31.1456
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/x1_out_v" 21.5989
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/x1_out_v" 65.765
subcap "vdda1" -6096.93
cap "io_in[15]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/switch_layout_0/dd" 25.1511
cap "io_in[15]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/x1_out_v" 209.581
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/switch_layout_0/INV_0/w_0_0#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/d3" 56.9806
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/switch_layout_0/INV_0/w_0_0#" "io_in[16]" 34.3019
cap "io_in[16]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/vdd!" 94.2265
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/d2" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/switch_layout_0/INV_0/a_160_n242#" 2.15217
subcap "li_28750_232468#" -649.718
subcap "li_28944_232638#" -29.5219
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x2_inp1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp2" 51.4115
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_1/vdd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp2" -7.10543e-15
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp2" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp1" 1.18031
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d0" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp2" 38.6646
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_0/w_506_622#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d1" 36.2411
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_0/dinb" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d1" 27.9231
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/d2" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/x1_out_v" 310.007
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/switch_layout_0/dinb" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/d2" 25.6467
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/switch_layout_0/w_506_622#" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/d2" 71.5493
cap "io_in[16]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/x1_out_v" 162.18
subcap "li_28944_232638#" -1792.22
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/din" 205.566
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/din" 176.457
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/vdd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/din" 137.585
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/din" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/dinb" 32.3823
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/vdd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" 34.08
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_0/vdd!" 97.0511
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_vout" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d1" 181.8
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d1" 199.255
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/vdd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d1" 101.029
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_0/vdd!" "io_in[18]" 9.85752
cap "io_in[17]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/vdd!" 461.413
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/vdd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" -1.44
cap "io_in[17]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" 170.797
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m2_10768_43518#" "io_in[15]" 225.646
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" "io_in[15]" 180.282
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m4_7746_47486#" "io_in[15]" 117.249
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m2_10768_43518#" "io_in[14]" 17.5936
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" "io_in[14]" -17.3647
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m4_7746_47486#" "io_in[14]" 22.9845
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m4_7746_47486#" 47.0825
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" 95.03
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m2_10768_43518#" "io_in[14]" 107.169
cap "io_in[16]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/x2_vref1" 194.24
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/m4_7746_47486#" "io_in[16]" 121.857
cap "io_in[16]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/m2_24290_50850#" 249.603
cap "io_in[20]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" 2.0733
cap "io_in[18]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" 0.179348
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/x2_vref1" "io_in[17]" 15.2167
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m2_10768_43518#" "io_in[15]" 183.585
cap "io_in[14]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m2_10768_43518#" 3.863
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/m2_10768_43518#" "io_in[14]" 75.67
cap "io_in[16]" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/m2_24290_50850#" 96.8484
cap "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/x1_out_v" "io_in[16]" 161.883
subcap "vdda1" -6174.29
subcap "gpio_analog[0]" -224.354
subcap "gpio_noesd[0]" -224.354
subcap "io_in_3v3[7]" -224.354
subcap "io_in[7]" -224.354
subcap "io_out[7]" -224.354
subcap "io_oeb[7]" -224.354
subcap "gpio_analog[1]" -224.354
subcap "gpio_noesd[1]" -224.354
subcap "io_in_3v3[8]" -224.354
subcap "io_in[8]" -224.354
subcap "io_out[8]" -435.342
subcap "io_out[8]" -402.74
subcap "io_oeb[8]" -224.354
subcap "gpio_analog[2]" -224.354
subcap "gpio_noesd[2]" -224.354
subcap "io_in_3v3[9]" -224.354
subcap "io_in[9]" -224.354
subcap "io_out[9]" -224.354
subcap "io_oeb[9]" -224.354
subcap "io_out[17]" -300.512
subcap "io_out[17]" -313.216
subcap "gpio_analog[3]" -224.354
subcap "gpio_noesd[3]" -224.354
subcap "io_in_3v3[10]" -224.354
subcap "io_in[10]" -224.354
subcap "io_out[10]" -224.354
subcap "io_oeb[10]" -224.354
subcap "io_oeb[16]" -332.272
subcap "io_oeb[16]" -281.456
subcap "gpio_analog[4]" -224.354
subcap "gpio_noesd[4]" -224.354
subcap "io_in_3v3[11]" -224.354
subcap "io_in[11]" -224.354
subcap "io_out[11]" -224.354
subcap "io_oeb[11]" -224.354
subcap "gpio_analog[5]" -224.354
subcap "gpio_noesd[5]" -224.354
subcap "io_in_3v3[12]" -224.354
subcap "io_in[12]" -224.354
subcap "io_out[12]" -224.354
subcap "io_oeb[12]" -224.354
subcap "gpio_analog[7]" -295.748
subcap "gpio_analog[7]" -317.98
subcap "vdda1" -6225.35
subcap "vdda1" -6302.71
subcap "vdda1" -5977.48
subcap "gpio_analog[6]" -224.354
subcap "gpio_noesd[6]" -224.354
subcap "io_in_3v3[13]" -224.354
subcap "io_in[13]" -402.74
subcap "io_in[13]" -435.342
subcap "io_out[13]" -224.354
subcap "io_oeb[13]" -224.354
subcap "vccd1" -6079.14
subcap "vccd1" -6156.5
subcap "io_analog[0]" -6606.43
subcap "io_analog[0]" -6266.68
subcap "io_analog[9]" -5983.18
subcap "io_analog[8]" -6090.18
subcap "io_analog[7]" -376844
subcap "io_analog[6]" -6518.18
subcap "io_analog[6]" -6076
subcap "io_clamp_low[2]" -3109.68
subcap "io_clamp_high[2]" -2949.18
subcap "io_analog[6]" -6036.68
subcap "io_analog[5]" -6464.68
subcap "io_analog[5]" -6076
subcap "io_clamp_low[1]" -3056.18
subcap "io_clamp_high[1]" -2895.68
subcap "io_analog[5]" -5983.18
subcap "io_analog[4]" -6197.18
subcap "io_clamp_low[0]" -2788.68
subcap "io_clamp_high[0]" -2628.18
subcap "io_analog[4]" -6464.68
subcap "io_analog[4]" -6076
subcap "io_analog[3]" -6518.18
subcap "io_analog[3]" -6076
subcap "io_analog[2]" -5876.18
subcap "vssa1" -5803.8
subcap "vssa1" -5908.4
subcap "io_analog[1]" -6090.18
merge "10bitdac_cap_layout_design_0/VSUBS" "VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/gnd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp2" -333.624 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -87908 -548 0 0 -2356 -200 0 0 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/x1_inp2" "li_28944_232638#"
merge "li_28944_232638#" "li_28750_232468#"
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_1/d6" "io_in[21]" -1734.48 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 35864 -5600 -218920 -556 0 0 0 0 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/vdd!" "vccd2" -11047.8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -14979408 -25840 -1805626 -9474 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/d4" "io_in[15]" -6403.35 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -393746 -18524 217634 -4332 -17248 -532 -143360 -2784 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/d9" "io_in[24]" -151.743 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -93884 -236 0 0 0 0 0 0 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/gnd!" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/gnd!" -2848.29 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -92448 -3020 -3466080 -5836 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/gnd!" "vssd2"
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/switch_layout_2/din" "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d0" -1446.05 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -45294 -2650 166424 0 -19936 -580 -143360 -2784 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d0" "io_in[20]"
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/2bitdac_layout_0/d1" "io_in[18]" -1501.2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -37552 -2904 97192 -254 -29072 -888 -12800 -2784 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/d5" "io_in[14]" -10049 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1484200 -23916 -527700 -6900 -15456 -500 -143360 -2784 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d8" "io_in[23]" -99.4072 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 21712 -328 0 0 0 0 0 0 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_1/d7" "io_in[22]" -1760.31 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -217362 -5670 0 0 0 0 0 0 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/inp1" "io_in[19]" -768.601 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1320 -240 0 0 -20160 -572 -143360 -2784 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_1/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/3bitdac_layout_0/d2" "io_in[17]" -2623.15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -212208 -3366 -284848 -3528 -27176 -660 -143360 -2784 0 0 0 0 0 0
merge "10bitdac_cap_layout_design_0/out" "io_analog[7]" -6900.34 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -12500000 -15000 231938 -658 0 0 0 0
merge "10bitdac_cap_layout_design_0/10bitdac_layout_0/9bitdac_layout_0/8bitdac_layout_0/7bitdac_layout_0/6bitdac_layout_1/5bitdac_layout_0/4bitdac_layout_0/d3" "io_in[16]" -4926.71 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -103276 -6196 -737356 -11168 -11872 -436 -143360 -2784 0 0 0 0 0 0