| # YONGA-LZ4 Decoder |
| |
| [](https://opensource.org/licenses/Apache-2.0) [](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml) [](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml) |
| |
| Table of contents |
| ================= |
| |
| - [Overview](#overview) |
| - [Simulation](#simulation) |
| - [Checklist for Open-MPW Submission](#checklist-for-open-mpw-submission) |
| |
| Overview |
| ======== |
| |
| YONGA-LZ4 Decoder is an implementation of the decoder of the popular [LZ4](https://github.com/lz4/lz4) compression algorithm. |
| |
| Simulation |
| ======== |
| |
| TBA |
| |
| Checklist for Open-MPW Submission |
| ================================= |
| |
| - [] The project repo adheres to the same directory structure in this |
| repo |
| - [] The project repo contain info.yaml at the project root |
| - [] Top level macro is named ``user_project_wrapper`` |
| - [] Full Chip Simulation passes for RTL and GL (gate-level) |
| - [] The hardened Macros are LVS and DRC clean |
| - [] The hardened ``user_project_wrapper`` adheres to the same pin |
| order specified at [pin_order](https://github.com/efabless/caravel/blob/master/openlane/user_project_wrapper_empty/pin_order.cfg) |
| - [] XOR check passes with zero total difference. |
| - [] Openlane summary reports are retained under ./signoff/ |
