Ahmed Ghazy | d4ec2f0 | 2021-04-05 18:32:10 +0200 | [diff] [blame] | 1 | # SPDX-FileCopyrightText: 2020 Efabless Corporation |
| 2 | # |
| 3 | # Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | # you may not use this file except in compliance with the License. |
| 5 | # You may obtain a copy of the License at |
| 6 | # |
| 7 | # http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | # |
| 9 | # Unless required by applicable law or agreed to in writing, software |
| 10 | # distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | # See the License for the specific language governing permissions and |
| 13 | # limitations under the License. |
| 14 | # SPDX-License-Identifier: Apache-2.0 |
| 15 | |
| 16 | # Base Configurations. Don't Touch |
| 17 | # section begin |
| 18 | set script_dir [file dirname [file normalize [info script]]] |
| 19 | |
| 20 | source $script_dir/../../caravel/openlane/user_project_wrapper_empty/fixed_wrapper_cfgs.tcl |
| 21 | |
| 22 | set ::env(DESIGN_NAME) user_project_wrapper |
| 23 | #section end |
| 24 | |
| 25 | # User Configurations |
| 26 | |
| 27 | ## Source Verilog Files |
| 28 | set ::env(VERILOG_FILES) "\ |
manarabdelaty | e542bdf | 2021-04-20 11:15:40 +0200 | [diff] [blame] | 29 | $script_dir/../../caravel/verilog/rtl/defines.v \ |
AmoghLonkar | 41062a7 | 2021-05-26 09:08:09 -0700 | [diff] [blame^] | 30 | $script_dir/../../verilog/rtl/user_project_wrapper.v \ |
| 31 | $script_dir/../../verilog/rtl/testchip/openram_testchip.v" |
Ahmed Ghazy | d4ec2f0 | 2021-04-05 18:32:10 +0200 | [diff] [blame] | 32 | |
| 33 | ## Clock configurations |
| 34 | set ::env(CLOCK_PORT) "user_clock2" |
AmoghLonkar | accab47 | 2021-05-18 09:45:49 -0700 | [diff] [blame] | 35 | set ::env(CLOCK_NET) "wb_clk_i" |
Ahmed Ghazy | d4ec2f0 | 2021-04-05 18:32:10 +0200 | [diff] [blame] | 36 | |
| 37 | set ::env(CLOCK_PERIOD) "10" |
| 38 | |
| 39 | ## Internal Macros |
| 40 | ### Macro Placement |
| 41 | set ::env(MACRO_PLACEMENT_CFG) $script_dir/macro.cfg |
| 42 | |
| 43 | ### Black-box verilog and views |
| 44 | set ::env(VERILOG_FILES_BLACKBOX) "\ |
| 45 | $script_dir/../../caravel/verilog/rtl/defines.v \ |
AmoghLonkar | 41062a7 | 2021-05-26 09:08:09 -0700 | [diff] [blame^] | 46 | $script_dir/../../verilog/rtl/sky130_sram_1kbyte_1rw1r_32x256_8.v" |
Ahmed Ghazy | d4ec2f0 | 2021-04-05 18:32:10 +0200 | [diff] [blame] | 47 | |
| 48 | set ::env(EXTRA_LEFS) "\ |
AmoghLonkar | 7d7491d | 2021-05-18 10:12:57 -0700 | [diff] [blame] | 49 | $script_dir/../../lef/user_project_wrapper.lef \ |
AmoghLonkar | accab47 | 2021-05-18 09:45:49 -0700 | [diff] [blame] | 50 | $script_dir/../../lef/sky130_sram_1kbyte_1rw1r_32x256_8.lef" |
Ahmed Ghazy | d4ec2f0 | 2021-04-05 18:32:10 +0200 | [diff] [blame] | 51 | |
| 52 | set ::env(EXTRA_GDS_FILES) "\ |
AmoghLonkar | 7d7491d | 2021-05-18 10:12:57 -0700 | [diff] [blame] | 53 | $script_dir/../../gds/user_project_wrapper.gds \ |
AmoghLonkar | accab47 | 2021-05-18 09:45:49 -0700 | [diff] [blame] | 54 | $script_dir/../../lef/sky130_sram_1kbyte_1rw1r_32x256_8.gds" |
Ahmed Ghazy | d4ec2f0 | 2021-04-05 18:32:10 +0200 | [diff] [blame] | 55 | |
AmoghLonkar | 41062a7 | 2021-05-26 09:08:09 -0700 | [diff] [blame^] | 56 | #set ::env(GLB_RT_MAXLAYER) 5 |
manarabdelaty | 609ec98 | 2021-04-21 17:00:06 +0200 | [diff] [blame] | 57 | |
AmoghLonkar | 41062a7 | 2021-05-26 09:08:09 -0700 | [diff] [blame^] | 58 | #set ::env(FP_PDN_CHECK_NODES) 0 |
| 59 | # Power config |
| 60 | set ::env(PDN_CFG) $script_dir/pdn.tcl |
| 61 | |
| 62 | set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg |
| 63 | set ::env(FP_HORIZONTAL_HALO) 15 |
| 64 | set ::env(FP_VERTICAL_HALO) 15 |
| 65 | set ::env(FP_PDN_VOFFSET) 5 |
| 66 | set ::env(FP_PDN_VPITCH) 20 |
| 67 | set ::env(FP_PDN_HPITCH) 50 |
| 68 | |
| 69 | # Placement config |
| 70 | set ::env(PL_OPENPHYSYN_OPTIMIZATIONS) 0 |
| 71 | set ::env(PL_RANDOM_GLB_PLACEMENT) 1 |
| 72 | set ::env(PL_BASIC_PLACEMENT) 1 |
| 73 | set ::env(PL_TARGET_DENSITY) 0.99 |
| 74 | |
| 75 | set ::env(MAGIC_DRC_USE_GDS) 0 |
| 76 | |
| 77 | set ::env(RUN_CVC) 0 |