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foss-eda-tools
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third_party
/
shuttle
/
sky130
/
mpw-002
/
slot-009
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ea2e5901bdde94299aa4ede9f09245bfeea0bc51
commit
ea2e5901bdde94299aa4ede9f09245bfeea0bc51
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log
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tgz
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author
AmoghLonkar <alonkar@ucsc.edu>
Wed Jun 09 18:03:49 2021 -0700
committer
AmoghLonkar <alonkar@ucsc.edu>
Wed Jun 09 18:03:49 2021 -0700
tree
7c4d770d470efe3a5cffd1a2011b8c88d3abbf9f
parent
4e483a703e224be166ad218a664c158417f8cc10
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diff
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Removed read_data register to reduce delay
verilog/rtl/openram_testchip_tb.v
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diff
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1 file changed
tree: 7c4d770d470efe3a5cffd1a2011b8c88d3abbf9f
.github/
chisel/
def/
docs/
gds/
lef/
mag/
maglef/
openlane/
signoff/
single_port/
spi/
verilog/
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