Merge branch 'main' of github.com:AmoghLonkar/openram_testchip into main

verilog/rtl/uprj_netlists.v

diff --git a/verilog/rtl/uprj_netlists.v b/verilog/rtl/uprj_netlists.v
index d678690..25fa95d 100644
--- a/verilog/rtl/uprj_netlists.v
+++ b/verilog/rtl/uprj_netlists.v
@@ -34,4 +34,5 @@
     `include "sram_1rw0r0w_32_512_sky130.v"
     `include "sram_1rw0r0w_32_1024_sky130.v"
     `include "sram_1rw0r0w_64_512_sky130.v"
+    `include "clock_mux.v"
 `endif
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