Update with new single port macros
diff --git a/lef/sky130_sram_1kbyte_1rw_32x256_8.lef b/lef/sky130_sram_1kbyte_1rw_32x256_8.lef
new file mode 100644
index 0000000..b981089
--- /dev/null
+++ b/lef/sky130_sram_1kbyte_1rw_32x256_8.lef
@@ -0,0 +1,789 @@
+VERSION 5.4 ;
+NAMESCASESENSITIVE ON ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+UNITS
+ DATABASE MICRONS 2000 ;
+END UNITS
+MACRO sky130_sram_1kbyte_1rw_32x256_8
+ CLASS BLOCK ;
+ SIZE 478.42 BY 223.42 ;
+ SYMMETRY X Y R90 ;
+ PIN din0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 115.6 0.0 115.98 1.06 ;
+ END
+ END din0[0]
+ PIN din0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 121.72 0.0 122.1 1.06 ;
+ END
+ END din0[1]
+ PIN din0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 127.16 0.0 127.54 1.06 ;
+ END
+ END din0[2]
+ PIN din0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 132.6 0.0 132.98 1.06 ;
+ END
+ END din0[3]
+ PIN din0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 139.4 0.0 139.78 1.06 ;
+ END
+ END din0[4]
+ PIN din0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 144.16 0.0 144.54 1.06 ;
+ END
+ END din0[5]
+ PIN din0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 150.28 0.0 150.66 1.06 ;
+ END
+ END din0[6]
+ PIN din0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 157.08 0.0 157.46 1.06 ;
+ END
+ END din0[7]
+ PIN din0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 162.52 0.0 162.9 1.06 ;
+ END
+ END din0[8]
+ PIN din0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 168.64 0.0 169.02 1.06 ;
+ END
+ END din0[9]
+ PIN din0[10]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 174.76 0.0 175.14 1.06 ;
+ END
+ END din0[10]
+ PIN din0[11]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 179.52 0.0 179.9 1.06 ;
+ END
+ END din0[11]
+ PIN din0[12]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 186.32 0.0 186.7 1.06 ;
+ END
+ END din0[12]
+ PIN din0[13]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 191.76 0.0 192.14 1.06 ;
+ END
+ END din0[13]
+ PIN din0[14]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 197.88 0.0 198.26 1.06 ;
+ END
+ END din0[14]
+ PIN din0[15]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 202.64 0.0 203.02 1.06 ;
+ END
+ END din0[15]
+ PIN din0[16]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 208.76 0.0 209.14 1.06 ;
+ END
+ END din0[16]
+ PIN din0[17]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 215.56 0.0 215.94 1.06 ;
+ END
+ END din0[17]
+ PIN din0[18]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 221.0 0.0 221.38 1.06 ;
+ END
+ END din0[18]
+ PIN din0[19]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 226.44 0.0 226.82 1.06 ;
+ END
+ END din0[19]
+ PIN din0[20]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 231.88 0.0 232.26 1.06 ;
+ END
+ END din0[20]
+ PIN din0[21]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 238.68 0.0 239.06 1.06 ;
+ END
+ END din0[21]
+ PIN din0[22]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 244.8 0.0 245.18 1.06 ;
+ END
+ END din0[22]
+ PIN din0[23]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 250.24 0.0 250.62 1.06 ;
+ END
+ END din0[23]
+ PIN din0[24]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 255.68 0.0 256.06 1.06 ;
+ END
+ END din0[24]
+ PIN din0[25]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 261.12 0.0 261.5 1.06 ;
+ END
+ END din0[25]
+ PIN din0[26]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 267.92 0.0 268.3 1.06 ;
+ END
+ END din0[26]
+ PIN din0[27]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 273.36 0.0 273.74 1.06 ;
+ END
+ END din0[27]
+ PIN din0[28]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 279.48 0.0 279.86 1.06 ;
+ END
+ END din0[28]
+ PIN din0[29]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 284.92 0.0 285.3 1.06 ;
+ END
+ END din0[29]
+ PIN din0[30]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 290.36 0.0 290.74 1.06 ;
+ END
+ END din0[30]
+ PIN din0[31]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 297.16 0.0 297.54 1.06 ;
+ END
+ END din0[31]
+ PIN din0[32]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 302.6 0.0 302.98 1.06 ;
+ END
+ END din0[32]
+ PIN addr0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 80.24 0.0 80.62 1.06 ;
+ END
+ END addr0[0]
+ PIN addr0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 87.04 0.0 87.42 1.06 ;
+ END
+ END addr0[1]
+ PIN addr0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 135.32 1.06 135.7 ;
+ END
+ END addr0[2]
+ PIN addr0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 143.48 1.06 143.86 ;
+ END
+ END addr0[3]
+ PIN addr0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 148.92 1.06 149.3 ;
+ END
+ END addr0[4]
+ PIN addr0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 68.0 222.36 68.38 223.42 ;
+ END
+ END addr0[5]
+ PIN addr0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 70.04 222.36 70.42 223.42 ;
+ END
+ END addr0[6]
+ PIN addr0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 69.36 222.36 69.74 223.42 ;
+ END
+ END addr0[7]
+ PIN addr0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 68.68 222.36 69.06 223.42 ;
+ END
+ END addr0[8]
+ PIN csb0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 37.4 1.06 37.78 ;
+ END
+ END csb0
+ PIN web0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 46.92 1.06 47.3 ;
+ END
+ END web0
+ PIN clk0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 38.76 1.06 39.14 ;
+ END
+ END clk0
+ PIN wmask0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 92.48 0.0 92.86 1.06 ;
+ END
+ END wmask0[0]
+ PIN wmask0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 97.92 0.0 98.3 1.06 ;
+ END
+ END wmask0[1]
+ PIN wmask0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 104.04 0.0 104.42 1.06 ;
+ END
+ END wmask0[2]
+ PIN wmask0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 110.16 0.0 110.54 1.06 ;
+ END
+ END wmask0[3]
+ PIN spare_wen0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 308.04 0.0 308.42 1.06 ;
+ END
+ END spare_wen0
+ PIN dout0[0]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 141.44 0.0 141.82 1.06 ;
+ END
+ END dout0[0]
+ PIN dout0[1]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 153.0 0.0 153.38 1.06 ;
+ END
+ END dout0[1]
+ PIN dout0[2]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 160.48 0.0 160.86 1.06 ;
+ END
+ END dout0[2]
+ PIN dout0[3]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 172.04 0.0 172.42 1.06 ;
+ END
+ END dout0[3]
+ PIN dout0[4]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 182.92 0.0 183.3 1.06 ;
+ END
+ END dout0[4]
+ PIN dout0[5]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 192.44 0.0 192.82 1.06 ;
+ END
+ END dout0[5]
+ PIN dout0[6]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 201.28 0.0 201.66 1.06 ;
+ END
+ END dout0[6]
+ PIN dout0[7]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 212.84 0.0 213.22 1.06 ;
+ END
+ END dout0[7]
+ PIN dout0[8]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 223.04 0.0 223.42 1.06 ;
+ END
+ END dout0[8]
+ PIN dout0[9]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 232.56 0.0 232.94 1.06 ;
+ END
+ END dout0[9]
+ PIN dout0[10]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 242.08 0.0 242.46 1.06 ;
+ END
+ END dout0[10]
+ PIN dout0[11]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 252.96 0.0 253.34 1.06 ;
+ END
+ END dout0[11]
+ PIN dout0[12]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 262.48 0.0 262.86 1.06 ;
+ END
+ END dout0[12]
+ PIN dout0[13]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 271.32 0.0 271.7 1.06 ;
+ END
+ END dout0[13]
+ PIN dout0[14]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 282.2 0.0 282.58 1.06 ;
+ END
+ END dout0[14]
+ PIN dout0[15]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 292.4 0.0 292.78 1.06 ;
+ END
+ END dout0[15]
+ PIN dout0[16]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 300.56 0.0 300.94 1.06 ;
+ END
+ END dout0[16]
+ PIN dout0[17]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 312.12 0.0 312.5 1.06 ;
+ END
+ END dout0[17]
+ PIN dout0[18]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 322.32 0.0 322.7 1.06 ;
+ END
+ END dout0[18]
+ PIN dout0[19]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 332.52 0.0 332.9 1.06 ;
+ END
+ END dout0[19]
+ PIN dout0[20]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 342.72 0.0 343.1 1.06 ;
+ END
+ END dout0[20]
+ PIN dout0[21]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 352.92 0.0 353.3 1.06 ;
+ END
+ END dout0[21]
+ PIN dout0[22]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 362.44 0.0 362.82 1.06 ;
+ END
+ END dout0[22]
+ PIN dout0[23]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 372.64 0.0 373.02 1.06 ;
+ END
+ END dout0[23]
+ PIN dout0[24]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 381.48 0.0 381.86 1.06 ;
+ END
+ END dout0[24]
+ PIN dout0[25]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 392.36 0.0 392.74 1.06 ;
+ END
+ END dout0[25]
+ PIN dout0[26]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 402.56 0.0 402.94 1.06 ;
+ END
+ END dout0[26]
+ PIN dout0[27]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 412.76 0.0 413.14 1.06 ;
+ END
+ END dout0[27]
+ PIN dout0[28]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 477.36 67.32 478.42 67.7 ;
+ END
+ END dout0[28]
+ PIN dout0[29]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 477.36 66.64 478.42 67.02 ;
+ END
+ END dout0[29]
+ PIN dout0[30]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 477.36 65.96 478.42 66.34 ;
+ END
+ END dout0[30]
+ PIN dout0[31]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 477.36 61.88 478.42 62.26 ;
+ END
+ END dout0[31]
+ PIN dout0[32]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 477.36 63.92 478.42 64.3 ;
+ END
+ END dout0[32]
+ PIN vccd1
+ DIRECTION INOUT ;
+ USE POWER ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met3 ;
+ RECT 4.76 216.92 473.66 218.66 ;
+ LAYER met4 ;
+ RECT 471.92 4.76 473.66 218.66 ;
+ LAYER met3 ;
+ RECT 4.76 4.76 473.66 6.5 ;
+ LAYER met4 ;
+ RECT 4.76 4.76 6.5 218.66 ;
+ END
+ END vccd1
+ PIN vssd1
+ DIRECTION INOUT ;
+ USE GROUND ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met4 ;
+ RECT 475.32 1.36 477.06 222.06 ;
+ LAYER met3 ;
+ RECT 1.36 1.36 477.06 3.1 ;
+ LAYER met4 ;
+ RECT 1.36 1.36 3.1 222.06 ;
+ LAYER met3 ;
+ RECT 1.36 220.32 477.06 222.06 ;
+ END
+ END vssd1
+ OBS
+ LAYER met1 ;
+ RECT 0.62 0.62 477.8 222.8 ;
+ LAYER met2 ;
+ RECT 0.62 0.62 477.8 222.8 ;
+ LAYER met3 ;
+ RECT 1.66 134.72 477.8 136.3 ;
+ RECT 0.62 136.3 1.66 142.88 ;
+ RECT 0.62 144.46 1.66 148.32 ;
+ RECT 0.62 47.9 1.66 134.72 ;
+ RECT 0.62 39.74 1.66 46.32 ;
+ RECT 1.66 66.72 476.76 68.3 ;
+ RECT 1.66 68.3 476.76 134.72 ;
+ RECT 476.76 68.3 477.8 134.72 ;
+ RECT 476.76 62.86 477.8 63.32 ;
+ RECT 476.76 64.9 477.8 65.36 ;
+ RECT 1.66 136.3 4.16 216.32 ;
+ RECT 1.66 216.32 4.16 219.26 ;
+ RECT 4.16 136.3 474.26 216.32 ;
+ RECT 474.26 136.3 477.8 216.32 ;
+ RECT 474.26 216.32 477.8 219.26 ;
+ RECT 1.66 4.16 4.16 7.1 ;
+ RECT 1.66 7.1 4.16 66.72 ;
+ RECT 4.16 7.1 474.26 66.72 ;
+ RECT 474.26 4.16 476.76 7.1 ;
+ RECT 474.26 7.1 476.76 66.72 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 3.7 ;
+ RECT 0.62 3.7 0.76 36.8 ;
+ RECT 0.76 0.62 1.66 0.76 ;
+ RECT 0.76 3.7 1.66 36.8 ;
+ RECT 476.76 0.62 477.66 0.76 ;
+ RECT 476.76 3.7 477.66 61.28 ;
+ RECT 477.66 0.62 477.8 0.76 ;
+ RECT 477.66 0.76 477.8 3.7 ;
+ RECT 477.66 3.7 477.8 61.28 ;
+ RECT 1.66 0.62 4.16 0.76 ;
+ RECT 1.66 3.7 4.16 4.16 ;
+ RECT 4.16 0.62 474.26 0.76 ;
+ RECT 4.16 3.7 474.26 4.16 ;
+ RECT 474.26 0.62 476.76 0.76 ;
+ RECT 474.26 3.7 476.76 4.16 ;
+ RECT 0.62 149.9 0.76 219.72 ;
+ RECT 0.62 219.72 0.76 222.66 ;
+ RECT 0.62 222.66 0.76 222.8 ;
+ RECT 0.76 149.9 1.66 219.72 ;
+ RECT 0.76 222.66 1.66 222.8 ;
+ RECT 1.66 219.26 4.16 219.72 ;
+ RECT 1.66 222.66 4.16 222.8 ;
+ RECT 4.16 219.26 474.26 219.72 ;
+ RECT 4.16 222.66 474.26 222.8 ;
+ RECT 474.26 219.26 477.66 219.72 ;
+ RECT 474.26 222.66 477.66 222.8 ;
+ RECT 477.66 219.26 477.8 219.72 ;
+ RECT 477.66 219.72 477.8 222.66 ;
+ RECT 477.66 222.66 477.8 222.8 ;
+ LAYER met4 ;
+ RECT 115.0 1.66 116.58 222.8 ;
+ RECT 116.58 0.62 121.12 1.66 ;
+ RECT 122.7 0.62 126.56 1.66 ;
+ RECT 128.14 0.62 132.0 1.66 ;
+ RECT 133.58 0.62 138.8 1.66 ;
+ RECT 145.14 0.62 149.68 1.66 ;
+ RECT 163.5 0.62 168.04 1.66 ;
+ RECT 175.74 0.62 178.92 1.66 ;
+ RECT 187.3 0.62 191.16 1.66 ;
+ RECT 203.62 0.62 208.16 1.66 ;
+ RECT 216.54 0.62 220.4 1.66 ;
+ RECT 227.42 0.62 231.28 1.66 ;
+ RECT 245.78 0.62 249.64 1.66 ;
+ RECT 256.66 0.62 260.52 1.66 ;
+ RECT 274.34 0.62 278.88 1.66 ;
+ RECT 285.9 0.62 289.76 1.66 ;
+ RECT 81.22 0.62 86.44 1.66 ;
+ RECT 67.4 1.66 68.98 221.76 ;
+ RECT 68.98 1.66 115.0 221.76 ;
+ RECT 71.02 221.76 115.0 222.8 ;
+ RECT 88.02 0.62 91.88 1.66 ;
+ RECT 93.46 0.62 97.32 1.66 ;
+ RECT 98.9 0.62 103.44 1.66 ;
+ RECT 105.02 0.62 109.56 1.66 ;
+ RECT 111.14 0.62 115.0 1.66 ;
+ RECT 303.58 0.62 307.44 1.66 ;
+ RECT 140.38 0.62 140.84 1.66 ;
+ RECT 142.42 0.62 143.56 1.66 ;
+ RECT 151.26 0.62 152.4 1.66 ;
+ RECT 153.98 0.62 156.48 1.66 ;
+ RECT 158.06 0.62 159.88 1.66 ;
+ RECT 161.46 0.62 161.92 1.66 ;
+ RECT 169.62 0.62 171.44 1.66 ;
+ RECT 173.02 0.62 174.16 1.66 ;
+ RECT 180.5 0.62 182.32 1.66 ;
+ RECT 183.9 0.62 185.72 1.66 ;
+ RECT 193.42 0.62 197.28 1.66 ;
+ RECT 198.86 0.62 200.68 1.66 ;
+ RECT 209.74 0.62 212.24 1.66 ;
+ RECT 213.82 0.62 214.96 1.66 ;
+ RECT 221.98 0.62 222.44 1.66 ;
+ RECT 224.02 0.62 225.84 1.66 ;
+ RECT 233.54 0.62 238.08 1.66 ;
+ RECT 239.66 0.62 241.48 1.66 ;
+ RECT 243.06 0.62 244.2 1.66 ;
+ RECT 251.22 0.62 252.36 1.66 ;
+ RECT 253.94 0.62 255.08 1.66 ;
+ RECT 263.46 0.62 267.32 1.66 ;
+ RECT 268.9 0.62 270.72 1.66 ;
+ RECT 272.3 0.62 272.76 1.66 ;
+ RECT 280.46 0.62 281.6 1.66 ;
+ RECT 283.18 0.62 284.32 1.66 ;
+ RECT 291.34 0.62 291.8 1.66 ;
+ RECT 293.38 0.62 296.56 1.66 ;
+ RECT 298.14 0.62 299.96 1.66 ;
+ RECT 301.54 0.62 302.0 1.66 ;
+ RECT 309.02 0.62 311.52 1.66 ;
+ RECT 313.1 0.62 321.72 1.66 ;
+ RECT 323.3 0.62 331.92 1.66 ;
+ RECT 333.5 0.62 342.12 1.66 ;
+ RECT 343.7 0.62 352.32 1.66 ;
+ RECT 353.9 0.62 361.84 1.66 ;
+ RECT 363.42 0.62 372.04 1.66 ;
+ RECT 373.62 0.62 380.88 1.66 ;
+ RECT 382.46 0.62 391.76 1.66 ;
+ RECT 393.34 0.62 401.96 1.66 ;
+ RECT 403.54 0.62 412.16 1.66 ;
+ RECT 116.58 1.66 471.32 4.16 ;
+ RECT 116.58 4.16 471.32 219.26 ;
+ RECT 116.58 219.26 471.32 222.8 ;
+ RECT 471.32 1.66 474.26 4.16 ;
+ RECT 471.32 219.26 474.26 222.8 ;
+ RECT 4.16 1.66 7.1 4.16 ;
+ RECT 4.16 219.26 7.1 221.76 ;
+ RECT 7.1 1.66 67.4 4.16 ;
+ RECT 7.1 4.16 67.4 219.26 ;
+ RECT 7.1 219.26 67.4 221.76 ;
+ RECT 413.74 0.62 474.72 0.76 ;
+ RECT 413.74 0.76 474.72 1.66 ;
+ RECT 474.72 0.62 477.66 0.76 ;
+ RECT 477.66 0.62 477.8 0.76 ;
+ RECT 477.66 0.76 477.8 1.66 ;
+ RECT 474.26 1.66 474.72 4.16 ;
+ RECT 477.66 1.66 477.8 4.16 ;
+ RECT 474.26 4.16 474.72 219.26 ;
+ RECT 477.66 4.16 477.8 219.26 ;
+ RECT 474.26 219.26 474.72 222.66 ;
+ RECT 474.26 222.66 474.72 222.8 ;
+ RECT 474.72 222.66 477.66 222.8 ;
+ RECT 477.66 219.26 477.8 222.66 ;
+ RECT 477.66 222.66 477.8 222.8 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 1.66 ;
+ RECT 0.76 0.62 3.7 0.76 ;
+ RECT 3.7 0.62 79.64 0.76 ;
+ RECT 3.7 0.76 79.64 1.66 ;
+ RECT 0.62 221.76 0.76 222.66 ;
+ RECT 0.62 222.66 0.76 222.8 ;
+ RECT 0.76 222.66 3.7 222.8 ;
+ RECT 3.7 221.76 67.4 222.66 ;
+ RECT 3.7 222.66 67.4 222.8 ;
+ RECT 0.62 1.66 0.76 4.16 ;
+ RECT 3.7 1.66 4.16 4.16 ;
+ RECT 0.62 4.16 0.76 219.26 ;
+ RECT 3.7 4.16 4.16 219.26 ;
+ RECT 0.62 219.26 0.76 221.76 ;
+ RECT 3.7 219.26 4.16 221.76 ;
+ END
+END sky130_sram_1kbyte_1rw_32x256_8
+END LIBRARY
diff --git a/lef/sky130_sram_2kbyte_1rw_32x512_8.lef b/lef/sky130_sram_2kbyte_1rw_32x512_8.lef
new file mode 100644
index 0000000..e227088
--- /dev/null
+++ b/lef/sky130_sram_2kbyte_1rw_32x512_8.lef
@@ -0,0 +1,782 @@
+VERSION 5.4 ;
+NAMESCASESENSITIVE ON ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+UNITS
+ DATABASE MICRONS 2000 ;
+END UNITS
+MACRO sky130_sram_2kbyte_1rw_32x512_8
+ CLASS BLOCK ;
+ SIZE 481.14 BY 322.7 ;
+ SYMMETRY X Y R90 ;
+ PIN din0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 116.28 0.0 116.66 1.06 ;
+ END
+ END din0[0]
+ PIN din0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 122.4 0.0 122.78 1.06 ;
+ END
+ END din0[1]
+ PIN din0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 127.84 0.0 128.22 1.06 ;
+ END
+ END din0[2]
+ PIN din0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 133.28 0.0 133.66 1.06 ;
+ END
+ END din0[3]
+ PIN din0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 140.08 0.0 140.46 1.06 ;
+ END
+ END din0[4]
+ PIN din0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 144.84 0.0 145.22 1.06 ;
+ END
+ END din0[5]
+ PIN din0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 150.96 0.0 151.34 1.06 ;
+ END
+ END din0[6]
+ PIN din0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 157.76 0.0 158.14 1.06 ;
+ END
+ END din0[7]
+ PIN din0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 163.2 0.0 163.58 1.06 ;
+ END
+ END din0[8]
+ PIN din0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 169.32 0.0 169.7 1.06 ;
+ END
+ END din0[9]
+ PIN din0[10]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 175.44 0.0 175.82 1.06 ;
+ END
+ END din0[10]
+ PIN din0[11]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 180.2 0.0 180.58 1.06 ;
+ END
+ END din0[11]
+ PIN din0[12]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 187.0 0.0 187.38 1.06 ;
+ END
+ END din0[12]
+ PIN din0[13]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 192.44 0.0 192.82 1.06 ;
+ END
+ END din0[13]
+ PIN din0[14]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 198.56 0.0 198.94 1.06 ;
+ END
+ END din0[14]
+ PIN din0[15]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 203.32 0.0 203.7 1.06 ;
+ END
+ END din0[15]
+ PIN din0[16]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 209.44 0.0 209.82 1.06 ;
+ END
+ END din0[16]
+ PIN din0[17]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 216.24 0.0 216.62 1.06 ;
+ END
+ END din0[17]
+ PIN din0[18]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 221.68 0.0 222.06 1.06 ;
+ END
+ END din0[18]
+ PIN din0[19]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 227.12 0.0 227.5 1.06 ;
+ END
+ END din0[19]
+ PIN din0[20]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 232.56 0.0 232.94 1.06 ;
+ END
+ END din0[20]
+ PIN din0[21]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 239.36 0.0 239.74 1.06 ;
+ END
+ END din0[21]
+ PIN din0[22]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 245.48 0.0 245.86 1.06 ;
+ END
+ END din0[22]
+ PIN din0[23]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 250.92 0.0 251.3 1.06 ;
+ END
+ END din0[23]
+ PIN din0[24]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 256.36 0.0 256.74 1.06 ;
+ END
+ END din0[24]
+ PIN din0[25]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 261.8 0.0 262.18 1.06 ;
+ END
+ END din0[25]
+ PIN din0[26]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 268.6 0.0 268.98 1.06 ;
+ END
+ END din0[26]
+ PIN din0[27]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 274.04 0.0 274.42 1.06 ;
+ END
+ END din0[27]
+ PIN din0[28]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 280.16 0.0 280.54 1.06 ;
+ END
+ END din0[28]
+ PIN din0[29]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 285.6 0.0 285.98 1.06 ;
+ END
+ END din0[29]
+ PIN din0[30]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 291.04 0.0 291.42 1.06 ;
+ END
+ END din0[30]
+ PIN din0[31]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 297.84 0.0 298.22 1.06 ;
+ END
+ END din0[31]
+ PIN din0[32]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 303.28 0.0 303.66 1.06 ;
+ END
+ END din0[32]
+ PIN addr0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 80.92 0.0 81.3 1.06 ;
+ END
+ END addr0[0]
+ PIN addr0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 87.72 0.0 88.1 1.06 ;
+ END
+ END addr0[1]
+ PIN addr0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 140.76 1.06 141.14 ;
+ END
+ END addr0[2]
+ PIN addr0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 150.28 1.06 150.66 ;
+ END
+ END addr0[3]
+ PIN addr0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 155.72 1.06 156.1 ;
+ END
+ END addr0[4]
+ PIN addr0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 163.88 1.06 164.26 ;
+ END
+ END addr0[5]
+ PIN addr0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 168.64 1.06 169.02 ;
+ END
+ END addr0[6]
+ PIN addr0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 179.52 1.06 179.9 ;
+ END
+ END addr0[7]
+ PIN addr0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 184.28 1.06 184.66 ;
+ END
+ END addr0[8]
+ PIN addr0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 192.44 1.06 192.82 ;
+ END
+ END addr0[9]
+ PIN csb0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 38.08 1.06 38.46 ;
+ END
+ END csb0
+ PIN web0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 46.24 1.06 46.62 ;
+ END
+ END web0
+ PIN clk0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 38.76 1.06 39.14 ;
+ END
+ END clk0
+ PIN wmask0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 93.16 0.0 93.54 1.06 ;
+ END
+ END wmask0[0]
+ PIN wmask0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 98.6 0.0 98.98 1.06 ;
+ END
+ END wmask0[1]
+ PIN wmask0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 104.72 0.0 105.1 1.06 ;
+ END
+ END wmask0[2]
+ PIN wmask0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 110.84 0.0 111.22 1.06 ;
+ END
+ END wmask0[3]
+ PIN spare_wen0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 308.72 0.0 309.1 1.06 ;
+ END
+ END spare_wen0
+ PIN dout0[0]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 143.48 0.0 143.86 1.06 ;
+ END
+ END dout0[0]
+ PIN dout0[1]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 155.04 0.0 155.42 1.06 ;
+ END
+ END dout0[1]
+ PIN dout0[2]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 165.24 0.0 165.62 1.06 ;
+ END
+ END dout0[2]
+ PIN dout0[3]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 174.76 0.0 175.14 1.06 ;
+ END
+ END dout0[3]
+ PIN dout0[4]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 184.28 0.0 184.66 1.06 ;
+ END
+ END dout0[4]
+ PIN dout0[5]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 195.16 0.0 195.54 1.06 ;
+ END
+ END dout0[5]
+ PIN dout0[6]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 205.36 0.0 205.74 1.06 ;
+ END
+ END dout0[6]
+ PIN dout0[7]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 215.56 0.0 215.94 1.06 ;
+ END
+ END dout0[7]
+ PIN dout0[8]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 223.72 0.0 224.1 1.06 ;
+ END
+ END dout0[8]
+ PIN dout0[9]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 235.28 0.0 235.66 1.06 ;
+ END
+ END dout0[9]
+ PIN dout0[10]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 244.8 0.0 245.18 1.06 ;
+ END
+ END dout0[10]
+ PIN dout0[11]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 254.32 0.0 254.7 1.06 ;
+ END
+ END dout0[11]
+ PIN dout0[12]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 265.2 0.0 265.58 1.06 ;
+ END
+ END dout0[12]
+ PIN dout0[13]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 275.4 0.0 275.78 1.06 ;
+ END
+ END dout0[13]
+ PIN dout0[14]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 283.56 0.0 283.94 1.06 ;
+ END
+ END dout0[14]
+ PIN dout0[15]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 295.12 0.0 295.5 1.06 ;
+ END
+ END dout0[15]
+ PIN dout0[16]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 303.96 0.0 304.34 1.06 ;
+ END
+ END dout0[16]
+ PIN dout0[17]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 315.52 0.0 315.9 1.06 ;
+ END
+ END dout0[17]
+ PIN dout0[18]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 325.04 0.0 325.42 1.06 ;
+ END
+ END dout0[18]
+ PIN dout0[19]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 335.24 0.0 335.62 1.06 ;
+ END
+ END dout0[19]
+ PIN dout0[20]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 345.44 0.0 345.82 1.06 ;
+ END
+ END dout0[20]
+ PIN dout0[21]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 354.96 0.0 355.34 1.06 ;
+ END
+ END dout0[21]
+ PIN dout0[22]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 365.16 0.0 365.54 1.06 ;
+ END
+ END dout0[22]
+ PIN dout0[23]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 375.36 0.0 375.74 1.06 ;
+ END
+ END dout0[23]
+ PIN dout0[24]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 384.2 0.0 384.58 1.06 ;
+ END
+ END dout0[24]
+ PIN dout0[25]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 395.08 0.0 395.46 1.06 ;
+ END
+ END dout0[25]
+ PIN dout0[26]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 405.28 0.0 405.66 1.06 ;
+ END
+ END dout0[26]
+ PIN dout0[27]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 415.48 0.0 415.86 1.06 ;
+ END
+ END dout0[27]
+ PIN dout0[28]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 480.08 67.32 481.14 67.7 ;
+ END
+ END dout0[28]
+ PIN dout0[29]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 480.08 66.64 481.14 67.02 ;
+ END
+ END dout0[29]
+ PIN dout0[30]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 480.08 65.96 481.14 66.34 ;
+ END
+ END dout0[30]
+ PIN dout0[31]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 480.08 61.88 481.14 62.26 ;
+ END
+ END dout0[31]
+ PIN dout0[32]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 480.08 63.92 481.14 64.3 ;
+ END
+ END dout0[32]
+ PIN vccd1
+ DIRECTION INOUT ;
+ USE POWER ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met4 ;
+ RECT 474.64 4.76 476.38 319.3 ;
+ LAYER met3 ;
+ RECT 4.76 4.76 476.38 6.5 ;
+ LAYER met4 ;
+ RECT 4.76 4.76 6.5 319.3 ;
+ LAYER met3 ;
+ RECT 4.76 317.56 476.38 319.3 ;
+ END
+ END vccd1
+ PIN vssd1
+ DIRECTION INOUT ;
+ USE GROUND ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met3 ;
+ RECT 1.36 320.96 479.78 322.7 ;
+ LAYER met4 ;
+ RECT 1.36 1.36 3.1 322.7 ;
+ LAYER met4 ;
+ RECT 478.04 1.36 479.78 322.7 ;
+ LAYER met3 ;
+ RECT 1.36 1.36 479.78 3.1 ;
+ END
+ END vssd1
+ OBS
+ LAYER met1 ;
+ RECT 0.62 0.62 480.52 322.08 ;
+ LAYER met2 ;
+ RECT 0.62 0.62 480.52 322.08 ;
+ LAYER met3 ;
+ RECT 1.66 140.16 480.52 141.74 ;
+ RECT 0.62 141.74 1.66 149.68 ;
+ RECT 0.62 151.26 1.66 155.12 ;
+ RECT 0.62 156.7 1.66 163.28 ;
+ RECT 0.62 164.86 1.66 168.04 ;
+ RECT 0.62 169.62 1.66 178.92 ;
+ RECT 0.62 180.5 1.66 183.68 ;
+ RECT 0.62 185.26 1.66 191.84 ;
+ RECT 0.62 47.22 1.66 140.16 ;
+ RECT 0.62 39.74 1.66 45.64 ;
+ RECT 1.66 66.72 479.48 68.3 ;
+ RECT 1.66 68.3 479.48 140.16 ;
+ RECT 479.48 68.3 480.52 140.16 ;
+ RECT 479.48 62.86 480.52 63.32 ;
+ RECT 479.48 64.9 480.52 65.36 ;
+ RECT 1.66 4.16 4.16 7.1 ;
+ RECT 1.66 7.1 4.16 66.72 ;
+ RECT 4.16 7.1 476.98 66.72 ;
+ RECT 476.98 4.16 479.48 7.1 ;
+ RECT 476.98 7.1 479.48 66.72 ;
+ RECT 1.66 141.74 4.16 316.96 ;
+ RECT 1.66 316.96 4.16 319.9 ;
+ RECT 4.16 141.74 476.98 316.96 ;
+ RECT 476.98 141.74 480.52 316.96 ;
+ RECT 476.98 316.96 480.52 319.9 ;
+ RECT 0.62 193.42 0.76 320.36 ;
+ RECT 0.62 320.36 0.76 322.08 ;
+ RECT 0.76 193.42 1.66 320.36 ;
+ RECT 1.66 319.9 4.16 320.36 ;
+ RECT 4.16 319.9 476.98 320.36 ;
+ RECT 476.98 319.9 480.38 320.36 ;
+ RECT 480.38 319.9 480.52 320.36 ;
+ RECT 480.38 320.36 480.52 322.08 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 3.7 ;
+ RECT 0.62 3.7 0.76 37.48 ;
+ RECT 0.76 0.62 1.66 0.76 ;
+ RECT 0.76 3.7 1.66 37.48 ;
+ RECT 479.48 0.62 480.38 0.76 ;
+ RECT 479.48 3.7 480.38 61.28 ;
+ RECT 480.38 0.62 480.52 0.76 ;
+ RECT 480.38 0.76 480.52 3.7 ;
+ RECT 480.38 3.7 480.52 61.28 ;
+ RECT 1.66 0.62 4.16 0.76 ;
+ RECT 1.66 3.7 4.16 4.16 ;
+ RECT 4.16 0.62 476.98 0.76 ;
+ RECT 4.16 3.7 476.98 4.16 ;
+ RECT 476.98 0.62 479.48 0.76 ;
+ RECT 476.98 3.7 479.48 4.16 ;
+ LAYER met4 ;
+ RECT 115.68 1.66 117.26 322.08 ;
+ RECT 117.26 0.62 121.8 1.66 ;
+ RECT 123.38 0.62 127.24 1.66 ;
+ RECT 128.82 0.62 132.68 1.66 ;
+ RECT 134.26 0.62 139.48 1.66 ;
+ RECT 145.82 0.62 150.36 1.66 ;
+ RECT 158.74 0.62 162.6 1.66 ;
+ RECT 176.42 0.62 179.6 1.66 ;
+ RECT 187.98 0.62 191.84 1.66 ;
+ RECT 199.54 0.62 202.72 1.66 ;
+ RECT 217.22 0.62 221.08 1.66 ;
+ RECT 228.1 0.62 231.96 1.66 ;
+ RECT 246.46 0.62 250.32 1.66 ;
+ RECT 257.34 0.62 261.2 1.66 ;
+ RECT 269.58 0.62 273.44 1.66 ;
+ RECT 286.58 0.62 290.44 1.66 ;
+ RECT 298.82 0.62 302.68 1.66 ;
+ RECT 81.9 0.62 87.12 1.66 ;
+ RECT 88.7 0.62 92.56 1.66 ;
+ RECT 94.14 0.62 98.0 1.66 ;
+ RECT 99.58 0.62 104.12 1.66 ;
+ RECT 105.7 0.62 110.24 1.66 ;
+ RECT 111.82 0.62 115.68 1.66 ;
+ RECT 141.06 0.62 142.88 1.66 ;
+ RECT 151.94 0.62 154.44 1.66 ;
+ RECT 156.02 0.62 157.16 1.66 ;
+ RECT 164.18 0.62 164.64 1.66 ;
+ RECT 166.22 0.62 168.72 1.66 ;
+ RECT 170.3 0.62 174.16 1.66 ;
+ RECT 181.18 0.62 183.68 1.66 ;
+ RECT 185.26 0.62 186.4 1.66 ;
+ RECT 193.42 0.62 194.56 1.66 ;
+ RECT 196.14 0.62 197.96 1.66 ;
+ RECT 204.3 0.62 204.76 1.66 ;
+ RECT 206.34 0.62 208.84 1.66 ;
+ RECT 210.42 0.62 214.96 1.66 ;
+ RECT 222.66 0.62 223.12 1.66 ;
+ RECT 224.7 0.62 226.52 1.66 ;
+ RECT 233.54 0.62 234.68 1.66 ;
+ RECT 236.26 0.62 238.76 1.66 ;
+ RECT 240.34 0.62 244.2 1.66 ;
+ RECT 251.9 0.62 253.72 1.66 ;
+ RECT 255.3 0.62 255.76 1.66 ;
+ RECT 262.78 0.62 264.6 1.66 ;
+ RECT 266.18 0.62 268.0 1.66 ;
+ RECT 276.38 0.62 279.56 1.66 ;
+ RECT 281.14 0.62 282.96 1.66 ;
+ RECT 284.54 0.62 285.0 1.66 ;
+ RECT 292.02 0.62 294.52 1.66 ;
+ RECT 296.1 0.62 297.24 1.66 ;
+ RECT 304.94 0.62 308.12 1.66 ;
+ RECT 309.7 0.62 314.92 1.66 ;
+ RECT 316.5 0.62 324.44 1.66 ;
+ RECT 326.02 0.62 334.64 1.66 ;
+ RECT 336.22 0.62 344.84 1.66 ;
+ RECT 346.42 0.62 354.36 1.66 ;
+ RECT 355.94 0.62 364.56 1.66 ;
+ RECT 366.14 0.62 374.76 1.66 ;
+ RECT 376.34 0.62 383.6 1.66 ;
+ RECT 385.18 0.62 394.48 1.66 ;
+ RECT 396.06 0.62 404.68 1.66 ;
+ RECT 406.26 0.62 414.88 1.66 ;
+ RECT 117.26 1.66 474.04 4.16 ;
+ RECT 117.26 4.16 474.04 319.9 ;
+ RECT 117.26 319.9 474.04 322.08 ;
+ RECT 474.04 1.66 476.98 4.16 ;
+ RECT 474.04 319.9 476.98 322.08 ;
+ RECT 4.16 1.66 7.1 4.16 ;
+ RECT 4.16 319.9 7.1 322.08 ;
+ RECT 7.1 1.66 115.68 4.16 ;
+ RECT 7.1 4.16 115.68 319.9 ;
+ RECT 7.1 319.9 115.68 322.08 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 1.66 ;
+ RECT 0.76 0.62 3.7 0.76 ;
+ RECT 3.7 0.62 80.32 0.76 ;
+ RECT 3.7 0.76 80.32 1.66 ;
+ RECT 0.62 1.66 0.76 4.16 ;
+ RECT 3.7 1.66 4.16 4.16 ;
+ RECT 0.62 4.16 0.76 319.9 ;
+ RECT 3.7 4.16 4.16 319.9 ;
+ RECT 0.62 319.9 0.76 322.08 ;
+ RECT 3.7 319.9 4.16 322.08 ;
+ RECT 416.46 0.62 477.44 0.76 ;
+ RECT 416.46 0.76 477.44 1.66 ;
+ RECT 477.44 0.62 480.38 0.76 ;
+ RECT 480.38 0.62 480.52 0.76 ;
+ RECT 480.38 0.76 480.52 1.66 ;
+ RECT 476.98 1.66 477.44 4.16 ;
+ RECT 480.38 1.66 480.52 4.16 ;
+ RECT 476.98 4.16 477.44 319.9 ;
+ RECT 480.38 4.16 480.52 319.9 ;
+ RECT 476.98 319.9 477.44 322.08 ;
+ RECT 480.38 319.9 480.52 322.08 ;
+ END
+END sky130_sram_2kbyte_1rw_32x512_8
+END LIBRARY
diff --git a/lef/sky130_sram_4kbyte_1rw_32x1024_8.lef b/lef/sky130_sram_4kbyte_1rw_32x1024_8.lef
new file mode 100644
index 0000000..076a877
--- /dev/null
+++ b/lef/sky130_sram_4kbyte_1rw_32x1024_8.lef
@@ -0,0 +1,793 @@
+VERSION 5.4 ;
+NAMESCASESENSITIVE ON ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+UNITS
+ DATABASE MICRONS 2000 ;
+END UNITS
+MACRO sky130_sram_4kbyte_1rw_32x1024_8
+ CLASS BLOCK ;
+ SIZE 806.86 BY 351.26 ;
+ SYMMETRY X Y R90 ;
+ PIN din0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 127.84 0.0 128.22 1.06 ;
+ END
+ END din0[0]
+ PIN din0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 133.28 0.0 133.66 1.06 ;
+ END
+ END din0[1]
+ PIN din0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 138.72 0.0 139.1 1.06 ;
+ END
+ END din0[2]
+ PIN din0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 145.52 0.0 145.9 1.06 ;
+ END
+ END din0[3]
+ PIN din0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 150.96 0.0 151.34 1.06 ;
+ END
+ END din0[4]
+ PIN din0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 156.4 0.0 156.78 1.06 ;
+ END
+ END din0[5]
+ PIN din0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 162.52 0.0 162.9 1.06 ;
+ END
+ END din0[6]
+ PIN din0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 168.64 0.0 169.02 1.06 ;
+ END
+ END din0[7]
+ PIN din0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 174.76 0.0 175.14 1.06 ;
+ END
+ END din0[8]
+ PIN din0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 179.52 0.0 179.9 1.06 ;
+ END
+ END din0[9]
+ PIN din0[10]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 185.64 0.0 186.02 1.06 ;
+ END
+ END din0[10]
+ PIN din0[11]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 192.44 0.0 192.82 1.06 ;
+ END
+ END din0[11]
+ PIN din0[12]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 197.88 0.0 198.26 1.06 ;
+ END
+ END din0[12]
+ PIN din0[13]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 204.0 0.0 204.38 1.06 ;
+ END
+ END din0[13]
+ PIN din0[14]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 209.44 0.0 209.82 1.06 ;
+ END
+ END din0[14]
+ PIN din0[15]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 214.88 0.0 215.26 1.06 ;
+ END
+ END din0[15]
+ PIN din0[16]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 221.68 0.0 222.06 1.06 ;
+ END
+ END din0[16]
+ PIN din0[17]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 227.12 0.0 227.5 1.06 ;
+ END
+ END din0[17]
+ PIN din0[18]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 232.56 0.0 232.94 1.06 ;
+ END
+ END din0[18]
+ PIN din0[19]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 238.0 0.0 238.38 1.06 ;
+ END
+ END din0[19]
+ PIN din0[20]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 244.8 0.0 245.18 1.06 ;
+ END
+ END din0[20]
+ PIN din0[21]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 250.24 0.0 250.62 1.06 ;
+ END
+ END din0[21]
+ PIN din0[22]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 256.36 0.0 256.74 1.06 ;
+ END
+ END din0[22]
+ PIN din0[23]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 261.8 0.0 262.18 1.06 ;
+ END
+ END din0[23]
+ PIN din0[24]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 267.24 0.0 267.62 1.06 ;
+ END
+ END din0[24]
+ PIN din0[25]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 274.04 0.0 274.42 1.06 ;
+ END
+ END din0[25]
+ PIN din0[26]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 278.8 0.0 279.18 1.06 ;
+ END
+ END din0[26]
+ PIN din0[27]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 285.6 0.0 285.98 1.06 ;
+ END
+ END din0[27]
+ PIN din0[28]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 291.04 0.0 291.42 1.06 ;
+ END
+ END din0[28]
+ PIN din0[29]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 296.48 0.0 296.86 1.06 ;
+ END
+ END din0[29]
+ PIN din0[30]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 303.28 0.0 303.66 1.06 ;
+ END
+ END din0[30]
+ PIN din0[31]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 309.4 0.0 309.78 1.06 ;
+ END
+ END din0[31]
+ PIN din0[32]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 314.16 0.0 314.54 1.06 ;
+ END
+ END din0[32]
+ PIN addr0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 86.36 0.0 86.74 1.06 ;
+ END
+ END addr0[0]
+ PIN addr0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 93.16 0.0 93.54 1.06 ;
+ END
+ END addr0[1]
+ PIN addr0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 98.6 0.0 98.98 1.06 ;
+ END
+ END addr0[2]
+ PIN addr0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 168.64 1.06 169.02 ;
+ END
+ END addr0[3]
+ PIN addr0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 176.8 1.06 177.18 ;
+ END
+ END addr0[4]
+ PIN addr0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 184.28 1.06 184.66 ;
+ END
+ END addr0[5]
+ PIN addr0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 192.44 1.06 192.82 ;
+ END
+ END addr0[6]
+ PIN addr0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 197.88 1.06 198.26 ;
+ END
+ END addr0[7]
+ PIN addr0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 206.04 1.06 206.42 ;
+ END
+ END addr0[8]
+ PIN addr0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 212.84 1.06 213.22 ;
+ END
+ END addr0[9]
+ PIN addr0[10]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 221.0 1.06 221.38 ;
+ END
+ END addr0[10]
+ PIN csb0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 66.64 1.06 67.02 ;
+ END
+ END csb0
+ PIN web0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 74.8 1.06 75.18 ;
+ END
+ END web0
+ PIN clk0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 67.32 1.06 67.7 ;
+ END
+ END clk0
+ PIN wmask0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 104.04 0.0 104.42 1.06 ;
+ END
+ END wmask0[0]
+ PIN wmask0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 109.48 0.0 109.86 1.06 ;
+ END
+ END wmask0[1]
+ PIN wmask0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 116.28 0.0 116.66 1.06 ;
+ END
+ END wmask0[2]
+ PIN wmask0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 121.72 0.0 122.1 1.06 ;
+ END
+ END wmask0[3]
+ PIN spare_wen0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 320.28 0.0 320.66 1.06 ;
+ END
+ END spare_wen0
+ PIN dout0[0]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 148.92 0.0 149.3 1.06 ;
+ END
+ END dout0[0]
+ PIN dout0[1]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 170.68 0.0 171.06 1.06 ;
+ END
+ END dout0[1]
+ PIN dout0[2]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 189.72 0.0 190.1 1.06 ;
+ END
+ END dout0[2]
+ PIN dout0[3]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 210.8 0.0 211.18 1.06 ;
+ END
+ END dout0[3]
+ PIN dout0[4]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 230.52 0.0 230.9 1.06 ;
+ END
+ END dout0[4]
+ PIN dout0[5]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 250.92 0.0 251.3 1.06 ;
+ END
+ END dout0[5]
+ PIN dout0[6]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 270.64 0.0 271.02 1.06 ;
+ END
+ END dout0[6]
+ PIN dout0[7]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 289.0 0.0 289.38 1.06 ;
+ END
+ END dout0[7]
+ PIN dout0[8]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 308.72 0.0 309.1 1.06 ;
+ END
+ END dout0[8]
+ PIN dout0[9]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 330.48 0.0 330.86 1.06 ;
+ END
+ END dout0[9]
+ PIN dout0[10]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 350.88 0.0 351.26 1.06 ;
+ END
+ END dout0[10]
+ PIN dout0[11]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 370.6 0.0 370.98 1.06 ;
+ END
+ END dout0[11]
+ PIN dout0[12]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 391.0 0.0 391.38 1.06 ;
+ END
+ END dout0[12]
+ PIN dout0[13]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 410.72 0.0 411.1 1.06 ;
+ END
+ END dout0[13]
+ PIN dout0[14]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 430.44 0.0 430.82 1.06 ;
+ END
+ END dout0[14]
+ PIN dout0[15]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 450.84 0.0 451.22 1.06 ;
+ END
+ END dout0[15]
+ PIN dout0[16]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 469.2 0.0 469.58 1.06 ;
+ END
+ END dout0[16]
+ PIN dout0[17]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 490.96 0.0 491.34 1.06 ;
+ END
+ END dout0[17]
+ PIN dout0[18]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 510.68 0.0 511.06 1.06 ;
+ END
+ END dout0[18]
+ PIN dout0[19]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 530.4 0.0 530.78 1.06 ;
+ END
+ END dout0[19]
+ PIN dout0[20]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 550.8 0.0 551.18 1.06 ;
+ END
+ END dout0[20]
+ PIN dout0[21]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 570.52 0.0 570.9 1.06 ;
+ END
+ END dout0[21]
+ PIN dout0[22]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 590.92 0.0 591.3 1.06 ;
+ END
+ END dout0[22]
+ PIN dout0[23]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 610.64 0.0 611.02 1.06 ;
+ END
+ END dout0[23]
+ PIN dout0[24]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 629.68 0.0 630.06 1.06 ;
+ END
+ END dout0[24]
+ PIN dout0[25]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 650.76 0.0 651.14 1.06 ;
+ END
+ END dout0[25]
+ PIN dout0[26]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 670.48 0.0 670.86 1.06 ;
+ END
+ END dout0[26]
+ PIN dout0[27]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 690.88 0.0 691.26 1.06 ;
+ END
+ END dout0[27]
+ PIN dout0[28]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 710.6 0.0 710.98 1.06 ;
+ END
+ END dout0[28]
+ PIN dout0[29]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 805.8 92.48 806.86 92.86 ;
+ END
+ END dout0[29]
+ PIN dout0[30]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 805.8 91.8 806.86 92.18 ;
+ END
+ END dout0[30]
+ PIN dout0[31]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 805.8 87.04 806.86 87.42 ;
+ END
+ END dout0[31]
+ PIN dout0[32]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 805.8 87.72 806.86 88.1 ;
+ END
+ END dout0[32]
+ PIN vccd1
+ DIRECTION INOUT ;
+ USE POWER ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met3 ;
+ RECT 4.76 346.12 802.1 347.86 ;
+ LAYER met4 ;
+ RECT 4.76 4.76 6.5 347.86 ;
+ LAYER met3 ;
+ RECT 4.76 4.76 802.1 6.5 ;
+ LAYER met4 ;
+ RECT 800.36 4.76 802.1 347.86 ;
+ END
+ END vccd1
+ PIN vssd1
+ DIRECTION INOUT ;
+ USE GROUND ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met4 ;
+ RECT 803.76 1.36 805.5 351.26 ;
+ LAYER met4 ;
+ RECT 1.36 1.36 3.1 351.26 ;
+ LAYER met3 ;
+ RECT 1.36 1.36 805.5 3.1 ;
+ LAYER met3 ;
+ RECT 1.36 349.52 805.5 351.26 ;
+ END
+ END vssd1
+ OBS
+ LAYER met1 ;
+ RECT 0.62 0.62 806.24 350.64 ;
+ LAYER met2 ;
+ RECT 0.62 0.62 806.24 350.64 ;
+ LAYER met3 ;
+ RECT 1.66 168.04 806.24 169.62 ;
+ RECT 0.62 169.62 1.66 176.2 ;
+ RECT 0.62 177.78 1.66 183.68 ;
+ RECT 0.62 185.26 1.66 191.84 ;
+ RECT 0.62 193.42 1.66 197.28 ;
+ RECT 0.62 198.86 1.66 205.44 ;
+ RECT 0.62 207.02 1.66 212.24 ;
+ RECT 0.62 213.82 1.66 220.4 ;
+ RECT 0.62 75.78 1.66 168.04 ;
+ RECT 0.62 68.3 1.66 74.2 ;
+ RECT 1.66 91.88 805.2 93.46 ;
+ RECT 1.66 93.46 805.2 168.04 ;
+ RECT 805.2 93.46 806.24 168.04 ;
+ RECT 805.2 88.7 806.24 91.2 ;
+ RECT 1.66 169.62 4.16 345.52 ;
+ RECT 1.66 345.52 4.16 348.46 ;
+ RECT 4.16 169.62 802.7 345.52 ;
+ RECT 802.7 169.62 806.24 345.52 ;
+ RECT 802.7 345.52 806.24 348.46 ;
+ RECT 1.66 4.16 4.16 7.1 ;
+ RECT 1.66 7.1 4.16 91.88 ;
+ RECT 4.16 7.1 802.7 91.88 ;
+ RECT 802.7 4.16 805.2 7.1 ;
+ RECT 802.7 7.1 805.2 91.88 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 3.7 ;
+ RECT 0.62 3.7 0.76 66.04 ;
+ RECT 0.76 0.62 1.66 0.76 ;
+ RECT 0.76 3.7 1.66 66.04 ;
+ RECT 805.2 0.62 806.1 0.76 ;
+ RECT 805.2 3.7 806.1 86.44 ;
+ RECT 806.1 0.62 806.24 0.76 ;
+ RECT 806.1 0.76 806.24 3.7 ;
+ RECT 806.1 3.7 806.24 86.44 ;
+ RECT 1.66 0.62 4.16 0.76 ;
+ RECT 1.66 3.7 4.16 4.16 ;
+ RECT 4.16 0.62 802.7 0.76 ;
+ RECT 4.16 3.7 802.7 4.16 ;
+ RECT 802.7 0.62 805.2 0.76 ;
+ RECT 802.7 3.7 805.2 4.16 ;
+ RECT 0.62 221.98 0.76 348.92 ;
+ RECT 0.62 348.92 0.76 350.64 ;
+ RECT 0.76 221.98 1.66 348.92 ;
+ RECT 1.66 348.46 4.16 348.92 ;
+ RECT 4.16 348.46 802.7 348.92 ;
+ RECT 802.7 348.46 806.1 348.92 ;
+ RECT 806.1 348.46 806.24 348.92 ;
+ RECT 806.1 348.92 806.24 350.64 ;
+ LAYER met4 ;
+ RECT 127.24 1.66 128.82 350.64 ;
+ RECT 128.82 0.62 132.68 1.66 ;
+ RECT 134.26 0.62 138.12 1.66 ;
+ RECT 139.7 0.62 144.92 1.66 ;
+ RECT 151.94 0.62 155.8 1.66 ;
+ RECT 157.38 0.62 161.92 1.66 ;
+ RECT 163.5 0.62 168.04 1.66 ;
+ RECT 175.74 0.62 178.92 1.66 ;
+ RECT 180.5 0.62 185.04 1.66 ;
+ RECT 193.42 0.62 197.28 1.66 ;
+ RECT 198.86 0.62 203.4 1.66 ;
+ RECT 204.98 0.62 208.84 1.66 ;
+ RECT 215.86 0.62 221.08 1.66 ;
+ RECT 222.66 0.62 226.52 1.66 ;
+ RECT 233.54 0.62 237.4 1.66 ;
+ RECT 238.98 0.62 244.2 1.66 ;
+ RECT 245.78 0.62 249.64 1.66 ;
+ RECT 257.34 0.62 261.2 1.66 ;
+ RECT 262.78 0.62 266.64 1.66 ;
+ RECT 275.02 0.62 278.2 1.66 ;
+ RECT 279.78 0.62 285.0 1.66 ;
+ RECT 292.02 0.62 295.88 1.66 ;
+ RECT 297.46 0.62 302.68 1.66 ;
+ RECT 310.38 0.62 313.56 1.66 ;
+ RECT 87.34 0.62 92.56 1.66 ;
+ RECT 94.14 0.62 98.0 1.66 ;
+ RECT 99.58 0.62 103.44 1.66 ;
+ RECT 105.02 0.62 108.88 1.66 ;
+ RECT 110.46 0.62 115.68 1.66 ;
+ RECT 117.26 0.62 121.12 1.66 ;
+ RECT 122.7 0.62 127.24 1.66 ;
+ RECT 315.14 0.62 319.68 1.66 ;
+ RECT 146.5 0.62 148.32 1.66 ;
+ RECT 149.9 0.62 150.36 1.66 ;
+ RECT 169.62 0.62 170.08 1.66 ;
+ RECT 171.66 0.62 174.16 1.66 ;
+ RECT 186.62 0.62 189.12 1.66 ;
+ RECT 190.7 0.62 191.84 1.66 ;
+ RECT 211.78 0.62 214.28 1.66 ;
+ RECT 228.1 0.62 229.92 1.66 ;
+ RECT 231.5 0.62 231.96 1.66 ;
+ RECT 251.9 0.62 255.76 1.66 ;
+ RECT 268.22 0.62 270.04 1.66 ;
+ RECT 271.62 0.62 273.44 1.66 ;
+ RECT 286.58 0.62 288.4 1.66 ;
+ RECT 289.98 0.62 290.44 1.66 ;
+ RECT 304.26 0.62 308.12 1.66 ;
+ RECT 321.26 0.62 329.88 1.66 ;
+ RECT 331.46 0.62 350.28 1.66 ;
+ RECT 351.86 0.62 370.0 1.66 ;
+ RECT 371.58 0.62 390.4 1.66 ;
+ RECT 391.98 0.62 410.12 1.66 ;
+ RECT 411.7 0.62 429.84 1.66 ;
+ RECT 431.42 0.62 450.24 1.66 ;
+ RECT 451.82 0.62 468.6 1.66 ;
+ RECT 470.18 0.62 490.36 1.66 ;
+ RECT 491.94 0.62 510.08 1.66 ;
+ RECT 511.66 0.62 529.8 1.66 ;
+ RECT 531.38 0.62 550.2 1.66 ;
+ RECT 551.78 0.62 569.92 1.66 ;
+ RECT 571.5 0.62 590.32 1.66 ;
+ RECT 591.9 0.62 610.04 1.66 ;
+ RECT 611.62 0.62 629.08 1.66 ;
+ RECT 630.66 0.62 650.16 1.66 ;
+ RECT 651.74 0.62 669.88 1.66 ;
+ RECT 671.46 0.62 690.28 1.66 ;
+ RECT 691.86 0.62 710.0 1.66 ;
+ RECT 4.16 1.66 7.1 4.16 ;
+ RECT 4.16 348.46 7.1 350.64 ;
+ RECT 7.1 1.66 127.24 4.16 ;
+ RECT 7.1 4.16 127.24 348.46 ;
+ RECT 7.1 348.46 127.24 350.64 ;
+ RECT 128.82 1.66 799.76 4.16 ;
+ RECT 128.82 4.16 799.76 348.46 ;
+ RECT 128.82 348.46 799.76 350.64 ;
+ RECT 799.76 1.66 802.7 4.16 ;
+ RECT 799.76 348.46 802.7 350.64 ;
+ RECT 711.58 0.62 803.16 0.76 ;
+ RECT 711.58 0.76 803.16 1.66 ;
+ RECT 803.16 0.62 806.1 0.76 ;
+ RECT 806.1 0.62 806.24 0.76 ;
+ RECT 806.1 0.76 806.24 1.66 ;
+ RECT 802.7 1.66 803.16 4.16 ;
+ RECT 806.1 1.66 806.24 4.16 ;
+ RECT 802.7 4.16 803.16 348.46 ;
+ RECT 806.1 4.16 806.24 348.46 ;
+ RECT 802.7 348.46 803.16 350.64 ;
+ RECT 806.1 348.46 806.24 350.64 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 1.66 ;
+ RECT 0.76 0.62 3.7 0.76 ;
+ RECT 3.7 0.62 85.76 0.76 ;
+ RECT 3.7 0.76 85.76 1.66 ;
+ RECT 0.62 1.66 0.76 4.16 ;
+ RECT 3.7 1.66 4.16 4.16 ;
+ RECT 0.62 4.16 0.76 348.46 ;
+ RECT 3.7 4.16 4.16 348.46 ;
+ RECT 0.62 348.46 0.76 350.64 ;
+ RECT 3.7 348.46 4.16 350.64 ;
+ END
+END sky130_sram_4kbyte_1rw_32x1024_8
+END LIBRARY
diff --git a/lef/sky130_sram_4kbyte_1rw_64x512_8.lef b/lef/sky130_sram_4kbyte_1rw_64x512_8.lef
new file mode 100644
index 0000000..ffc008e
--- /dev/null
+++ b/lef/sky130_sram_4kbyte_1rw_64x512_8.lef
@@ -0,0 +1,1317 @@
+VERSION 5.4 ;
+NAMESCASESENSITIVE ON ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+UNITS
+ DATABASE MICRONS 2000 ;
+END UNITS
+MACRO sky130_sram_4kbyte_1rw_64x512_8
+ CLASS BLOCK ;
+ SIZE 828.62 BY 339.02 ;
+ SYMMETRY X Y R90 ;
+ PIN din0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 167.28 0.0 167.66 1.06 ;
+ END
+ END din0[0]
+ PIN din0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 172.72 0.0 173.1 1.06 ;
+ END
+ END din0[1]
+ PIN din0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 178.16 0.0 178.54 1.06 ;
+ END
+ END din0[2]
+ PIN din0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 184.28 0.0 184.66 1.06 ;
+ END
+ END din0[3]
+ PIN din0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 189.72 0.0 190.1 1.06 ;
+ END
+ END din0[4]
+ PIN din0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 196.52 0.0 196.9 1.06 ;
+ END
+ END din0[5]
+ PIN din0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 202.64 0.0 203.02 1.06 ;
+ END
+ END din0[6]
+ PIN din0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 207.4 0.0 207.78 1.06 ;
+ END
+ END din0[7]
+ PIN din0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 214.2 0.0 214.58 1.06 ;
+ END
+ END din0[8]
+ PIN din0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 219.64 0.0 220.02 1.06 ;
+ END
+ END din0[9]
+ PIN din0[10]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 225.08 0.0 225.46 1.06 ;
+ END
+ END din0[10]
+ PIN din0[11]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 231.88 0.0 232.26 1.06 ;
+ END
+ END din0[11]
+ PIN din0[12]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 236.64 0.0 237.02 1.06 ;
+ END
+ END din0[12]
+ PIN din0[13]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 243.44 0.0 243.82 1.06 ;
+ END
+ END din0[13]
+ PIN din0[14]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 248.88 0.0 249.26 1.06 ;
+ END
+ END din0[14]
+ PIN din0[15]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 254.32 0.0 254.7 1.06 ;
+ END
+ END din0[15]
+ PIN din0[16]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 259.76 0.0 260.14 1.06 ;
+ END
+ END din0[16]
+ PIN din0[17]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 265.88 0.0 266.26 1.06 ;
+ END
+ END din0[17]
+ PIN din0[18]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 272.68 0.0 273.06 1.06 ;
+ END
+ END din0[18]
+ PIN din0[19]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 278.12 0.0 278.5 1.06 ;
+ END
+ END din0[19]
+ PIN din0[20]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 283.56 0.0 283.94 1.06 ;
+ END
+ END din0[20]
+ PIN din0[21]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 289.0 0.0 289.38 1.06 ;
+ END
+ END din0[21]
+ PIN din0[22]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 295.8 0.0 296.18 1.06 ;
+ END
+ END din0[22]
+ PIN din0[23]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 301.24 0.0 301.62 1.06 ;
+ END
+ END din0[23]
+ PIN din0[24]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 306.68 0.0 307.06 1.06 ;
+ END
+ END din0[24]
+ PIN din0[25]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 312.8 0.0 313.18 1.06 ;
+ END
+ END din0[25]
+ PIN din0[26]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 318.24 0.0 318.62 1.06 ;
+ END
+ END din0[26]
+ PIN din0[27]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 325.04 0.0 325.42 1.06 ;
+ END
+ END din0[27]
+ PIN din0[28]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 331.16 0.0 331.54 1.06 ;
+ END
+ END din0[28]
+ PIN din0[29]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 335.92 0.0 336.3 1.06 ;
+ END
+ END din0[29]
+ PIN din0[30]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 342.04 0.0 342.42 1.06 ;
+ END
+ END din0[30]
+ PIN din0[31]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 347.48 0.0 347.86 1.06 ;
+ END
+ END din0[31]
+ PIN din0[32]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 354.28 0.0 354.66 1.06 ;
+ END
+ END din0[32]
+ PIN din0[33]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 359.72 0.0 360.1 1.06 ;
+ END
+ END din0[33]
+ PIN din0[34]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 365.16 0.0 365.54 1.06 ;
+ END
+ END din0[34]
+ PIN din0[35]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 371.96 0.0 372.34 1.06 ;
+ END
+ END din0[35]
+ PIN din0[36]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 377.4 0.0 377.78 1.06 ;
+ END
+ END din0[36]
+ PIN din0[37]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 382.84 0.0 383.22 1.06 ;
+ END
+ END din0[37]
+ PIN din0[38]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 388.28 0.0 388.66 1.06 ;
+ END
+ END din0[38]
+ PIN din0[39]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 394.4 0.0 394.78 1.06 ;
+ END
+ END din0[39]
+ PIN din0[40]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 401.2 0.0 401.58 1.06 ;
+ END
+ END din0[40]
+ PIN din0[41]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 406.64 0.0 407.02 1.06 ;
+ END
+ END din0[41]
+ PIN din0[42]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 412.08 0.0 412.46 1.06 ;
+ END
+ END din0[42]
+ PIN din0[43]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 417.52 0.0 417.9 1.06 ;
+ END
+ END din0[43]
+ PIN din0[44]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 423.64 0.0 424.02 1.06 ;
+ END
+ END din0[44]
+ PIN din0[45]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 430.44 0.0 430.82 1.06 ;
+ END
+ END din0[45]
+ PIN din0[46]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 435.88 0.0 436.26 1.06 ;
+ END
+ END din0[46]
+ PIN din0[47]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 441.32 0.0 441.7 1.06 ;
+ END
+ END din0[47]
+ PIN din0[48]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 446.76 0.0 447.14 1.06 ;
+ END
+ END din0[48]
+ PIN din0[49]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 453.56 0.0 453.94 1.06 ;
+ END
+ END din0[49]
+ PIN din0[50]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 459.0 0.0 459.38 1.06 ;
+ END
+ END din0[50]
+ PIN din0[51]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 464.44 0.0 464.82 1.06 ;
+ END
+ END din0[51]
+ PIN din0[52]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 471.24 0.0 471.62 1.06 ;
+ END
+ END din0[52]
+ PIN din0[53]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 476.0 0.0 476.38 1.06 ;
+ END
+ END din0[53]
+ PIN din0[54]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 482.8 0.0 483.18 1.06 ;
+ END
+ END din0[54]
+ PIN din0[55]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 488.24 0.0 488.62 1.06 ;
+ END
+ END din0[55]
+ PIN din0[56]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 493.68 0.0 494.06 1.06 ;
+ END
+ END din0[56]
+ PIN din0[57]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 499.12 0.0 499.5 1.06 ;
+ END
+ END din0[57]
+ PIN din0[58]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 505.24 0.0 505.62 1.06 ;
+ END
+ END din0[58]
+ PIN din0[59]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 512.04 0.0 512.42 1.06 ;
+ END
+ END din0[59]
+ PIN din0[60]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 517.48 0.0 517.86 1.06 ;
+ END
+ END din0[60]
+ PIN din0[61]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 522.92 0.0 523.3 1.06 ;
+ END
+ END din0[61]
+ PIN din0[62]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 529.72 0.0 530.1 1.06 ;
+ END
+ END din0[62]
+ PIN din0[63]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 535.16 0.0 535.54 1.06 ;
+ END
+ END din0[63]
+ PIN din0[64]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 540.6 0.0 540.98 1.06 ;
+ END
+ END din0[64]
+ PIN addr0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 108.12 0.0 108.5 1.06 ;
+ END
+ END addr0[0]
+ PIN addr0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 114.92 0.0 115.3 1.06 ;
+ END
+ END addr0[1]
+ PIN addr0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 157.08 1.06 157.46 ;
+ END
+ END addr0[2]
+ PIN addr0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 166.6 1.06 166.98 ;
+ END
+ END addr0[3]
+ PIN addr0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 172.04 1.06 172.42 ;
+ END
+ END addr0[4]
+ PIN addr0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 180.2 1.06 180.58 ;
+ END
+ END addr0[5]
+ PIN addr0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 185.64 1.06 186.02 ;
+ END
+ END addr0[6]
+ PIN addr0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 194.48 1.06 194.86 ;
+ END
+ END addr0[7]
+ PIN addr0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 200.6 1.06 200.98 ;
+ END
+ END addr0[8]
+ PIN addr0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 208.76 1.06 209.14 ;
+ END
+ END addr0[9]
+ PIN csb0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 54.4 1.06 54.78 ;
+ END
+ END csb0
+ PIN web0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 63.24 1.06 63.62 ;
+ END
+ END web0
+ PIN clk0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 55.08 1.06 55.46 ;
+ END
+ END clk0
+ PIN wmask0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 120.36 0.0 120.74 1.06 ;
+ END
+ END wmask0[0]
+ PIN wmask0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 125.8 0.0 126.18 1.06 ;
+ END
+ END wmask0[1]
+ PIN wmask0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 132.6 0.0 132.98 1.06 ;
+ END
+ END wmask0[2]
+ PIN wmask0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 138.04 0.0 138.42 1.06 ;
+ END
+ END wmask0[3]
+ PIN wmask0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 143.48 0.0 143.86 1.06 ;
+ END
+ END wmask0[4]
+ PIN wmask0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 148.92 0.0 149.3 1.06 ;
+ END
+ END wmask0[5]
+ PIN wmask0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 155.04 0.0 155.42 1.06 ;
+ END
+ END wmask0[6]
+ PIN wmask0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 160.48 0.0 160.86 1.06 ;
+ END
+ END wmask0[7]
+ PIN spare_wen0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 546.04 0.0 546.42 1.06 ;
+ END
+ END spare_wen0
+ PIN dout0[0]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 170.68 0.0 171.06 1.06 ;
+ END
+ END dout0[0]
+ PIN dout0[1]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 182.24 0.0 182.62 1.06 ;
+ END
+ END dout0[1]
+ PIN dout0[2]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 192.44 0.0 192.82 1.06 ;
+ END
+ END dout0[2]
+ PIN dout0[3]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 201.96 0.0 202.34 1.06 ;
+ END
+ END dout0[3]
+ PIN dout0[4]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 211.48 0.0 211.86 1.06 ;
+ END
+ END dout0[4]
+ PIN dout0[5]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 222.36 0.0 222.74 1.06 ;
+ END
+ END dout0[5]
+ PIN dout0[6]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 232.56 0.0 232.94 1.06 ;
+ END
+ END dout0[6]
+ PIN dout0[7]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 242.76 0.0 243.14 1.06 ;
+ END
+ END dout0[7]
+ PIN dout0[8]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 250.92 0.0 251.3 1.06 ;
+ END
+ END dout0[8]
+ PIN dout0[9]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 262.48 0.0 262.86 1.06 ;
+ END
+ END dout0[9]
+ PIN dout0[10]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 272.0 0.0 272.38 1.06 ;
+ END
+ END dout0[10]
+ PIN dout0[11]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 281.52 0.0 281.9 1.06 ;
+ END
+ END dout0[11]
+ PIN dout0[12]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 292.4 0.0 292.78 1.06 ;
+ END
+ END dout0[12]
+ PIN dout0[13]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 302.6 0.0 302.98 1.06 ;
+ END
+ END dout0[13]
+ PIN dout0[14]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 310.76 0.0 311.14 1.06 ;
+ END
+ END dout0[14]
+ PIN dout0[15]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 322.32 0.0 322.7 1.06 ;
+ END
+ END dout0[15]
+ PIN dout0[16]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 330.48 0.0 330.86 1.06 ;
+ END
+ END dout0[16]
+ PIN dout0[17]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 342.72 0.0 343.1 1.06 ;
+ END
+ END dout0[17]
+ PIN dout0[18]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 351.56 0.0 351.94 1.06 ;
+ END
+ END dout0[18]
+ PIN dout0[19]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 362.44 0.0 362.82 1.06 ;
+ END
+ END dout0[19]
+ PIN dout0[20]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 372.64 0.0 373.02 1.06 ;
+ END
+ END dout0[20]
+ PIN dout0[21]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 380.8 0.0 381.18 1.06 ;
+ END
+ END dout0[21]
+ PIN dout0[22]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 392.36 0.0 392.74 1.06 ;
+ END
+ END dout0[22]
+ PIN dout0[23]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 402.56 0.0 402.94 1.06 ;
+ END
+ END dout0[23]
+ PIN dout0[24]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 410.04 0.0 410.42 1.06 ;
+ END
+ END dout0[24]
+ PIN dout0[25]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 421.6 0.0 421.98 1.06 ;
+ END
+ END dout0[25]
+ PIN dout0[26]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 432.48 0.0 432.86 1.06 ;
+ END
+ END dout0[26]
+ PIN dout0[27]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 442.68 0.0 443.06 1.06 ;
+ END
+ END dout0[27]
+ PIN dout0[28]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 452.88 0.0 453.26 1.06 ;
+ END
+ END dout0[28]
+ PIN dout0[29]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 462.4 0.0 462.78 1.06 ;
+ END
+ END dout0[29]
+ PIN dout0[30]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 472.6 0.0 472.98 1.06 ;
+ END
+ END dout0[30]
+ PIN dout0[31]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 482.12 0.0 482.5 1.06 ;
+ END
+ END dout0[31]
+ PIN dout0[32]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 490.96 0.0 491.34 1.06 ;
+ END
+ END dout0[32]
+ PIN dout0[33]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 502.52 0.0 502.9 1.06 ;
+ END
+ END dout0[33]
+ PIN dout0[34]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 512.72 0.0 513.1 1.06 ;
+ END
+ END dout0[34]
+ PIN dout0[35]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 520.88 0.0 521.26 1.06 ;
+ END
+ END dout0[35]
+ PIN dout0[36]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 532.44 0.0 532.82 1.06 ;
+ END
+ END dout0[36]
+ PIN dout0[37]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 542.64 0.0 543.02 1.06 ;
+ END
+ END dout0[37]
+ PIN dout0[38]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 552.84 0.0 553.22 1.06 ;
+ END
+ END dout0[38]
+ PIN dout0[39]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 562.36 0.0 562.74 1.06 ;
+ END
+ END dout0[39]
+ PIN dout0[40]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 571.2 0.0 571.58 1.06 ;
+ END
+ END dout0[40]
+ PIN dout0[41]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 582.08 0.0 582.46 1.06 ;
+ END
+ END dout0[41]
+ PIN dout0[42]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 592.28 0.0 592.66 1.06 ;
+ END
+ END dout0[42]
+ PIN dout0[43]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 602.48 0.0 602.86 1.06 ;
+ END
+ END dout0[43]
+ PIN dout0[44]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 612.68 0.0 613.06 1.06 ;
+ END
+ END dout0[44]
+ PIN dout0[45]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 622.88 0.0 623.26 1.06 ;
+ END
+ END dout0[45]
+ PIN dout0[46]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 632.4 0.0 632.78 1.06 ;
+ END
+ END dout0[46]
+ PIN dout0[47]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 642.6 0.0 642.98 1.06 ;
+ END
+ END dout0[47]
+ PIN dout0[48]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 651.44 0.0 651.82 1.06 ;
+ END
+ END dout0[48]
+ PIN dout0[49]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 662.32 0.0 662.7 1.06 ;
+ END
+ END dout0[49]
+ PIN dout0[50]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 672.52 0.0 672.9 1.06 ;
+ END
+ END dout0[50]
+ PIN dout0[51]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 682.72 0.0 683.1 1.06 ;
+ END
+ END dout0[51]
+ PIN dout0[52]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 692.24 0.0 692.62 1.06 ;
+ END
+ END dout0[52]
+ PIN dout0[53]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 702.44 0.0 702.82 1.06 ;
+ END
+ END dout0[53]
+ PIN dout0[54]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 712.64 0.0 713.02 1.06 ;
+ END
+ END dout0[54]
+ PIN dout0[55]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 722.16 0.0 722.54 1.06 ;
+ END
+ END dout0[55]
+ PIN dout0[56]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 731.0 0.0 731.38 1.06 ;
+ END
+ END dout0[56]
+ PIN dout0[57]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 742.56 0.0 742.94 1.06 ;
+ END
+ END dout0[57]
+ PIN dout0[58]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 752.76 0.0 753.14 1.06 ;
+ END
+ END dout0[58]
+ PIN dout0[59]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 827.56 83.64 828.62 84.02 ;
+ END
+ END dout0[59]
+ PIN dout0[60]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 827.56 78.88 828.62 79.26 ;
+ END
+ END dout0[60]
+ PIN dout0[61]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 827.56 82.96 828.62 83.34 ;
+ END
+ END dout0[61]
+ PIN dout0[62]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 827.56 76.84 828.62 77.22 ;
+ END
+ END dout0[62]
+ PIN dout0[63]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 827.56 82.28 828.62 82.66 ;
+ END
+ END dout0[63]
+ PIN dout0[64]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 827.56 80.24 828.62 80.62 ;
+ END
+ END dout0[64]
+ PIN vccd1
+ DIRECTION INOUT ;
+ USE POWER ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met4 ;
+ RECT 822.12 4.76 823.86 335.62 ;
+ LAYER met3 ;
+ RECT 4.76 4.76 823.86 6.5 ;
+ LAYER met4 ;
+ RECT 4.76 4.76 6.5 335.62 ;
+ LAYER met3 ;
+ RECT 4.76 333.88 823.86 335.62 ;
+ END
+ END vccd1
+ PIN vssd1
+ DIRECTION INOUT ;
+ USE GROUND ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met3 ;
+ RECT 1.36 337.28 827.26 339.02 ;
+ LAYER met4 ;
+ RECT 825.52 1.36 827.26 339.02 ;
+ LAYER met3 ;
+ RECT 1.36 1.36 827.26 3.1 ;
+ LAYER met4 ;
+ RECT 1.36 1.36 3.1 339.02 ;
+ END
+ END vssd1
+ OBS
+ LAYER met1 ;
+ RECT 0.62 0.62 828.0 338.4 ;
+ LAYER met2 ;
+ RECT 0.62 0.62 828.0 338.4 ;
+ LAYER met3 ;
+ RECT 1.66 156.48 828.0 158.06 ;
+ RECT 0.62 158.06 1.66 166.0 ;
+ RECT 0.62 167.58 1.66 171.44 ;
+ RECT 0.62 173.02 1.66 179.6 ;
+ RECT 0.62 181.18 1.66 185.04 ;
+ RECT 0.62 186.62 1.66 193.88 ;
+ RECT 0.62 195.46 1.66 200.0 ;
+ RECT 0.62 201.58 1.66 208.16 ;
+ RECT 0.62 64.22 1.66 156.48 ;
+ RECT 0.62 56.06 1.66 62.64 ;
+ RECT 1.66 83.04 826.96 84.62 ;
+ RECT 1.66 84.62 826.96 156.48 ;
+ RECT 826.96 84.62 828.0 156.48 ;
+ RECT 826.96 77.82 828.0 78.28 ;
+ RECT 826.96 81.22 828.0 81.68 ;
+ RECT 1.66 4.16 4.16 7.1 ;
+ RECT 1.66 7.1 4.16 83.04 ;
+ RECT 4.16 7.1 824.46 83.04 ;
+ RECT 824.46 4.16 826.96 7.1 ;
+ RECT 824.46 7.1 826.96 83.04 ;
+ RECT 1.66 158.06 4.16 333.28 ;
+ RECT 1.66 333.28 4.16 336.22 ;
+ RECT 4.16 158.06 824.46 333.28 ;
+ RECT 824.46 158.06 828.0 333.28 ;
+ RECT 824.46 333.28 828.0 336.22 ;
+ RECT 0.62 209.74 0.76 336.68 ;
+ RECT 0.62 336.68 0.76 338.4 ;
+ RECT 0.76 209.74 1.66 336.68 ;
+ RECT 1.66 336.22 4.16 336.68 ;
+ RECT 4.16 336.22 824.46 336.68 ;
+ RECT 824.46 336.22 827.86 336.68 ;
+ RECT 827.86 336.22 828.0 336.68 ;
+ RECT 827.86 336.68 828.0 338.4 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 3.7 ;
+ RECT 0.62 3.7 0.76 53.8 ;
+ RECT 0.76 0.62 1.66 0.76 ;
+ RECT 0.76 3.7 1.66 53.8 ;
+ RECT 826.96 0.62 827.86 0.76 ;
+ RECT 826.96 3.7 827.86 76.24 ;
+ RECT 827.86 0.62 828.0 0.76 ;
+ RECT 827.86 0.76 828.0 3.7 ;
+ RECT 827.86 3.7 828.0 76.24 ;
+ RECT 1.66 0.62 4.16 0.76 ;
+ RECT 1.66 3.7 4.16 4.16 ;
+ RECT 4.16 0.62 824.46 0.76 ;
+ RECT 4.16 3.7 824.46 4.16 ;
+ RECT 824.46 0.62 826.96 0.76 ;
+ RECT 824.46 3.7 826.96 4.16 ;
+ LAYER met4 ;
+ RECT 166.68 1.66 168.26 338.4 ;
+ RECT 173.7 0.62 177.56 1.66 ;
+ RECT 185.26 0.62 189.12 1.66 ;
+ RECT 203.62 0.62 206.8 1.66 ;
+ RECT 215.18 0.62 219.04 1.66 ;
+ RECT 226.06 0.62 231.28 1.66 ;
+ RECT 244.42 0.62 248.28 1.66 ;
+ RECT 255.3 0.62 259.16 1.66 ;
+ RECT 273.66 0.62 277.52 1.66 ;
+ RECT 284.54 0.62 288.4 1.66 ;
+ RECT 296.78 0.62 300.64 1.66 ;
+ RECT 313.78 0.62 317.64 1.66 ;
+ RECT 332.14 0.62 335.32 1.66 ;
+ RECT 336.9 0.62 341.44 1.66 ;
+ RECT 355.26 0.62 359.12 1.66 ;
+ RECT 366.14 0.62 371.36 1.66 ;
+ RECT 383.82 0.62 387.68 1.66 ;
+ RECT 395.38 0.62 400.6 1.66 ;
+ RECT 413.06 0.62 416.92 1.66 ;
+ RECT 424.62 0.62 429.84 1.66 ;
+ RECT 436.86 0.62 440.72 1.66 ;
+ RECT 454.54 0.62 458.4 1.66 ;
+ RECT 465.42 0.62 470.64 1.66 ;
+ RECT 483.78 0.62 487.64 1.66 ;
+ RECT 494.66 0.62 498.52 1.66 ;
+ RECT 506.22 0.62 511.44 1.66 ;
+ RECT 523.9 0.62 529.12 1.66 ;
+ RECT 536.14 0.62 540.0 1.66 ;
+ RECT 109.1 0.62 114.32 1.66 ;
+ RECT 115.9 0.62 119.76 1.66 ;
+ RECT 121.34 0.62 125.2 1.66 ;
+ RECT 126.78 0.62 132.0 1.66 ;
+ RECT 133.58 0.62 137.44 1.66 ;
+ RECT 139.02 0.62 142.88 1.66 ;
+ RECT 144.46 0.62 148.32 1.66 ;
+ RECT 149.9 0.62 154.44 1.66 ;
+ RECT 156.02 0.62 159.88 1.66 ;
+ RECT 161.46 0.62 166.68 1.66 ;
+ RECT 168.26 0.62 170.08 1.66 ;
+ RECT 171.66 0.62 172.12 1.66 ;
+ RECT 179.14 0.62 181.64 1.66 ;
+ RECT 183.22 0.62 183.68 1.66 ;
+ RECT 190.7 0.62 191.84 1.66 ;
+ RECT 193.42 0.62 195.92 1.66 ;
+ RECT 197.5 0.62 201.36 1.66 ;
+ RECT 208.38 0.62 210.88 1.66 ;
+ RECT 212.46 0.62 213.6 1.66 ;
+ RECT 220.62 0.62 221.76 1.66 ;
+ RECT 223.34 0.62 224.48 1.66 ;
+ RECT 233.54 0.62 236.04 1.66 ;
+ RECT 237.62 0.62 242.16 1.66 ;
+ RECT 249.86 0.62 250.32 1.66 ;
+ RECT 251.9 0.62 253.72 1.66 ;
+ RECT 260.74 0.62 261.88 1.66 ;
+ RECT 263.46 0.62 265.28 1.66 ;
+ RECT 266.86 0.62 271.4 1.66 ;
+ RECT 279.1 0.62 280.92 1.66 ;
+ RECT 282.5 0.62 282.96 1.66 ;
+ RECT 289.98 0.62 291.8 1.66 ;
+ RECT 293.38 0.62 295.2 1.66 ;
+ RECT 303.58 0.62 306.08 1.66 ;
+ RECT 307.66 0.62 310.16 1.66 ;
+ RECT 311.74 0.62 312.2 1.66 ;
+ RECT 319.22 0.62 321.72 1.66 ;
+ RECT 323.3 0.62 324.44 1.66 ;
+ RECT 326.02 0.62 329.88 1.66 ;
+ RECT 343.7 0.62 346.88 1.66 ;
+ RECT 348.46 0.62 350.96 1.66 ;
+ RECT 352.54 0.62 353.68 1.66 ;
+ RECT 360.7 0.62 361.84 1.66 ;
+ RECT 363.42 0.62 364.56 1.66 ;
+ RECT 373.62 0.62 376.8 1.66 ;
+ RECT 378.38 0.62 380.2 1.66 ;
+ RECT 381.78 0.62 382.24 1.66 ;
+ RECT 389.26 0.62 391.76 1.66 ;
+ RECT 393.34 0.62 393.8 1.66 ;
+ RECT 403.54 0.62 406.04 1.66 ;
+ RECT 407.62 0.62 409.44 1.66 ;
+ RECT 411.02 0.62 411.48 1.66 ;
+ RECT 418.5 0.62 421.0 1.66 ;
+ RECT 422.58 0.62 423.04 1.66 ;
+ RECT 431.42 0.62 431.88 1.66 ;
+ RECT 433.46 0.62 435.28 1.66 ;
+ RECT 443.66 0.62 446.16 1.66 ;
+ RECT 447.74 0.62 452.28 1.66 ;
+ RECT 459.98 0.62 461.8 1.66 ;
+ RECT 463.38 0.62 463.84 1.66 ;
+ RECT 473.58 0.62 475.4 1.66 ;
+ RECT 476.98 0.62 481.52 1.66 ;
+ RECT 489.22 0.62 490.36 1.66 ;
+ RECT 491.94 0.62 493.08 1.66 ;
+ RECT 500.1 0.62 501.92 1.66 ;
+ RECT 503.5 0.62 504.64 1.66 ;
+ RECT 513.7 0.62 516.88 1.66 ;
+ RECT 518.46 0.62 520.28 1.66 ;
+ RECT 521.86 0.62 522.32 1.66 ;
+ RECT 530.7 0.62 531.84 1.66 ;
+ RECT 533.42 0.62 534.56 1.66 ;
+ RECT 541.58 0.62 542.04 1.66 ;
+ RECT 543.62 0.62 545.44 1.66 ;
+ RECT 547.02 0.62 552.24 1.66 ;
+ RECT 553.82 0.62 561.76 1.66 ;
+ RECT 563.34 0.62 570.6 1.66 ;
+ RECT 572.18 0.62 581.48 1.66 ;
+ RECT 583.06 0.62 591.68 1.66 ;
+ RECT 593.26 0.62 601.88 1.66 ;
+ RECT 603.46 0.62 612.08 1.66 ;
+ RECT 613.66 0.62 622.28 1.66 ;
+ RECT 623.86 0.62 631.8 1.66 ;
+ RECT 633.38 0.62 642.0 1.66 ;
+ RECT 643.58 0.62 650.84 1.66 ;
+ RECT 652.42 0.62 661.72 1.66 ;
+ RECT 663.3 0.62 671.92 1.66 ;
+ RECT 673.5 0.62 682.12 1.66 ;
+ RECT 683.7 0.62 691.64 1.66 ;
+ RECT 693.22 0.62 701.84 1.66 ;
+ RECT 703.42 0.62 712.04 1.66 ;
+ RECT 713.62 0.62 721.56 1.66 ;
+ RECT 723.14 0.62 730.4 1.66 ;
+ RECT 731.98 0.62 741.96 1.66 ;
+ RECT 743.54 0.62 752.16 1.66 ;
+ RECT 168.26 1.66 821.52 4.16 ;
+ RECT 168.26 4.16 821.52 336.22 ;
+ RECT 168.26 336.22 821.52 338.4 ;
+ RECT 821.52 1.66 824.46 4.16 ;
+ RECT 821.52 336.22 824.46 338.4 ;
+ RECT 4.16 1.66 7.1 4.16 ;
+ RECT 4.16 336.22 7.1 338.4 ;
+ RECT 7.1 1.66 166.68 4.16 ;
+ RECT 7.1 4.16 166.68 336.22 ;
+ RECT 7.1 336.22 166.68 338.4 ;
+ RECT 753.74 0.62 824.92 0.76 ;
+ RECT 753.74 0.76 824.92 1.66 ;
+ RECT 824.92 0.62 827.86 0.76 ;
+ RECT 827.86 0.62 828.0 0.76 ;
+ RECT 827.86 0.76 828.0 1.66 ;
+ RECT 824.46 1.66 824.92 4.16 ;
+ RECT 827.86 1.66 828.0 4.16 ;
+ RECT 824.46 4.16 824.92 336.22 ;
+ RECT 827.86 4.16 828.0 336.22 ;
+ RECT 824.46 336.22 824.92 338.4 ;
+ RECT 827.86 336.22 828.0 338.4 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 1.66 ;
+ RECT 0.76 0.62 3.7 0.76 ;
+ RECT 3.7 0.62 107.52 0.76 ;
+ RECT 3.7 0.76 107.52 1.66 ;
+ RECT 0.62 1.66 0.76 4.16 ;
+ RECT 3.7 1.66 4.16 4.16 ;
+ RECT 0.62 4.16 0.76 336.22 ;
+ RECT 3.7 4.16 4.16 336.22 ;
+ RECT 0.62 336.22 0.76 338.4 ;
+ RECT 3.7 336.22 4.16 338.4 ;
+ END
+END sky130_sram_4kbyte_1rw_64x512_8
+END LIBRARY
diff --git a/lef/sky130_sram_8kbyte_1rw_64x1024_8.lef b/lef/sky130_sram_8kbyte_1rw_64x1024_8.lef
new file mode 100644
index 0000000..be7a6ab
--- /dev/null
+++ b/lef/sky130_sram_8kbyte_1rw_64x1024_8.lef
@@ -0,0 +1,1322 @@
+VERSION 5.4 ;
+NAMESCASESENSITIVE ON ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+UNITS
+ DATABASE MICRONS 2000 ;
+END UNITS
+MACRO sky130_sram_8kbyte_1rw_64x1024_8
+ CLASS BLOCK ;
+ SIZE 830.66 BY 541.66 ;
+ SYMMETRY X Y R90 ;
+ PIN din0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 167.28 0.0 167.66 1.06 ;
+ END
+ END din0[0]
+ PIN din0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 172.72 0.0 173.1 1.06 ;
+ END
+ END din0[1]
+ PIN din0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 178.16 0.0 178.54 1.06 ;
+ END
+ END din0[2]
+ PIN din0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 184.28 0.0 184.66 1.06 ;
+ END
+ END din0[3]
+ PIN din0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 189.72 0.0 190.1 1.06 ;
+ END
+ END din0[4]
+ PIN din0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 196.52 0.0 196.9 1.06 ;
+ END
+ END din0[5]
+ PIN din0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 202.64 0.0 203.02 1.06 ;
+ END
+ END din0[6]
+ PIN din0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 207.4 0.0 207.78 1.06 ;
+ END
+ END din0[7]
+ PIN din0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 214.2 0.0 214.58 1.06 ;
+ END
+ END din0[8]
+ PIN din0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 219.64 0.0 220.02 1.06 ;
+ END
+ END din0[9]
+ PIN din0[10]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 225.08 0.0 225.46 1.06 ;
+ END
+ END din0[10]
+ PIN din0[11]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 231.88 0.0 232.26 1.06 ;
+ END
+ END din0[11]
+ PIN din0[12]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 236.64 0.0 237.02 1.06 ;
+ END
+ END din0[12]
+ PIN din0[13]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 243.44 0.0 243.82 1.06 ;
+ END
+ END din0[13]
+ PIN din0[14]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 248.88 0.0 249.26 1.06 ;
+ END
+ END din0[14]
+ PIN din0[15]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 254.32 0.0 254.7 1.06 ;
+ END
+ END din0[15]
+ PIN din0[16]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 259.76 0.0 260.14 1.06 ;
+ END
+ END din0[16]
+ PIN din0[17]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 265.88 0.0 266.26 1.06 ;
+ END
+ END din0[17]
+ PIN din0[18]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 272.68 0.0 273.06 1.06 ;
+ END
+ END din0[18]
+ PIN din0[19]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 278.12 0.0 278.5 1.06 ;
+ END
+ END din0[19]
+ PIN din0[20]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 283.56 0.0 283.94 1.06 ;
+ END
+ END din0[20]
+ PIN din0[21]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 289.0 0.0 289.38 1.06 ;
+ END
+ END din0[21]
+ PIN din0[22]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 295.8 0.0 296.18 1.06 ;
+ END
+ END din0[22]
+ PIN din0[23]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 301.24 0.0 301.62 1.06 ;
+ END
+ END din0[23]
+ PIN din0[24]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 306.68 0.0 307.06 1.06 ;
+ END
+ END din0[24]
+ PIN din0[25]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 312.8 0.0 313.18 1.06 ;
+ END
+ END din0[25]
+ PIN din0[26]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 318.24 0.0 318.62 1.06 ;
+ END
+ END din0[26]
+ PIN din0[27]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 325.04 0.0 325.42 1.06 ;
+ END
+ END din0[27]
+ PIN din0[28]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 331.16 0.0 331.54 1.06 ;
+ END
+ END din0[28]
+ PIN din0[29]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 335.92 0.0 336.3 1.06 ;
+ END
+ END din0[29]
+ PIN din0[30]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 342.04 0.0 342.42 1.06 ;
+ END
+ END din0[30]
+ PIN din0[31]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 347.48 0.0 347.86 1.06 ;
+ END
+ END din0[31]
+ PIN din0[32]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 354.28 0.0 354.66 1.06 ;
+ END
+ END din0[32]
+ PIN din0[33]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 359.72 0.0 360.1 1.06 ;
+ END
+ END din0[33]
+ PIN din0[34]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 365.16 0.0 365.54 1.06 ;
+ END
+ END din0[34]
+ PIN din0[35]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 371.96 0.0 372.34 1.06 ;
+ END
+ END din0[35]
+ PIN din0[36]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 377.4 0.0 377.78 1.06 ;
+ END
+ END din0[36]
+ PIN din0[37]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 382.84 0.0 383.22 1.06 ;
+ END
+ END din0[37]
+ PIN din0[38]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 388.28 0.0 388.66 1.06 ;
+ END
+ END din0[38]
+ PIN din0[39]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 394.4 0.0 394.78 1.06 ;
+ END
+ END din0[39]
+ PIN din0[40]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 401.2 0.0 401.58 1.06 ;
+ END
+ END din0[40]
+ PIN din0[41]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 406.64 0.0 407.02 1.06 ;
+ END
+ END din0[41]
+ PIN din0[42]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 412.08 0.0 412.46 1.06 ;
+ END
+ END din0[42]
+ PIN din0[43]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 417.52 0.0 417.9 1.06 ;
+ END
+ END din0[43]
+ PIN din0[44]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 423.64 0.0 424.02 1.06 ;
+ END
+ END din0[44]
+ PIN din0[45]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 430.44 0.0 430.82 1.06 ;
+ END
+ END din0[45]
+ PIN din0[46]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 435.88 0.0 436.26 1.06 ;
+ END
+ END din0[46]
+ PIN din0[47]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 441.32 0.0 441.7 1.06 ;
+ END
+ END din0[47]
+ PIN din0[48]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 446.76 0.0 447.14 1.06 ;
+ END
+ END din0[48]
+ PIN din0[49]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 453.56 0.0 453.94 1.06 ;
+ END
+ END din0[49]
+ PIN din0[50]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 459.0 0.0 459.38 1.06 ;
+ END
+ END din0[50]
+ PIN din0[51]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 464.44 0.0 464.82 1.06 ;
+ END
+ END din0[51]
+ PIN din0[52]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 471.24 0.0 471.62 1.06 ;
+ END
+ END din0[52]
+ PIN din0[53]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 476.0 0.0 476.38 1.06 ;
+ END
+ END din0[53]
+ PIN din0[54]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 482.8 0.0 483.18 1.06 ;
+ END
+ END din0[54]
+ PIN din0[55]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 488.24 0.0 488.62 1.06 ;
+ END
+ END din0[55]
+ PIN din0[56]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 493.68 0.0 494.06 1.06 ;
+ END
+ END din0[56]
+ PIN din0[57]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 499.12 0.0 499.5 1.06 ;
+ END
+ END din0[57]
+ PIN din0[58]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 505.24 0.0 505.62 1.06 ;
+ END
+ END din0[58]
+ PIN din0[59]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 512.04 0.0 512.42 1.06 ;
+ END
+ END din0[59]
+ PIN din0[60]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 517.48 0.0 517.86 1.06 ;
+ END
+ END din0[60]
+ PIN din0[61]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 522.92 0.0 523.3 1.06 ;
+ END
+ END din0[61]
+ PIN din0[62]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 529.72 0.0 530.1 1.06 ;
+ END
+ END din0[62]
+ PIN din0[63]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 535.16 0.0 535.54 1.06 ;
+ END
+ END din0[63]
+ PIN din0[64]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 540.6 0.0 540.98 1.06 ;
+ END
+ END din0[64]
+ PIN addr0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 108.12 0.0 108.5 1.06 ;
+ END
+ END addr0[0]
+ PIN addr0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 114.92 0.0 115.3 1.06 ;
+ END
+ END addr0[1]
+ PIN addr0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 163.88 1.06 164.26 ;
+ END
+ END addr0[2]
+ PIN addr0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 172.04 1.06 172.42 ;
+ END
+ END addr0[3]
+ PIN addr0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 177.48 1.06 177.86 ;
+ END
+ END addr0[4]
+ PIN addr0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 186.32 1.06 186.7 ;
+ END
+ END addr0[5]
+ PIN addr0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 192.44 1.06 192.82 ;
+ END
+ END addr0[6]
+ PIN addr0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 200.6 1.06 200.98 ;
+ END
+ END addr0[7]
+ PIN addr0[8]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 206.04 1.06 206.42 ;
+ END
+ END addr0[8]
+ PIN addr0[9]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 214.2 1.06 214.58 ;
+ END
+ END addr0[9]
+ PIN addr0[10]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 221.68 1.06 222.06 ;
+ END
+ END addr0[10]
+ PIN csb0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 54.4 1.06 54.78 ;
+ END
+ END csb0
+ PIN web0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 63.24 1.06 63.62 ;
+ END
+ END web0
+ PIN clk0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 0.0 55.08 1.06 55.46 ;
+ END
+ END clk0
+ PIN wmask0[0]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 120.36 0.0 120.74 1.06 ;
+ END
+ END wmask0[0]
+ PIN wmask0[1]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 125.8 0.0 126.18 1.06 ;
+ END
+ END wmask0[1]
+ PIN wmask0[2]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 132.6 0.0 132.98 1.06 ;
+ END
+ END wmask0[2]
+ PIN wmask0[3]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 138.04 0.0 138.42 1.06 ;
+ END
+ END wmask0[3]
+ PIN wmask0[4]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 143.48 0.0 143.86 1.06 ;
+ END
+ END wmask0[4]
+ PIN wmask0[5]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 148.92 0.0 149.3 1.06 ;
+ END
+ END wmask0[5]
+ PIN wmask0[6]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 155.04 0.0 155.42 1.06 ;
+ END
+ END wmask0[6]
+ PIN wmask0[7]
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 160.48 0.0 160.86 1.06 ;
+ END
+ END wmask0[7]
+ PIN spare_wen0
+ DIRECTION INPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 546.04 0.0 546.42 1.06 ;
+ END
+ END spare_wen0
+ PIN dout0[0]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 173.4 0.0 173.78 1.06 ;
+ END
+ END dout0[0]
+ PIN dout0[1]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 182.24 0.0 182.62 1.06 ;
+ END
+ END dout0[1]
+ PIN dout0[2]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 193.8 0.0 194.18 1.06 ;
+ END
+ END dout0[2]
+ PIN dout0[3]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 204.68 0.0 205.06 1.06 ;
+ END
+ END dout0[3]
+ PIN dout0[4]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 214.88 0.0 215.26 1.06 ;
+ END
+ END dout0[4]
+ PIN dout0[5]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 223.04 0.0 223.42 1.06 ;
+ END
+ END dout0[5]
+ PIN dout0[6]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 234.6 0.0 234.98 1.06 ;
+ END
+ END dout0[6]
+ PIN dout0[7]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 244.12 0.0 244.5 1.06 ;
+ END
+ END dout0[7]
+ PIN dout0[8]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 252.28 0.0 252.66 1.06 ;
+ END
+ END dout0[8]
+ PIN dout0[9]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 263.84 0.0 264.22 1.06 ;
+ END
+ END dout0[9]
+ PIN dout0[10]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 274.72 0.0 275.1 1.06 ;
+ END
+ END dout0[10]
+ PIN dout0[11]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 284.24 0.0 284.62 1.06 ;
+ END
+ END dout0[11]
+ PIN dout0[12]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 293.08 0.0 293.46 1.06 ;
+ END
+ END dout0[12]
+ PIN dout0[13]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 304.64 0.0 305.02 1.06 ;
+ END
+ END dout0[13]
+ PIN dout0[14]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 314.16 0.0 314.54 1.06 ;
+ END
+ END dout0[14]
+ PIN dout0[15]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 324.36 0.0 324.74 1.06 ;
+ END
+ END dout0[15]
+ PIN dout0[16]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 333.2 0.0 333.58 1.06 ;
+ END
+ END dout0[16]
+ PIN dout0[17]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 344.08 0.0 344.46 1.06 ;
+ END
+ END dout0[17]
+ PIN dout0[18]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 353.6 0.0 353.98 1.06 ;
+ END
+ END dout0[18]
+ PIN dout0[19]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 363.12 0.0 363.5 1.06 ;
+ END
+ END dout0[19]
+ PIN dout0[20]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 374.68 0.0 375.06 1.06 ;
+ END
+ END dout0[20]
+ PIN dout0[21]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 384.2 0.0 384.58 1.06 ;
+ END
+ END dout0[21]
+ PIN dout0[22]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 392.36 0.0 392.74 1.06 ;
+ END
+ END dout0[22]
+ PIN dout0[23]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 403.92 0.0 404.3 1.06 ;
+ END
+ END dout0[23]
+ PIN dout0[24]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 413.44 0.0 413.82 1.06 ;
+ END
+ END dout0[24]
+ PIN dout0[25]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 424.32 0.0 424.7 1.06 ;
+ END
+ END dout0[25]
+ PIN dout0[26]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 433.16 0.0 433.54 1.06 ;
+ END
+ END dout0[26]
+ PIN dout0[27]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 444.72 0.0 445.1 1.06 ;
+ END
+ END dout0[27]
+ PIN dout0[28]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 454.92 0.0 455.3 1.06 ;
+ END
+ END dout0[28]
+ PIN dout0[29]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 462.4 0.0 462.78 1.06 ;
+ END
+ END dout0[29]
+ PIN dout0[30]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 474.64 0.0 475.02 1.06 ;
+ END
+ END dout0[30]
+ PIN dout0[31]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 484.16 0.0 484.54 1.06 ;
+ END
+ END dout0[31]
+ PIN dout0[32]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 491.64 0.0 492.02 1.06 ;
+ END
+ END dout0[32]
+ PIN dout0[33]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 503.88 0.0 504.26 1.06 ;
+ END
+ END dout0[33]
+ PIN dout0[34]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 514.08 0.0 514.46 1.06 ;
+ END
+ END dout0[34]
+ PIN dout0[35]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 524.28 0.0 524.66 1.06 ;
+ END
+ END dout0[35]
+ PIN dout0[36]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 534.48 0.0 534.86 1.06 ;
+ END
+ END dout0[36]
+ PIN dout0[37]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 544.68 0.0 545.06 1.06 ;
+ END
+ END dout0[37]
+ PIN dout0[38]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 554.88 0.0 555.26 1.06 ;
+ END
+ END dout0[38]
+ PIN dout0[39]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 564.4 0.0 564.78 1.06 ;
+ END
+ END dout0[39]
+ PIN dout0[40]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 573.24 0.0 573.62 1.06 ;
+ END
+ END dout0[40]
+ PIN dout0[41]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 584.12 0.0 584.5 1.06 ;
+ END
+ END dout0[41]
+ PIN dout0[42]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 594.32 0.0 594.7 1.06 ;
+ END
+ END dout0[42]
+ PIN dout0[43]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 604.52 0.0 604.9 1.06 ;
+ END
+ END dout0[43]
+ PIN dout0[44]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 614.72 0.0 615.1 1.06 ;
+ END
+ END dout0[44]
+ PIN dout0[45]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 624.92 0.0 625.3 1.06 ;
+ END
+ END dout0[45]
+ PIN dout0[46]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 634.44 0.0 634.82 1.06 ;
+ END
+ END dout0[46]
+ PIN dout0[47]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 644.64 0.0 645.02 1.06 ;
+ END
+ END dout0[47]
+ PIN dout0[48]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 654.84 0.0 655.22 1.06 ;
+ END
+ END dout0[48]
+ PIN dout0[49]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 664.36 0.0 664.74 1.06 ;
+ END
+ END dout0[49]
+ PIN dout0[50]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 674.56 0.0 674.94 1.06 ;
+ END
+ END dout0[50]
+ PIN dout0[51]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 684.08 0.0 684.46 1.06 ;
+ END
+ END dout0[51]
+ PIN dout0[52]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 694.28 0.0 694.66 1.06 ;
+ END
+ END dout0[52]
+ PIN dout0[53]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 704.48 0.0 704.86 1.06 ;
+ END
+ END dout0[53]
+ PIN dout0[54]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 714.68 0.0 715.06 1.06 ;
+ END
+ END dout0[54]
+ PIN dout0[55]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 724.88 0.0 725.26 1.06 ;
+ END
+ END dout0[55]
+ PIN dout0[56]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 733.04 0.0 733.42 1.06 ;
+ END
+ END dout0[56]
+ PIN dout0[57]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 744.6 0.0 744.98 1.06 ;
+ END
+ END dout0[57]
+ PIN dout0[58]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met4 ;
+ RECT 754.8 0.0 755.18 1.06 ;
+ END
+ END dout0[58]
+ PIN dout0[59]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 829.6 83.64 830.66 84.02 ;
+ END
+ END dout0[59]
+ PIN dout0[60]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 829.6 78.88 830.66 79.26 ;
+ END
+ END dout0[60]
+ PIN dout0[61]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 829.6 82.96 830.66 83.34 ;
+ END
+ END dout0[61]
+ PIN dout0[62]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 829.6 76.84 830.66 77.22 ;
+ END
+ END dout0[62]
+ PIN dout0[63]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 829.6 82.28 830.66 82.66 ;
+ END
+ END dout0[63]
+ PIN dout0[64]
+ DIRECTION OUTPUT ;
+ PORT
+ LAYER met3 ;
+ RECT 829.6 80.24 830.66 80.62 ;
+ END
+ END dout0[64]
+ PIN vccd1
+ DIRECTION INOUT ;
+ USE POWER ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met3 ;
+ RECT 4.76 536.52 825.9 538.26 ;
+ LAYER met3 ;
+ RECT 4.76 4.76 825.9 6.5 ;
+ LAYER met4 ;
+ RECT 824.16 4.76 825.9 538.26 ;
+ LAYER met4 ;
+ RECT 4.76 4.76 6.5 538.26 ;
+ END
+ END vccd1
+ PIN vssd1
+ DIRECTION INOUT ;
+ USE GROUND ;
+ SHAPE ABUTMENT ;
+ PORT
+ LAYER met4 ;
+ RECT 827.56 1.36 829.3 541.66 ;
+ LAYER met3 ;
+ RECT 1.36 539.92 829.3 541.66 ;
+ LAYER met4 ;
+ RECT 1.36 1.36 3.1 541.66 ;
+ LAYER met3 ;
+ RECT 1.36 1.36 829.3 3.1 ;
+ END
+ END vssd1
+ OBS
+ LAYER met1 ;
+ RECT 0.62 0.62 830.04 541.04 ;
+ LAYER met2 ;
+ RECT 0.62 0.62 830.04 541.04 ;
+ LAYER met3 ;
+ RECT 1.66 163.28 830.04 164.86 ;
+ RECT 0.62 164.86 1.66 171.44 ;
+ RECT 0.62 173.02 1.66 176.88 ;
+ RECT 0.62 178.46 1.66 185.72 ;
+ RECT 0.62 187.3 1.66 191.84 ;
+ RECT 0.62 193.42 1.66 200.0 ;
+ RECT 0.62 201.58 1.66 205.44 ;
+ RECT 0.62 207.02 1.66 213.6 ;
+ RECT 0.62 215.18 1.66 221.08 ;
+ RECT 0.62 64.22 1.66 163.28 ;
+ RECT 0.62 56.06 1.66 62.64 ;
+ RECT 1.66 83.04 829.0 84.62 ;
+ RECT 1.66 84.62 829.0 163.28 ;
+ RECT 829.0 84.62 830.04 163.28 ;
+ RECT 829.0 77.82 830.04 78.28 ;
+ RECT 829.0 81.22 830.04 81.68 ;
+ RECT 1.66 164.86 4.16 535.92 ;
+ RECT 1.66 535.92 4.16 538.86 ;
+ RECT 4.16 164.86 826.5 535.92 ;
+ RECT 826.5 164.86 830.04 535.92 ;
+ RECT 826.5 535.92 830.04 538.86 ;
+ RECT 1.66 4.16 4.16 7.1 ;
+ RECT 1.66 7.1 4.16 83.04 ;
+ RECT 4.16 7.1 826.5 83.04 ;
+ RECT 826.5 4.16 829.0 7.1 ;
+ RECT 826.5 7.1 829.0 83.04 ;
+ RECT 0.62 222.66 0.76 539.32 ;
+ RECT 0.62 539.32 0.76 541.04 ;
+ RECT 0.76 222.66 1.66 539.32 ;
+ RECT 1.66 538.86 4.16 539.32 ;
+ RECT 4.16 538.86 826.5 539.32 ;
+ RECT 826.5 538.86 829.9 539.32 ;
+ RECT 829.9 538.86 830.04 539.32 ;
+ RECT 829.9 539.32 830.04 541.04 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 3.7 ;
+ RECT 0.62 3.7 0.76 53.8 ;
+ RECT 0.76 0.62 1.66 0.76 ;
+ RECT 0.76 3.7 1.66 53.8 ;
+ RECT 829.0 0.62 829.9 0.76 ;
+ RECT 829.0 3.7 829.9 76.24 ;
+ RECT 829.9 0.62 830.04 0.76 ;
+ RECT 829.9 0.76 830.04 3.7 ;
+ RECT 829.9 3.7 830.04 76.24 ;
+ RECT 1.66 0.62 4.16 0.76 ;
+ RECT 1.66 3.7 4.16 4.16 ;
+ RECT 4.16 0.62 826.5 0.76 ;
+ RECT 4.16 3.7 826.5 4.16 ;
+ RECT 826.5 0.62 829.0 0.76 ;
+ RECT 826.5 3.7 829.0 4.16 ;
+ LAYER met4 ;
+ RECT 166.68 1.66 168.26 541.04 ;
+ RECT 168.26 0.62 172.12 1.66 ;
+ RECT 185.26 0.62 189.12 1.66 ;
+ RECT 197.5 0.62 202.04 1.66 ;
+ RECT 208.38 0.62 213.6 1.66 ;
+ RECT 226.06 0.62 231.28 1.66 ;
+ RECT 237.62 0.62 242.84 1.66 ;
+ RECT 255.3 0.62 259.16 1.66 ;
+ RECT 266.86 0.62 272.08 1.66 ;
+ RECT 279.1 0.62 282.96 1.66 ;
+ RECT 296.78 0.62 300.64 1.66 ;
+ RECT 307.66 0.62 312.2 1.66 ;
+ RECT 326.02 0.62 330.56 1.66 ;
+ RECT 336.9 0.62 341.44 1.66 ;
+ RECT 355.26 0.62 359.12 1.66 ;
+ RECT 366.14 0.62 371.36 1.66 ;
+ RECT 378.38 0.62 382.24 1.66 ;
+ RECT 395.38 0.62 400.6 1.66 ;
+ RECT 407.62 0.62 411.48 1.66 ;
+ RECT 418.5 0.62 423.04 1.66 ;
+ RECT 436.86 0.62 440.72 1.66 ;
+ RECT 447.74 0.62 452.96 1.66 ;
+ RECT 465.42 0.62 470.64 1.66 ;
+ RECT 476.98 0.62 482.2 1.66 ;
+ RECT 494.66 0.62 498.52 1.66 ;
+ RECT 506.22 0.62 511.44 1.66 ;
+ RECT 518.46 0.62 522.32 1.66 ;
+ RECT 536.14 0.62 540.0 1.66 ;
+ RECT 109.1 0.62 114.32 1.66 ;
+ RECT 115.9 0.62 119.76 1.66 ;
+ RECT 121.34 0.62 125.2 1.66 ;
+ RECT 126.78 0.62 132.0 1.66 ;
+ RECT 133.58 0.62 137.44 1.66 ;
+ RECT 139.02 0.62 142.88 1.66 ;
+ RECT 144.46 0.62 148.32 1.66 ;
+ RECT 149.9 0.62 154.44 1.66 ;
+ RECT 156.02 0.62 159.88 1.66 ;
+ RECT 161.46 0.62 166.68 1.66 ;
+ RECT 174.38 0.62 177.56 1.66 ;
+ RECT 179.14 0.62 181.64 1.66 ;
+ RECT 183.22 0.62 183.68 1.66 ;
+ RECT 190.7 0.62 193.2 1.66 ;
+ RECT 194.78 0.62 195.92 1.66 ;
+ RECT 203.62 0.62 204.08 1.66 ;
+ RECT 205.66 0.62 206.8 1.66 ;
+ RECT 215.86 0.62 219.04 1.66 ;
+ RECT 220.62 0.62 222.44 1.66 ;
+ RECT 224.02 0.62 224.48 1.66 ;
+ RECT 232.86 0.62 234.0 1.66 ;
+ RECT 235.58 0.62 236.04 1.66 ;
+ RECT 245.1 0.62 248.28 1.66 ;
+ RECT 249.86 0.62 251.68 1.66 ;
+ RECT 253.26 0.62 253.72 1.66 ;
+ RECT 260.74 0.62 263.24 1.66 ;
+ RECT 264.82 0.62 265.28 1.66 ;
+ RECT 273.66 0.62 274.12 1.66 ;
+ RECT 275.7 0.62 277.52 1.66 ;
+ RECT 285.22 0.62 288.4 1.66 ;
+ RECT 289.98 0.62 292.48 1.66 ;
+ RECT 294.06 0.62 295.2 1.66 ;
+ RECT 302.22 0.62 304.04 1.66 ;
+ RECT 305.62 0.62 306.08 1.66 ;
+ RECT 315.14 0.62 317.64 1.66 ;
+ RECT 319.22 0.62 323.76 1.66 ;
+ RECT 332.14 0.62 332.6 1.66 ;
+ RECT 334.18 0.62 335.32 1.66 ;
+ RECT 343.02 0.62 343.48 1.66 ;
+ RECT 345.06 0.62 346.88 1.66 ;
+ RECT 348.46 0.62 353.0 1.66 ;
+ RECT 360.7 0.62 362.52 1.66 ;
+ RECT 364.1 0.62 364.56 1.66 ;
+ RECT 372.94 0.62 374.08 1.66 ;
+ RECT 375.66 0.62 376.8 1.66 ;
+ RECT 385.18 0.62 387.68 1.66 ;
+ RECT 389.26 0.62 391.76 1.66 ;
+ RECT 393.34 0.62 393.8 1.66 ;
+ RECT 402.18 0.62 403.32 1.66 ;
+ RECT 404.9 0.62 406.04 1.66 ;
+ RECT 414.42 0.62 416.92 1.66 ;
+ RECT 425.3 0.62 429.84 1.66 ;
+ RECT 431.42 0.62 432.56 1.66 ;
+ RECT 434.14 0.62 435.28 1.66 ;
+ RECT 442.3 0.62 444.12 1.66 ;
+ RECT 445.7 0.62 446.16 1.66 ;
+ RECT 455.9 0.62 458.4 1.66 ;
+ RECT 459.98 0.62 461.8 1.66 ;
+ RECT 463.38 0.62 463.84 1.66 ;
+ RECT 472.22 0.62 474.04 1.66 ;
+ RECT 485.14 0.62 487.64 1.66 ;
+ RECT 489.22 0.62 491.04 1.66 ;
+ RECT 492.62 0.62 493.08 1.66 ;
+ RECT 500.1 0.62 503.28 1.66 ;
+ RECT 513.02 0.62 513.48 1.66 ;
+ RECT 515.06 0.62 516.88 1.66 ;
+ RECT 525.26 0.62 529.12 1.66 ;
+ RECT 530.7 0.62 533.88 1.66 ;
+ RECT 541.58 0.62 544.08 1.66 ;
+ RECT 547.02 0.62 554.28 1.66 ;
+ RECT 555.86 0.62 563.8 1.66 ;
+ RECT 565.38 0.62 572.64 1.66 ;
+ RECT 574.22 0.62 583.52 1.66 ;
+ RECT 585.1 0.62 593.72 1.66 ;
+ RECT 595.3 0.62 603.92 1.66 ;
+ RECT 605.5 0.62 614.12 1.66 ;
+ RECT 615.7 0.62 624.32 1.66 ;
+ RECT 625.9 0.62 633.84 1.66 ;
+ RECT 635.42 0.62 644.04 1.66 ;
+ RECT 645.62 0.62 654.24 1.66 ;
+ RECT 655.82 0.62 663.76 1.66 ;
+ RECT 665.34 0.62 673.96 1.66 ;
+ RECT 675.54 0.62 683.48 1.66 ;
+ RECT 685.06 0.62 693.68 1.66 ;
+ RECT 695.26 0.62 703.88 1.66 ;
+ RECT 705.46 0.62 714.08 1.66 ;
+ RECT 715.66 0.62 724.28 1.66 ;
+ RECT 725.86 0.62 732.44 1.66 ;
+ RECT 734.02 0.62 744.0 1.66 ;
+ RECT 745.58 0.62 754.2 1.66 ;
+ RECT 168.26 1.66 823.56 4.16 ;
+ RECT 168.26 4.16 823.56 538.86 ;
+ RECT 168.26 538.86 823.56 541.04 ;
+ RECT 823.56 1.66 826.5 4.16 ;
+ RECT 823.56 538.86 826.5 541.04 ;
+ RECT 4.16 1.66 7.1 4.16 ;
+ RECT 4.16 538.86 7.1 541.04 ;
+ RECT 7.1 1.66 166.68 4.16 ;
+ RECT 7.1 4.16 166.68 538.86 ;
+ RECT 7.1 538.86 166.68 541.04 ;
+ RECT 755.78 0.62 826.96 0.76 ;
+ RECT 755.78 0.76 826.96 1.66 ;
+ RECT 826.96 0.62 829.9 0.76 ;
+ RECT 829.9 0.62 830.04 0.76 ;
+ RECT 829.9 0.76 830.04 1.66 ;
+ RECT 826.5 1.66 826.96 4.16 ;
+ RECT 829.9 1.66 830.04 4.16 ;
+ RECT 826.5 4.16 826.96 538.86 ;
+ RECT 829.9 4.16 830.04 538.86 ;
+ RECT 826.5 538.86 826.96 541.04 ;
+ RECT 829.9 538.86 830.04 541.04 ;
+ RECT 0.62 0.62 0.76 0.76 ;
+ RECT 0.62 0.76 0.76 1.66 ;
+ RECT 0.76 0.62 3.7 0.76 ;
+ RECT 3.7 0.62 107.52 0.76 ;
+ RECT 3.7 0.76 107.52 1.66 ;
+ RECT 0.62 1.66 0.76 4.16 ;
+ RECT 3.7 1.66 4.16 4.16 ;
+ RECT 0.62 4.16 0.76 538.86 ;
+ RECT 3.7 4.16 4.16 538.86 ;
+ RECT 0.62 538.86 0.76 541.04 ;
+ RECT 3.7 538.86 4.16 541.04 ;
+ END
+END sky130_sram_8kbyte_1rw_64x1024_8
+END LIBRARY
diff --git a/openlane/user_project_wrapper/config.tcl b/openlane/user_project_wrapper/config.tcl
index 1498604..7e55970 100755
--- a/openlane/user_project_wrapper/config.tcl
+++ b/openlane/user_project_wrapper/config.tcl
@@ -50,11 +50,11 @@
$script_dir/../../verilog/rtl/sky130_sram_2kbyte_1rw1r_32x512_8.v \
$script_dir/../../verilog/rtl/sky130_sram_4kbyte_1rw1r_32x1024_8.v \
$script_dir/../../verilog/rtl/sky130_sram_8kbyte_1rw1r_32x2048_8.v \
- $script_dir/../../verilog/rtl/sram_1rw0r0w_32_1024_sky130.v \
- $script_dir/../../verilog/rtl/sram_1rw0r0w_32_256_sky130.v \
- $script_dir/../../verilog/rtl/sram_1rw0r0w_32_512_sky130.v \
- $script_dir/../../verilog/rtl/sram_1rw0r0w_32_512_sky130.v \
- $script_dir/../../verilog/rtl/sram_1rw0r0w_64_512_sky130.v"
+ $script_dir/../../verilog/rtl/sky130_sram_1kbyte_1rw_32x256_8.v \
+ $script_dir/../../verilog/rtl/sky130_sram_2kbyte_1rw_32x512_8.v \
+ $script_dir/../../verilog/rtl/sky130_sram_4kbyte_1rw_32x1024_8.v \
+ $script_dir/../../verilog/rtl/sky130_sram_4kbyte_1rw_64x512_8.v \
+ $script_dir/../../verilog/rtl/sky130_sram_8kbyte_1rw_64x1024_8.v"
#$script_dir/../../verilog/rtl/openram_testchip.v
set ::env(EXTRA_LEFS) "\
@@ -63,10 +63,11 @@
$script_dir/../../lef/sky130_sram_2kbyte_1rw1r_32x512_8.lef \
$script_dir/../../lef/sky130_sram_4kbyte_1rw1r_32x1024_8.lef \
$script_dir/../../lef/sky130_sram_8kbyte_1rw1r_32x2048_8.lef \
- $script_dir/../../lef/sram_1rw0r0w_32_1024_sky130.lef \
- $script_dir/../../lef/sram_1rw0r0w_32_256_sky130.lef \
- $script_dir/../../lef/sram_1rw0r0w_32_512_sky130.lef \
- $script_dir/../../lef/sram_1rw0r0w_64_512_sky130.lef"
+ $script_dir/../../lef/sky130_sram_1kbyte_1rw_32x256_8.lef \
+ $script_dir/../../lef/sky130_sram_2kbyte_1rw_32x512_8.lef \
+ $script_dir/../../lef/sky130_sram_4kbyte_1rw_32x1024_8.lef \
+ $script_dir/../../lef/sky130_sram_4kbyte_1rw_64x512_8.lef \
+ $script_dir/../../lef/sky130_sram_8kbyte_1rw_64x1024_8.lef"
# $script_dir/../../lef/openram_testchip.lef
set ::env(EXTRA_GDS_FILES) "\
@@ -75,10 +76,11 @@
$script_dir/../../gds/sky130_sram_2kbyte_1rw1r_32x512_8.gds \
$script_dir/../../gds/sky130_sram_4kbyte_1rw1r_32x1024_8.gds \
$script_dir/../../gds/sky130_sram_8kbyte_1rw1r_32x2048_8.gds \
- $script_dir/../../gds/sram_1rw0r0w_32_1024_sky130.gds \
- $script_dir/../../gds/sram_1rw0r0w_32_256_sky130.gds \
- $script_dir/../../gds/sram_1rw0r0w_32_512_sky130.gds \
- $script_dir/../../gds/sram_1rw0r0w_64_512_sky130.gds"
+ $script_dir/../../gds/sky130_sram_1kbyte_1rw_32x256_8.gds \
+ $script_dir/../../gds/sky130_sram_2kbyte_1rw_32x512_8.gds \
+ $script_dir/../../gds/sky130_sram_4kbyte_1rw_32x1024_8.gds \
+ $script_dir/../../gds/sky130_sram_4kbyte_1rw_64x512_8.gds \
+ $script_dir/../../gds/sky130_sram_8kbyte_1rw_64x1024_8.gds"
# $script_dir/../../gds/openram_testchip.gds
set ::env(GLB_RT_MAXLAYER) 5
diff --git a/openlane/user_project_wrapper/macro.cfg b/openlane/user_project_wrapper/macro.cfg
index 132d9a7..eb97eb3 100644
--- a/openlane/user_project_wrapper/macro.cfg
+++ b/openlane/user_project_wrapper/macro.cfg
@@ -32,19 +32,23 @@
# Control is 800 wide with 100 margin
# so 2000
-# sram_1rw0r0w_32_256_sky130
+# sky130_sram_4kbyte_1rw_64_512_8
+#
+SRAM12 2000 100 N
+
+# sky130_sram_4kbyte_1rw_64_512_8
# 473 x 220
SRAM11 2000 700 N
-# sram_1rw0r0w_32_512_sky130
+# sky130_sram_4kbyte_1rw_32x1024_8
# 476 x 320
SRAM10 2000 1200 N
-# sram_1rw0r0w_32_1024_sky130
+# sky130_sram_2kbyte_1rw_32x512_8
# 801 x 348
SRAM9 2000 1800 N
-# sram_1rw0r0w_64_512_sky130
+# sky130_sram_1kbyte_1rw_32x256_8
# 823 x 335
SRAM8 2000 2600 N
diff --git a/verilog/rtl/sram_1rw0r0w_32_512_sky130.v b/verilog/rtl/sky130_sram_1kbyte_1rw_32x256_8.v
similarity index 94%
rename from verilog/rtl/sram_1rw0r0w_32_512_sky130.v
rename to verilog/rtl/sky130_sram_1kbyte_1rw_32x256_8.v
index 138331b..11bf0c0 100644
--- a/verilog/rtl/sram_1rw0r0w_32_512_sky130.v
+++ b/verilog/rtl/sky130_sram_1kbyte_1rw_32x256_8.v
@@ -1,9 +1,9 @@
// OpenRAM SRAM model
-// Words: 512
+// Words: 256
// Word size: 32
// Write size: 8
-module sram_1rw0r0w_32_512_sky130(
+module sky130_sram_1kbyte_1rw_32x256_8(
`ifdef USE_POWER_PINS
vccd1,
vssd1,
@@ -30,7 +30,7 @@
input web0; // active low write control
input [NUM_WMASKS-1:0] wmask0; // write mask
input spare_wen0; // spare mask
- input [ADDR_WIDTH-1:0] addr0;
+ input [ADDR_WIDTH-1:0] addr0;
input [DATA_WIDTH-1:0] din0;
output [DATA_WIDTH-1:0] dout0;
@@ -52,7 +52,7 @@
addr0_reg = addr0;
din0_reg = din0;
#(T_HOLD) dout0 = 32'bx;
- if ( !csb0_reg && web0_reg && VERBOSE )
+ if ( !csb0_reg && web0_reg && VERBOSE )
$display($time," Reading %m addr0=%b dout0=%b",addr0_reg,mem[addr0_reg]);
if ( !csb0_reg && !web0_reg && VERBOSE )
$display($time," Writing %m addr0=%b din0=%b wmask0=%b",addr0_reg,din0_reg,wmask0_reg);
diff --git a/verilog/rtl/sram_1rw0r0w_32_1024_sky130.v b/verilog/rtl/sky130_sram_2kbyte_1rw_32x512_8.v
similarity index 94%
rename from verilog/rtl/sram_1rw0r0w_32_1024_sky130.v
rename to verilog/rtl/sky130_sram_2kbyte_1rw_32x512_8.v
index 6b94771..990b8fb 100644
--- a/verilog/rtl/sram_1rw0r0w_32_1024_sky130.v
+++ b/verilog/rtl/sky130_sram_2kbyte_1rw_32x512_8.v
@@ -1,9 +1,9 @@
// OpenRAM SRAM model
-// Words: 1024
+// Words: 512
// Word size: 32
// Write size: 8
-module sram_1rw0r0w_32_1024_sky130(
+module sky130_sram_2kbyte_1rw_32x512_8(
`ifdef USE_POWER_PINS
vccd1,
vssd1,
@@ -30,7 +30,7 @@
input web0; // active low write control
input [NUM_WMASKS-1:0] wmask0; // write mask
input spare_wen0; // spare mask
- input [ADDR_WIDTH-1:0] addr0;
+ input [ADDR_WIDTH-1:0] addr0;
input [DATA_WIDTH-1:0] din0;
output [DATA_WIDTH-1:0] dout0;
@@ -52,7 +52,7 @@
addr0_reg = addr0;
din0_reg = din0;
#(T_HOLD) dout0 = 32'bx;
- if ( !csb0_reg && web0_reg && VERBOSE )
+ if ( !csb0_reg && web0_reg && VERBOSE )
$display($time," Reading %m addr0=%b dout0=%b",addr0_reg,mem[addr0_reg]);
if ( !csb0_reg && !web0_reg && VERBOSE )
$display($time," Writing %m addr0=%b din0=%b wmask0=%b",addr0_reg,din0_reg,wmask0_reg);
diff --git a/verilog/rtl/sram_1rw0r0w_32_1024_sky130.v b/verilog/rtl/sky130_sram_4kbyte_1rw_32x1024_8.v
similarity index 93%
copy from verilog/rtl/sram_1rw0r0w_32_1024_sky130.v
copy to verilog/rtl/sky130_sram_4kbyte_1rw_32x1024_8.v
index 6b94771..13bacf4 100644
--- a/verilog/rtl/sram_1rw0r0w_32_1024_sky130.v
+++ b/verilog/rtl/sky130_sram_4kbyte_1rw_32x1024_8.v
@@ -3,7 +3,7 @@
// Word size: 32
// Write size: 8
-module sram_1rw0r0w_32_1024_sky130(
+module sky130_sram_4kbyte_1rw_32x1024_8(
`ifdef USE_POWER_PINS
vccd1,
vssd1,
@@ -14,7 +14,7 @@
parameter NUM_WMASKS = 4 ;
parameter DATA_WIDTH = 33 ;
- parameter ADDR_WIDTH = 10 ;
+ parameter ADDR_WIDTH = 11 ;
parameter RAM_DEPTH = 1 << ADDR_WIDTH;
// FIXME: This delay is arbitrary.
parameter DELAY = 3 ;
@@ -30,7 +30,7 @@
input web0; // active low write control
input [NUM_WMASKS-1:0] wmask0; // write mask
input spare_wen0; // spare mask
- input [ADDR_WIDTH-1:0] addr0;
+ input [ADDR_WIDTH-1:0] addr0;
input [DATA_WIDTH-1:0] din0;
output [DATA_WIDTH-1:0] dout0;
@@ -52,7 +52,7 @@
addr0_reg = addr0;
din0_reg = din0;
#(T_HOLD) dout0 = 32'bx;
- if ( !csb0_reg && web0_reg && VERBOSE )
+ if ( !csb0_reg && web0_reg && VERBOSE )
$display($time," Reading %m addr0=%b dout0=%b",addr0_reg,mem[addr0_reg]);
if ( !csb0_reg && !web0_reg && VERBOSE )
$display($time," Writing %m addr0=%b din0=%b wmask0=%b",addr0_reg,din0_reg,wmask0_reg);
diff --git a/verilog/rtl/sram_1rw0r0w_64_512_sky130.v b/verilog/rtl/sky130_sram_4kbyte_1rw_64x512_8.v
similarity index 94%
rename from verilog/rtl/sram_1rw0r0w_64_512_sky130.v
rename to verilog/rtl/sky130_sram_4kbyte_1rw_64x512_8.v
index d36ca41..e0facb8 100644
--- a/verilog/rtl/sram_1rw0r0w_64_512_sky130.v
+++ b/verilog/rtl/sky130_sram_4kbyte_1rw_64x512_8.v
@@ -3,7 +3,7 @@
// Word size: 64
// Write size: 8
-module sram_1rw0r0w_64_512_sky130(
+module sky130_sram_4kbyte_1rw_64x512_8(
`ifdef USE_POWER_PINS
vccd1,
vssd1,
@@ -14,7 +14,7 @@
parameter NUM_WMASKS = 8 ;
parameter DATA_WIDTH = 65 ;
- parameter ADDR_WIDTH = 9 ;
+ parameter ADDR_WIDTH = 10 ;
parameter RAM_DEPTH = 1 << ADDR_WIDTH;
// FIXME: This delay is arbitrary.
parameter DELAY = 3 ;
@@ -30,7 +30,7 @@
input web0; // active low write control
input [NUM_WMASKS-1:0] wmask0; // write mask
input spare_wen0; // spare mask
- input [ADDR_WIDTH-1:0] addr0;
+ input [ADDR_WIDTH-1:0] addr0;
input [DATA_WIDTH-1:0] din0;
output [DATA_WIDTH-1:0] dout0;
@@ -52,7 +52,7 @@
addr0_reg = addr0;
din0_reg = din0;
#(T_HOLD) dout0 = 64'bx;
- if ( !csb0_reg && web0_reg && VERBOSE )
+ if ( !csb0_reg && web0_reg && VERBOSE )
$display($time," Reading %m addr0=%b dout0=%b",addr0_reg,mem[addr0_reg]);
if ( !csb0_reg && !web0_reg && VERBOSE )
$display($time," Writing %m addr0=%b din0=%b wmask0=%b",addr0_reg,din0_reg,wmask0_reg);
diff --git a/verilog/rtl/sram_1rw0r0w_64_512_sky130.v b/verilog/rtl/sky130_sram_8kbyte_1rw_64x1024_8.v
similarity index 93%
copy from verilog/rtl/sram_1rw0r0w_64_512_sky130.v
copy to verilog/rtl/sky130_sram_8kbyte_1rw_64x1024_8.v
index d36ca41..958b580 100644
--- a/verilog/rtl/sram_1rw0r0w_64_512_sky130.v
+++ b/verilog/rtl/sky130_sram_8kbyte_1rw_64x1024_8.v
@@ -1,9 +1,9 @@
// OpenRAM SRAM model
-// Words: 512
+// Words: 1024
// Word size: 64
// Write size: 8
-module sram_1rw0r0w_64_512_sky130(
+module sky130_sram_8kbyte_1rw_64x1024_8(
`ifdef USE_POWER_PINS
vccd1,
vssd1,
@@ -14,7 +14,7 @@
parameter NUM_WMASKS = 8 ;
parameter DATA_WIDTH = 65 ;
- parameter ADDR_WIDTH = 9 ;
+ parameter ADDR_WIDTH = 11 ;
parameter RAM_DEPTH = 1 << ADDR_WIDTH;
// FIXME: This delay is arbitrary.
parameter DELAY = 3 ;
@@ -30,7 +30,7 @@
input web0; // active low write control
input [NUM_WMASKS-1:0] wmask0; // write mask
input spare_wen0; // spare mask
- input [ADDR_WIDTH-1:0] addr0;
+ input [ADDR_WIDTH-1:0] addr0;
input [DATA_WIDTH-1:0] din0;
output [DATA_WIDTH-1:0] dout0;
@@ -52,7 +52,7 @@
addr0_reg = addr0;
din0_reg = din0;
#(T_HOLD) dout0 = 64'bx;
- if ( !csb0_reg && web0_reg && VERBOSE )
+ if ( !csb0_reg && web0_reg && VERBOSE )
$display($time," Reading %m addr0=%b dout0=%b",addr0_reg,mem[addr0_reg]);
if ( !csb0_reg && !web0_reg && VERBOSE )
$display($time," Writing %m addr0=%b din0=%b wmask0=%b",addr0_reg,din0_reg,wmask0_reg);
diff --git a/verilog/rtl/sram_1rw0r0w_32_256_sky130.v b/verilog/rtl/sram_1rw0r0w_32_256_sky130.v
deleted file mode 100644
index 1ec035a..0000000
--- a/verilog/rtl/sram_1rw0r0w_32_256_sky130.v
+++ /dev/null
@@ -1,89 +0,0 @@
-// OpenRAM SRAM model
-// Words: 256
-// Word size: 32
-// Write size: 8
-
-module sram_1rw0r0w_32_256_sky130(
-`ifdef USE_POWER_PINS
- vccd1,
- vssd1,
-`endif
-// Port 0: RW
- clk0,csb0,web0,wmask0,spare_wen0,addr0,din0,dout0
- );
-
- parameter NUM_WMASKS = 4 ;
- parameter DATA_WIDTH = 33 ;
- parameter ADDR_WIDTH = 8 ;
- parameter RAM_DEPTH = 1 << ADDR_WIDTH;
- // FIXME: This delay is arbitrary.
- parameter DELAY = 3 ;
- parameter VERBOSE = 1 ; //Set to 0 to only display warnings
- parameter T_HOLD = 1 ; //Delay to hold dout value after posedge. Value is arbitrary
-
-`ifdef USE_POWER_PINS
- inout vccd1;
- inout vssd1;
-`endif
- input clk0; // clock
- input csb0; // active low chip select
- input web0; // active low write control
- input [NUM_WMASKS-1:0] wmask0; // write mask
- input spare_wen0; // spare mask
- input [ADDR_WIDTH-1:0] addr0;
- input [DATA_WIDTH-1:0] din0;
- output [DATA_WIDTH-1:0] dout0;
-
- reg csb0_reg;
- reg web0_reg;
- reg [NUM_WMASKS-1:0] wmask0_reg;
- reg spare_wen0_reg;
- reg [ADDR_WIDTH-1:0] addr0_reg;
- reg [DATA_WIDTH-1:0] din0_reg;
- reg [DATA_WIDTH-1:0] dout0;
-
- // All inputs are registers
- always @(posedge clk0)
- begin
- csb0_reg = csb0;
- web0_reg = web0;
- wmask0_reg = wmask0;
- spare_wen0_reg = spare_wen0;
- addr0_reg = addr0;
- din0_reg = din0;
- #(T_HOLD) dout0 = 32'bx;
- if ( !csb0_reg && web0_reg && VERBOSE )
- $display($time," Reading %m addr0=%b dout0=%b",addr0_reg,mem[addr0_reg]);
- if ( !csb0_reg && !web0_reg && VERBOSE )
- $display($time," Writing %m addr0=%b din0=%b wmask0=%b",addr0_reg,din0_reg,wmask0_reg);
- end
-
-reg [DATA_WIDTH-1:0] mem [0:RAM_DEPTH-1];
-
- // Memory Write Block Port 0
- // Write Operation : When web0 = 0, csb0 = 0
- always @ (negedge clk0)
- begin : MEM_WRITE0
- if ( !csb0_reg && !web0_reg ) begin
- if (wmask0_reg[0])
- mem[addr0_reg][7:0] = din0_reg[7:0];
- if (wmask0_reg[1])
- mem[addr0_reg][15:8] = din0_reg[15:8];
- if (wmask0_reg[2])
- mem[addr0_reg][23:16] = din0_reg[23:16];
- if (wmask0_reg[3])
- mem[addr0_reg][31:24] = din0_reg[31:24];
- if (spare_wen0_reg)
- mem[addr0_reg][32] = din0_reg[32];
- end
- end
-
- // Memory Read Block Port 0
- // Read Operation : When web0 = 1, csb0 = 0
- always @ (negedge clk0)
- begin : MEM_READ0
- if (!csb0_reg && web0_reg)
- dout0 <= #(DELAY) mem[addr0_reg];
- end
-
-endmodule
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v
index 293c834..017be4b 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_project_wrapper.v
@@ -216,7 +216,7 @@
wire [`DATA_SIZE-1:0] sram10_dout1 = 0;
wire [`DATA_SIZE-1:0] sram11_dout0;
wire [`DATA_SIZE-1:0] sram11_dout1 = 0;
- wire [`DATA_SIZE-1:0] sram12_dout0 = 0;
+ wire [`DATA_SIZE-1:0] sram12_dout0;
wire [`DATA_SIZE-1:0] sram12_dout1 = 0;
wire [`DATA_SIZE-1:0] sram13_dout0 = 0;
wire [`DATA_SIZE-1:0] sram13_dout1 = 0;
@@ -345,7 +345,7 @@
// Single port memories
-sram_1rw0r0w_32_256_sky130 SRAM8
+sky130_sram_1kbyte_1rw_32x256_8 SRAM8
(
`ifdef USE_POWER_PINS
.vccd1(vccd1),
@@ -361,7 +361,7 @@
.spare_wen0(1'b0)
);
-sram_1rw0r0w_32_512_sky130 SRAM9
+sky130_sram_2kbyte_1rw_32x512_8 SRAM9
(
`ifdef USE_POWER_PINS
.vccd1(vccd1),
@@ -377,7 +377,7 @@
.spare_wen0(1'b0)
);
-sram_1rw0r0w_32_1024_sky130 SRAM10
+sky130_sram_4kbyte_1rw_32x1024_8 SRAM10
(
`ifdef USE_POWER_PINS
.vccd1(vccd1),
@@ -395,7 +395,7 @@
wire [63:0] temp_sram11_dout0;
-sram_1rw0r0w_64_512_sky130 SRAM11
+sky130_sram_4kbyte_1rw_64x512_8 SRAM11
(
`ifdef USE_POWER_PINS
.vccd1(vccd1),
@@ -412,6 +412,24 @@
);
assign sram11_dout0 = {temp_sram11_dout0[63:48], temp_sram11_dout0[15:0]};
+ wire [63:0] temp_sram12_dout0;
+sky130_sram_4kbyte_1rw_64x512_8 SRAM12
+ (
+ `ifdef USE_POWER_PINS
+ .vccd1(vccd1),
+ .vssd1(vssd1),
+ `endif
+ .clk0 (clk),
+ .csb0 (csb0[12]),
+ .web0 (web0),
+ .wmask0 ({wmask0[3:2],4'hF,wmask0[1:0]}),
+ .addr0 (addr0),
+ .din0 ({1'b0, din0, din0}),
+ .dout0 ({disconn12, temp_sram11_dout0}),
+ .spare_wen0(1'b0)
+ );
+ assign sram12_dout0 = {temp_sram12_dout0[63:48], temp_sram12_dout0[15:0]};
+
// Hold dout from SRAM
// clocked by SRAM clk
reg [`DATA_SIZE-1:0] sram0_data0;
