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foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-002
/
slot-009
/
7a68107e5da719153a4a7c3fbcab557f0e662a0f
commit
7a68107e5da719153a4a7c3fbcab557f0e662a0f
[
log
]
[
tgz
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author
AmoghLonkar <alonkar@ucsc.edu>
Sat Jun 12 12:15:18 2021 -0700
committer
AmoghLonkar <alonkar@ucsc.edu>
Sat Jun 12 12:15:18 2021 -0700
tree
66e70601323978a9da4cd171149ddcc873dd4b0e
parent
5d991a9b00bb98cb998102b1922efddd991ac4bc
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diff
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Set dout inputs to 32 bits
verilog/rtl/openram_testchip.v
[
diff
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1 file changed
tree: 66e70601323978a9da4cd171149ddcc873dd4b0e
.github/
def/
docs/
gds/
lef/
mag/
maglef/
openlane/
signoff/
single_port/
spi/
verilog/
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