commit | 4602c4e09af94ca95cc3211f462bc90a4dbc4072 | [log] [tgz] |
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author | AmoghLonkar <alonkar@ucsc.edu> | Fri Jun 11 21:58:39 2021 -0700 |
committer | AmoghLonkar <alonkar@ucsc.edu> | Fri Jun 11 21:58:39 2021 -0700 |
tree | 0d6121d9cadd39e7468d41417c0a7539eceeb450 | |
parent | d6591e835f90e04c4cf1075199f64e3852859e1b [diff] |
Added control signal inputs and loading sram register
:exclamation: Important Note |
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Refer to README for this sample project documentation.