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foss-eda-tools/third_party/shuttle/sky130/mpw-002/slot-009/d54b7b1f7339a70fdfadfe4408b0141cbc346917
commit
d54b7b1f7339a70fdfadfe4408b0141cbc346917
[log] [tgz]
author
mrg <mrg@ucsc.edu>
Thu Jun 17 11:23:27 2021 -0700
committer
mrg <mrg@ucsc.edu>
Thu Jun 17 11:23:27 2021 -0700
tree
a8690e1fabec18a6cab82c0bc17ca1bcf970a574
parent
0d14b0b816d6a08ef1dbe0605053efdb6f0ab885 [diff]
parent
3ff7d0762ac4b96e46cf6fdad8509ef539a41cbf [diff]
Merge branch 'main' of github.com:AmoghLonkar/openram_testchip into main
tree: a8690e1fabec18a6cab82c0bc17ca1bcf970a574
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. single_port/
  11. spi/
  12. verilog/
  13. caravel
  14. .gitignore
  15. .gitmodules
  16. info.yaml
  17. LICENSE
  18. Makefile
  19. README.md
README.md

Caravel User Project

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Please fill in your project documentation in this README.md file

Refer to README for this sample project documentation.