Update README.md
diff --git a/verilog/dv/README.md b/verilog/dv/README.md
index e12d229..94286b8 100644
--- a/verilog/dv/README.md
+++ b/verilog/dv/README.md
@@ -82,18 +82,19 @@
 export PDK_PATH=<pdk-location/sky130A>
 export CARAVEL_ROOT=<caravel_root>
+export UPRJ_ROOT=<user_project_root>
 Then, run the following command to start the docker container :
-docker run -it -v $CARAVEL_ROOT:$CARAVEL_ROOT -v $PDK_PATH:$PDK_PATH -e CARAVEL_ROOT=$CARAVEL_ROOT -e PDK_PATH=$PDK_PATH  -u $(id -u $USER):$(id -g $USER) efabless/dv_setup:latest
+docker run -it -v $CARAVEL_ROOT:$CARAVEL_ROOT -v $PDK_PATH:$PDK_PATH -v $UPRJ_ROOT:$UPRJ_ROOT -e CARAVEL_ROOT=$CARAVEL_ROOT -e PDK_PATH=$PDK_PATH -e UPRJ_ROOT=$UPRJ_ROOT -u $(id -u $USER):$(id -g $USER) efabless/dv_setup:latest
 Then, navigate to the directory where the DV tests reside : 
-cd $CARAVEL_ROOT/verilog/dv/caravel/user_proj_example
+cd $UPRJ_ROOT/verilog/dv/
 Then, follow the instructions at [Both](#both) to run RTL/GL simulation.