final gds & signoff results
diff --git a/gds/caravel.gds.gz b/gds/caravel.gds.gz
new file mode 100644
index 0000000..91e3c6e
--- /dev/null
+++ b/gds/caravel.gds.gz
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diff --git a/gds/caravel_00020004.gds.gz.00.split b/gds/caravel_00020004.gds.gz.00.split
new file mode 100644
index 0000000..aca4b32
--- /dev/null
+++ b/gds/caravel_00020004.gds.gz.00.split
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diff --git a/gds/caravel_00020004.gds.gz.01.split b/gds/caravel_00020004.gds.gz.01.split
new file mode 100644
index 0000000..d752d1f
--- /dev/null
+++ b/gds/caravel_00020004.gds.gz.01.split
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diff --git a/gds/caravel_00020004.gds.gz.02.split b/gds/caravel_00020004.gds.gz.02.split
new file mode 100644
index 0000000..4d4a220
--- /dev/null
+++ b/gds/caravel_00020004.gds.gz.02.split
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diff --git a/gds/caravel_00020004.gds.gz.03.split b/gds/caravel_00020004.gds.gz.03.split
new file mode 100644
index 0000000..4c59981
--- /dev/null
+++ b/gds/caravel_00020004.gds.gz.03.split
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diff --git a/gds/caravel_00020004.gds.gz.04.split b/gds/caravel_00020004.gds.gz.04.split
new file mode 100644
index 0000000..ad54d73
--- /dev/null
+++ b/gds/caravel_00020004.gds.gz.04.split
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diff --git a/gds/caravel_00020004.gds.gz.05.split b/gds/caravel_00020004.gds.gz.05.split
new file mode 100644
index 0000000..b6da824
--- /dev/null
+++ b/gds/caravel_00020004.gds.gz.05.split
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diff --git a/gds/caravel_00020004_fill_pattern.gds.gz.00.split b/gds/caravel_00020004_fill_pattern.gds.gz.00.split
new file mode 100644
index 0000000..fb375f9
--- /dev/null
+++ b/gds/caravel_00020004_fill_pattern.gds.gz.00.split
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diff --git a/gds/caravel_00020004_fill_pattern.gds.gz.01.split b/gds/caravel_00020004_fill_pattern.gds.gz.01.split
new file mode 100644
index 0000000..ab7a927
--- /dev/null
+++ b/gds/caravel_00020004_fill_pattern.gds.gz.01.split
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diff --git a/gds/caravel_00020004_fill_pattern.gds.gz.02.split b/gds/caravel_00020004_fill_pattern.gds.gz.02.split
new file mode 100644
index 0000000..05821e0
--- /dev/null
+++ b/gds/caravel_00020004_fill_pattern.gds.gz.02.split
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diff --git a/gds/caravel_00020004_fill_pattern.gds.gz.03.split b/gds/caravel_00020004_fill_pattern.gds.gz.03.split
new file mode 100644
index 0000000..b9514bc
--- /dev/null
+++ b/gds/caravel_00020004_fill_pattern.gds.gz.03.split
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diff --git a/gds/caravel_00020004_fill_pattern.gds.gz.04.split b/gds/caravel_00020004_fill_pattern.gds.gz.04.split
new file mode 100644
index 0000000..fa2d46a
--- /dev/null
+++ b/gds/caravel_00020004_fill_pattern.gds.gz.04.split
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diff --git a/gds/caravel_00020004_fill_pattern.gds.gz.05.split b/gds/caravel_00020004_fill_pattern.gds.gz.05.split
new file mode 100644
index 0000000..7e50bd2
--- /dev/null
+++ b/gds/caravel_00020004_fill_pattern.gds.gz.05.split
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diff --git a/gds/user_id_prog_zero.gds.gz b/gds/user_id_prog_zero.gds.gz
new file mode 100644
index 0000000..fd7f8c8
--- /dev/null
+++ b/gds/user_id_prog_zero.gds.gz
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diff --git a/gds/user_id_programming.gds.gz b/gds/user_id_programming.gds.gz
new file mode 100644
index 0000000..d7e1c51
--- /dev/null
+++ b/gds/user_id_programming.gds.gz
Binary files differ
diff --git a/gds/user_proj_example.gds b/gds/user_proj_example.gds
deleted file mode 100644
index 3d9f5e7..0000000
--- a/gds/user_proj_example.gds
+++ /dev/null
Binary files differ
diff --git a/gds/user_proj_example.gds.gz b/gds/user_proj_example.gds.gz
index 5b8ebac..9f7ee9c 100644
--- a/gds/user_proj_example.gds.gz
+++ b/gds/user_proj_example.gds.gz
Binary files differ
diff --git a/gds/user_project_wrapper.gds b/gds/user_project_wrapper.gds
deleted file mode 100644
index f9933b8..0000000
--- a/gds/user_project_wrapper.gds
+++ /dev/null
Binary files differ
diff --git a/gds/user_project_wrapper.gds.gz b/gds/user_project_wrapper.gds.gz
index 7221d5a..7015b52 100644
--- a/gds/user_project_wrapper.gds.gz
+++ b/gds/user_project_wrapper.gds.gz
Binary files differ
diff --git a/info.yaml b/info.yaml
index bdd53ba..e9cf7a4 100644
--- a/info.yaml
+++ b/info.yaml
@@ -1,19 +1,20 @@
----
project:
- description: "A template SoC for Google sponsored Open MPW shuttles for SKY130."
- foundry: "SkyWater"
- git_url: "https://github.com/efabless/caravel_project_example.git"
- organization: "Efabless"
- organization_url: "http://efabless.com"
- owner: "Tim Edwards"
- process: "SKY130"
- project_name: "Caravel"
- project_id: "00000000"
+ category: Test Harness
+ cover_image: docs/source/_static/caravel_harness.png
+ description: A template SoC for Google sponsored Open MPW shuttles for SKY130.
+ foundry: SkyWater
+ git_url: https://github.com/efabless/caravel_project_example.git
+ layout_image: ./gds/caravel.png
+ organization: Efabless
+ organization_url: http://efabless.com
+ owner: Tim Edwards
+ process: SKY130
+ project_id: '00020004'
+ project_name: Caravel
+ shuttle_url: https://foss-eda-tools.googlesource.com/third_party/shuttle/mpw-two/slot-004.git
tags:
- - "Open MPW"
- - "Test Harness"
- category: "Test Harness"
- top_level_netlist: "caravel/verilog/gl/caravel.v"
- user_level_netlist: "verilog/gl/user_project_wrapper.v"
- version: "1.00"
- cover_image: "docs/source/_static/caravel_harness.png"
+ - Open MPW
+ - Test Harness
+ top_level_netlist: caravel/verilog/gl/caravel.v
+ user_level_netlist: verilog/gl/user_project_wrapper.v
+ version: '1.00'
diff --git a/mag/.magicrc b/mag/.magicrc
new file mode 100644
index 0000000..12328c6
--- /dev/null
+++ b/mag/.magicrc
@@ -0,0 +1,97 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch. This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+ scalegrid 1 2
+}
+
+drc off
+drc euclidean on
+
+# Allow override of PDK path from environment variable PDKPATH
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+ set PDKPATH "$::env(PDK_ROOT)/sky130A"
+}
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/sky130A.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/sky130A-BindKeys
+
+# set units to lambda grid
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+ set MAGTYPE maglef
+}
+
+ path search [concat "../$MAGTYPE" [path search]]
+
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+ addpath ${PDKPATH}/libs.ref/mag/sky130_ml_xx_hd
+} else {
+ addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_ml_xx_hd/mag
+}
+
+addpath hexdigits
+addpath ../subcells/simple_por/mag
+
+# add path to GDS cells
+
+# add path to IP from catalog. This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space. Defined in the PDK script.
+catch {magic::query_my_projects}
diff --git a/mag/compose_final.tcl b/mag/compose_final.tcl
new file mode 100644
index 0000000..9de8bfd
--- /dev/null
+++ b/mag/compose_final.tcl
@@ -0,0 +1,28 @@
+#!/bin/env wish
+drc off
+random seed 131076
+load caravel -dereference
+property GDS_FILE /mnt/shuttles/shuttle/mpw-two/slot-004/caravel_dsp2/gds/caravel.gds
+property GDS_START 0
+select top cell
+set bbox [box values]
+load caravel_00020004_fill_pattern -quiet
+snap internal
+box values {*}$bbox
+paint comment
+property GDS_FILE /mnt/shuttles/shuttle/mpw-two/slot-004/caravel_dsp2/gds/caravel_00020004_fill_pattern.gds
+property GDS_START 0
+property FIXED_BBOX "$bbox"
+load caravel_00020004 -quiet
+box values 0 0 0 0
+box position 6um 6um
+getcell caravel child 0 0
+getcell caravel_00020004_fill_pattern child 0 0
+box position 0 0
+getcell advSeal_6um_gen
+puts stdout "Writing final GDS. . . "
+flush stdout
+gds undefined allow
+cif *hier write disable
+gds write /mnt/shuttles/shuttle/mpw-two/slot-004/caravel_dsp2/gds/caravel_00020004.gds
+quit -noprompt
diff --git a/mag/user_id_programming.mag b/mag/user_id_programming.mag
new file mode 100644
index 0000000..12006b5
--- /dev/null
+++ b/mag/user_id_programming.mag
@@ -0,0 +1,3159 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606755340
+<< nwell >>
+rect 2304 2369 2397 2389
+<< viali >>
+rect 4353 5117 4387 5151
+rect 5273 5117 5307 5151
+rect 2145 4641 2179 4675
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+rect 1685 1377 1719 1411
+rect 2973 1377 3007 1411
+rect 4629 1377 4663 1411
+<< metal1 >>
+rect 1104 6010 5980 6032
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+rect 2068 2144 2076 2208
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+rect 1756 1738 1798 1974
+rect 2034 1738 2076 1974
+rect 1756 1120 2076 1738
+rect 1756 1056 1764 1120
+rect 1828 1056 1844 1120
+rect 1908 1056 1924 1120
+rect 1988 1056 2004 1120
+rect 2068 1056 2076 1120
+rect 1756 1040 2076 1056
+rect 2569 6016 2889 6032
+rect 2569 5952 2577 6016
+rect 2641 5952 2657 6016
+rect 2721 5952 2737 6016
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+rect 2569 1664 2889 2554
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+rect 2721 1600 2737 1664
+rect 2801 1600 2817 1664
+rect 2881 1600 2889 1664
+rect 2569 1040 2889 1600
+rect 3382 5472 3702 6032
+rect 3382 5408 3390 5472
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+rect 3694 5408 3702 5472
+rect 3382 5238 3702 5408
+rect 3382 5002 3424 5238
+rect 3660 5002 3702 5238
+rect 3382 4384 3702 5002
+rect 3382 4320 3390 4384
+rect 3454 4320 3470 4384
+rect 3534 4320 3550 4384
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+rect 3694 4320 3702 4384
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+rect 3382 3370 3424 3606
+rect 3660 3370 3702 3606
+rect 3382 3296 3702 3370
+rect 3382 3232 3390 3296
+rect 3454 3232 3470 3296
+rect 3534 3232 3550 3296
+rect 3614 3232 3630 3296
+rect 3694 3232 3702 3296
+rect 3382 2208 3702 3232
+rect 3382 2144 3390 2208
+rect 3454 2144 3470 2208
+rect 3534 2144 3550 2208
+rect 3614 2144 3630 2208
+rect 3694 2144 3702 2208
+rect 3382 1974 3702 2144
+rect 3382 1738 3424 1974
+rect 3660 1738 3702 1974
+rect 3382 1120 3702 1738
+rect 3382 1056 3390 1120
+rect 3454 1056 3470 1120
+rect 3534 1056 3550 1120
+rect 3614 1056 3630 1120
+rect 3694 1056 3702 1120
+rect 3382 1040 3702 1056
+rect 4194 6016 4514 6032
+rect 4194 5952 4202 6016
+rect 4266 5952 4282 6016
+rect 4346 5952 4362 6016
+rect 4426 5952 4442 6016
+rect 4506 5952 4514 6016
+rect 4194 4928 4514 5952
+rect 4194 4864 4202 4928
+rect 4266 4864 4282 4928
+rect 4346 4864 4362 4928
+rect 4426 4864 4442 4928
+rect 4506 4864 4514 4928
+rect 4194 4422 4514 4864
+rect 4194 4186 4236 4422
+rect 4472 4186 4514 4422
+rect 4194 3840 4514 4186
+rect 4194 3776 4202 3840
+rect 4266 3776 4282 3840
+rect 4346 3776 4362 3840
+rect 4426 3776 4442 3840
+rect 4506 3776 4514 3840
+rect 4194 2790 4514 3776
+rect 4194 2752 4236 2790
+rect 4472 2752 4514 2790
+rect 4194 2688 4202 2752
+rect 4506 2688 4514 2752
+rect 4194 2554 4236 2688
+rect 4472 2554 4514 2688
+rect 4194 1664 4514 2554
+rect 4194 1600 4202 1664
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+rect 4346 1600 4362 1664
+rect 4426 1600 4442 1664
+rect 4506 1600 4514 1664
+rect 4194 1040 4514 1600
+rect 5007 5472 5327 6032
+rect 5007 5408 5015 5472
+rect 5079 5408 5095 5472
+rect 5159 5408 5175 5472
+rect 5239 5408 5255 5472
+rect 5319 5408 5327 5472
+rect 5007 5238 5327 5408
+rect 5007 5002 5049 5238
+rect 5285 5002 5327 5238
+rect 5007 4384 5327 5002
+rect 5007 4320 5015 4384
+rect 5079 4320 5095 4384
+rect 5159 4320 5175 4384
+rect 5239 4320 5255 4384
+rect 5319 4320 5327 4384
+rect 5007 3606 5327 4320
+rect 5007 3370 5049 3606
+rect 5285 3370 5327 3606
+rect 5007 3296 5327 3370
+rect 5007 3232 5015 3296
+rect 5079 3232 5095 3296
+rect 5159 3232 5175 3296
+rect 5239 3232 5255 3296
+rect 5319 3232 5327 3296
+rect 5007 2208 5327 3232
+rect 5007 2144 5015 2208
+rect 5079 2144 5095 2208
+rect 5159 2144 5175 2208
+rect 5239 2144 5255 2208
+rect 5319 2144 5327 2208
+rect 5007 1974 5327 2144
+rect 5007 1738 5049 1974
+rect 5285 1738 5327 1974
+rect 5007 1120 5327 1738
+rect 5007 1056 5015 1120
+rect 5079 1056 5095 1120
+rect 5159 1056 5175 1120
+rect 5239 1056 5255 1120
+rect 5319 1056 5327 1120
+rect 5007 1040 5327 1056
+<< via4 >>
+rect 1798 5002 2034 5238
+rect 1798 3370 2034 3606
+rect 1798 1738 2034 1974
+rect 2611 4186 2847 4422
+rect 2611 2752 2847 2790
+rect 2611 2688 2641 2752
+rect 2641 2688 2657 2752
+rect 2657 2688 2721 2752
+rect 2721 2688 2737 2752
+rect 2737 2688 2801 2752
+rect 2801 2688 2817 2752
+rect 2817 2688 2847 2752
+rect 2611 2554 2847 2688
+rect 3424 5002 3660 5238
+rect 3424 3370 3660 3606
+rect 3424 1738 3660 1974
+rect 4236 4186 4472 4422
+rect 4236 2752 4472 2790
+rect 4236 2688 4266 2752
+rect 4266 2688 4282 2752
+rect 4282 2688 4346 2752
+rect 4346 2688 4362 2752
+rect 4362 2688 4426 2752
+rect 4426 2688 4442 2752
+rect 4442 2688 4472 2752
+rect 4236 2554 4472 2688
+rect 5049 5002 5285 5238
+rect 5049 3370 5285 3606
+rect 5049 1738 5285 1974
+<< metal5 >>
+rect 1104 5238 5980 5280
+rect 1104 5002 1798 5238
+rect 2034 5002 3424 5238
+rect 3660 5002 5049 5238
+rect 5285 5002 5980 5238
+rect 1104 4960 5980 5002
+rect 1104 4422 5980 4464
+rect 1104 4186 2611 4422
+rect 2847 4186 4236 4422
+rect 4472 4186 5980 4422
+rect 1104 4144 5980 4186
+rect 1104 3606 5980 3648
+rect 1104 3370 1798 3606
+rect 2034 3370 3424 3606
+rect 3660 3370 5049 3606
+rect 5285 3370 5980 3606
+rect 1104 3328 5980 3370
+rect 1104 2790 5980 2832
+rect 1104 2554 2611 2790
+rect 2847 2554 4236 2790
+rect 4472 2554 5980 2790
+rect 1104 2512 5980 2554
+rect 1104 1974 5980 2016
+rect 1104 1738 1798 1974
+rect 2034 1738 3424 1974
+rect 3660 1738 5049 1974
+rect 5285 1738 5980 1974
+rect 1104 1696 5980 1738
+use sky130_fd_sc_hd__decap_3 PHY_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 1104 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3 PHY_2
+timestamp 1606755340
+transform 1 0 1104 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3 FILLER_1_6
+timestamp 1606755340
+transform 1 0 1656 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[27\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 1472 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[28\]
+timestamp 1606755340
+transform 1 0 1932 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[3\]
+timestamp 1606755340
+transform 1 0 1380 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 1380 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8 FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 1748 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2 FILLER_1_12 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 2208 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_3 FILLER_0_15
+timestamp 1606755340
+transform 1 0 2484 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[0\]
+timestamp 1606755340
+transform 1 0 2392 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[11\]
+timestamp 1606755340
+transform 1 0 2668 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[1\]
+timestamp 1606755340
+transform 1 0 3036 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[20\]
+timestamp 1606755340
+transform 1 0 2760 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_1_20
+timestamp 1606755340
+transform 1 0 2944 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8 FILLER_0_21
+timestamp 1606755340
+transform 1 0 3036 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_6 FILLER_1_24 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 3312 0 1 1632
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[15\]
+timestamp 1606755340
+transform 1 0 4416 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[7\]
+timestamp 1606755340
+transform 1 0 3864 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 3956 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2 FILLER_0_29
+timestamp 1606755340
+transform 1 0 3772 0 -1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4 FILLER_0_32 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 4048 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12 FILLER_1_33 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1606755340
+transform 1 0 4140 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_3 PHY_1
+timestamp 1606755340
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3 PHY_3
+timestamp 1606755340
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3 FILLER_0_47
+timestamp 1606755340
+transform 1 0 5428 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[4\]
+timestamp 1606755340
+transform 1 0 5428 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_8 FILLER_0_39
+timestamp 1606755340
+transform 1 0 4692 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2 FILLER_1_45
+timestamp 1606755340
+transform 1 0 5244 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_3 PHY_4
+timestamp 1606755340
+transform 1 0 1104 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12 FILLER_2_3
+timestamp 1606755340
+transform 1 0 1380 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12 FILLER_2_15
+timestamp 1606755340
+transform 1 0 2484 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[13\]
+timestamp 1606755340
+transform 1 0 4600 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19
+timestamp 1606755340
+transform 1 0 3956 0 -1 2720
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4 FILLER_2_27
+timestamp 1606755340
+transform 1 0 3588 0 -1 2720
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_6 FILLER_2_32
+timestamp 1606755340
+transform 1 0 4048 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3 PHY_5
+timestamp 1606755340
+transform -1 0 5980 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[9\]
+timestamp 1606755340
+transform 1 0 4876 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_6 FILLER_2_44
+timestamp 1606755340
+transform 1 0 5152 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3 PHY_6
+timestamp 1606755340
+transform 1 0 1104 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[31\]
+timestamp 1606755340
+transform 1 0 1380 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12 FILLER_3_6
+timestamp 1606755340
+transform 1 0 1656 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12 FILLER_3_18
+timestamp 1606755340
+transform 1 0 2760 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12 FILLER_3_30
+timestamp 1606755340
+transform 1 0 3864 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_3 PHY_7
+timestamp 1606755340
+transform -1 0 5980 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_8 FILLER_3_42
+timestamp 1606755340
+transform 1 0 4968 0 1 2720
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3 PHY_8
+timestamp 1606755340
+transform 1 0 1104 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[17\]
+timestamp 1606755340
+transform 1 0 1472 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[24\]
+timestamp 1606755340
+transform 1 0 1748 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_4_3
+timestamp 1606755340
+transform 1 0 1380 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4 FILLER_4_10
+timestamp 1606755340
+transform 1 0 2024 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[14\]
+timestamp 1606755340
+transform 1 0 2484 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[25\]
+timestamp 1606755340
+transform 1 0 2944 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[8\]
+timestamp 1606755340
+transform 1 0 3220 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_4_14
+timestamp 1606755340
+transform 1 0 2392 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2 FILLER_4_18
+timestamp 1606755340
+transform 1 0 2760 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_3 FILLER_4_35
+timestamp 1606755340
+transform 1 0 4324 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[16\]
+timestamp 1606755340
+transform 1 0 4600 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[22\]
+timestamp 1606755340
+transform 1 0 4048 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_4_30
+timestamp 1606755340
+transform 1 0 3864 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20
+timestamp 1606755340
+transform 1 0 3956 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4 FILLER_4_26
+timestamp 1606755340
+transform 1 0 3496 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_3 PHY_9
+timestamp 1606755340
+transform -1 0 5980 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[26\]
+timestamp 1606755340
+transform 1 0 5060 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2 FILLER_4_41
+timestamp 1606755340
+transform 1 0 4876 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4 FILLER_4_46
+timestamp 1606755340
+transform 1 0 5336 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_3 PHY_10
+timestamp 1606755340
+transform 1 0 1104 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[2\]
+timestamp 1606755340
+transform 1 0 1840 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[6\]
+timestamp 1606755340
+transform 1 0 1380 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2 FILLER_5_6
+timestamp 1606755340
+transform 1 0 1656 0 1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12 FILLER_5_11
+timestamp 1606755340
+transform 1 0 2116 0 1 3808
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8 FILLER_5_23
+timestamp 1606755340
+transform 1 0 3220 0 1 3808
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3 FILLER_5_31
+timestamp 1606755340
+transform 1 0 3956 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[10\]
+timestamp 1606755340
+transform 1 0 4232 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[18\]
+timestamp 1606755340
+transform 1 0 4508 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3 PHY_11
+timestamp 1606755340
+transform -1 0 5980 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[29\]
+timestamp 1606755340
+transform 1 0 5336 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_5_49
+timestamp 1606755340
+transform 1 0 5612 0 1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6 FILLER_5_40
+timestamp 1606755340
+transform 1 0 4784 0 1 3808
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3 PHY_12
+timestamp 1606755340
+transform 1 0 1104 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3 PHY_14
+timestamp 1606755340
+transform 1 0 1104 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[19\]
+timestamp 1606755340
+transform 1 0 1932 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_8 FILLER_6_12
+timestamp 1606755340
+transform 1 0 2208 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_6 FILLER_6_3
+timestamp 1606755340
+transform 1 0 1380 0 -1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12 FILLER_7_3
+timestamp 1606755340
+transform 1 0 1380 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[21\]
+timestamp 1606755340
+transform 1 0 3404 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[30\]
+timestamp 1606755340
+transform 1 0 3036 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_6_20
+timestamp 1606755340
+transform 1 0 2944 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1 FILLER_6_24
+timestamp 1606755340
+transform 1 0 3312 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12 FILLER_7_15
+timestamp 1606755340
+transform 1 0 2484 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_3 FILLER_6_28
+timestamp 1606755340
+transform 1 0 3680 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[12\]
+timestamp 1606755340
+transform 1 0 4508 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[5\]
+timestamp 1606755340
+transform 1 0 4140 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_6_36
+timestamp 1606755340
+transform 1 0 4416 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21
+timestamp 1606755340
+transform 1 0 3956 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4 FILLER_6_32
+timestamp 1606755340
+transform 1 0 4048 0 -1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_6 FILLER_7_27
+timestamp 1606755340
+transform 1 0 3588 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6 FILLER_7_36
+timestamp 1606755340
+transform 1 0 4416 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3 PHY_13
+timestamp 1606755340
+transform -1 0 5980 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3 PHY_15
+timestamp 1606755340
+transform -1 0 5980 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1 mask_rev_value\[23\]
+timestamp 1606755340
+transform 1 0 5060 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_1 FILLER_7_42
+timestamp 1606755340
+transform 1 0 4968 0 1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8 FILLER_6_40
+timestamp 1606755340
+transform 1 0 4784 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2 FILLER_6_48
+timestamp 1606755340
+transform 1 0 5520 0 -1 4896
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4 FILLER_7_46
+timestamp 1606755340
+transform 1 0 5336 0 1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_3 PHY_16
+timestamp 1606755340
+transform 1 0 1104 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12 FILLER_8_3
+timestamp 1606755340
+transform 1 0 1380 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12 FILLER_8_15
+timestamp 1606755340
+transform 1 0 2484 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22
+timestamp 1606755340
+transform 1 0 3956 0 -1 5984
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4 FILLER_8_27
+timestamp 1606755340
+transform 1 0 3588 0 -1 5984
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12 FILLER_8_32
+timestamp 1606755340
+transform 1 0 4048 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_3 PHY_17
+timestamp 1606755340
+transform -1 0 5980 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_6 FILLER_8_44
+timestamp 1606755340
+transform 1 0 5152 0 -1 5984
+box -38 -48 590 592
+<< labels >>
+rlabel metal2 s 4066 6277 4122 7077 4 mask_rev[0]
+port 1 nsew
+rlabel metal2 s 4066 0 4122 800 4 mask_rev[10]
+port 2 nsew
+rlabel metal2 s 1122 0 1178 800 4 mask_rev[11]
+port 3 nsew
+rlabel metal2 s 570 0 626 800 4 mask_rev[12]
+port 4 nsew
+rlabel metal2 s 5354 6277 5410 7077 4 mask_rev[13]
+port 5 nsew
+rlabel metal2 s 5906 0 5962 800 4 mask_rev[14]
+port 6 nsew
+rlabel metal3 s 6309 1640 7109 1760 4 mask_rev[15]
+port 7 nsew
+rlabel metal2 s 2226 0 2282 800 4 mask_rev[16]
+port 8 nsew
+rlabel metal2 s 1674 6277 1730 7077 4 mask_rev[17]
+port 9 nsew
+rlabel metal3 s 0 5176 800 5296 4 mask_rev[18]
+port 10 nsew
+rlabel metal2 s 2962 6277 3018 7077 4 mask_rev[19]
+port 11 nsew
+rlabel metal3 s 0 3272 800 3392 4 mask_rev[1]
+port 12 nsew
+rlabel metal3 s 6309 2456 7109 2576 4 mask_rev[20]
+port 13 nsew
+rlabel metal3 s 6309 824 7109 944 4 mask_rev[21]
+port 14 nsew
+rlabel metal3 s 0 5992 800 6112 4 mask_rev[22]
+port 15 nsew
+rlabel metal2 s 1674 0 1730 800 4 mask_rev[23]
+port 16 nsew
+rlabel metal2 s 5906 6277 5962 7077 4 mask_rev[24]
+port 17 nsew
+rlabel metal3 s 0 1640 800 1760 4 mask_rev[25]
+port 18 nsew
+rlabel metal2 s 4802 6277 4858 7077 4 mask_rev[26]
+port 19 nsew
+rlabel metal2 s 1122 6277 1178 7077 4 mask_rev[27]
+port 20 nsew
+rlabel metal2 s 6458 6277 6514 7077 4 mask_rev[28]
+port 21 nsew
+rlabel metal2 s 5354 0 5410 800 4 mask_rev[29]
+port 22 nsew
+rlabel metal3 s 0 2456 800 2576 4 mask_rev[2]
+port 23 nsew
+rlabel metal3 s 6309 5176 7109 5296 4 mask_rev[30]
+port 24 nsew
+rlabel metal2 s 2962 0 3018 800 4 mask_rev[31]
+port 25 nsew
+rlabel metal2 s 3514 0 3570 800 4 mask_rev[3]
+port 26 nsew
+rlabel metal3 s 6309 3544 7109 3664 4 mask_rev[4]
+port 27 nsew
+rlabel metal3 s 6309 4360 7109 4480 4 mask_rev[5]
+port 28 nsew
+rlabel metal3 s 0 4360 800 4480 4 mask_rev[6]
+port 29 nsew
+rlabel metal2 s 3514 6277 3570 7077 4 mask_rev[7]
+port 30 nsew
+rlabel metal2 s 4802 0 4858 800 4 mask_rev[8]
+port 31 nsew
+rlabel metal2 s 2226 6277 2282 7077 4 mask_rev[9]
+port 32 nsew
+rlabel metal5 s 1104 1696 5980 2016 4 VPWR
+port 33 nsew
+rlabel metal5 s 1104 2512 5980 2832 4 VGND
+port 34 nsew
+<< properties >>
+string FIXED_BBOX 0 0 7109 7077
+string GDS_FILE ../gds/user_id_programming.gds
+string GDS_START 0
+<< end >>
diff --git a/mag/user_id_textblock.mag b/mag/user_id_textblock.mag
new file mode 100644
index 0000000..2462e85
--- /dev/null
+++ b/mag/user_id_textblock.mag
@@ -0,0 +1,43 @@
+magic
+tech sky130A
+timestamp 1608324878
+<< checkpaint >>
+rect 1495 5490 6500 6570
+rect -630 428 19262 5490
+rect -630 -630 6210 428
+rect 16092 356 18972 428
+<< fillblock >>
+rect -328 754 16860 5172
+use alpha_0 alphaX_7 hexdigits
+timestamp 1598786981
+transform 1 0 0 0 1 1080
+box 0 0 1620 3780
+use alpha_0 alphaX_6 hexdigits
+timestamp 1598786981
+transform 1 0 2125 0 1 1080
+box 0 0 1620 3780
+use alpha_0 alphaX_5 hexdigits
+timestamp 1598786981
+transform 1 0 4250 0 1 1080
+box 0 0 1620 3780
+use alpha_2 alphaX_4 hexdigits
+timestamp 1598786981
+transform 1 0 6375 0 1 1080
+box 0 0 1620 3780
+use alpha_0 alphaX_3 hexdigits
+timestamp 1598786981
+transform 1 0 8500 0 1 1080
+box 0 0 1620 3780
+use alpha_0 alphaX_2 hexdigits
+timestamp 1598786981
+transform 1 0 10625 0 1 1080
+box 0 0 1620 3780
+use alpha_0 alphaX_1 hexdigits
+timestamp 1598786981
+transform 1 0 12750 0 1 1080
+box 0 0 1620 3780
+use alpha_4 alphaX_0 hexdigits
+timestamp 1598786981
+transform 1 0 14887 0 1 1080
+box 0 0 1620 3780
+<< end >>
diff --git a/signoff/.gitignore b/signoff/.gitignore
new file mode 100644
index 0000000..6407046
--- /dev/null
+++ b/signoff/.gitignore
@@ -0,0 +1 @@
+cdrcpost/*
diff --git a/verilog/dv/Makefile b/verilog/dv/Makefile
deleted file mode 100644
index d87238f..0000000
--- a/verilog/dv/Makefile
+++ /dev/null
@@ -1,39 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-# ---- Test patterns for project striVe ----
-
-.SUFFIXES:
-.SILENT: clean all
-
-PATTERNS = io_ports la_test1 la_test2 wb_port mprj_stimulus
-
-all: ${PATTERNS}
- for i in ${PATTERNS}; do \
- ( cd $$i && make -f Makefile $${i}.vcd &> verify.log && grep Monitor verify.log) ; \
- done
-
-DV_PATTERNS = $(foreach dv, $(PATTERNS), verify-$(dv))
-$(DV_PATTERNS): verify-% :
- cd $* && make
-
-clean: ${PATTERNS}
- for i in ${PATTERNS}; do \
- ( cd $$i && make clean ) ; \
- done
- rm -rf *.log
-
-.PHONY: clean all
diff --git a/verilog/dv/README.md b/verilog/dv/README.md
deleted file mode 100644
index 1a834f7..0000000
--- a/verilog/dv/README.md
+++ /dev/null
@@ -1,236 +0,0 @@
-<!---
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
--->
-
-# Simulation Environment Setup
-
-There are two options for setting up the simulation environment:
-
-* Pulling a pre-built docker image
-* Installing the dependecies locally
-
-## 1. Docker
-
-There is an available docker setup with the needed tools at [efabless/dockerized-verification-setup](https://github.com/efabless/dockerized-verification-setup)
-
-Run the following to pull the image:
-
-```
-docker pull efabless/dv_setup:latest
-```
-
-## 2. Local Installion (Linux)
-
-You will need to fullfil these dependecies:
-
-* Icarus Verilog (10.2+)
-* RV32I Toolchain
-
-Using apt, you can install Icarus Verilog:
-
-```bash
-sudo apt-get install iverilog
-```
-
-Next, you will need to build the RV32I toolchain. Firstly, export the installation path for the RV32I toolchain,
-
-```bash
-export GCC_PATH=<gcc-installation-path>
-```
-
-Then, run the following:
-
-```bash
-# packages needed:
-sudo apt-get install autoconf automake autotools-dev curl libmpc-dev \
- libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo \
- gperf libtool patchutils bc zlib1g-dev git libexpat1-dev
-
-sudo mkdir $GCC_PATH
-sudo chown $USER $GCC_PATH
-
-git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
-cd riscv-gnu-toolchain-rv32i
-git checkout 411d134
-git submodule update --init --recursive
-
-mkdir build; cd build
-../configure --with-arch=rv32i --prefix=$GCC_PATH
-make -j$(nproc)
-```
-
-# Running Simulation
-
-## Docker
-
-First, you will need to export a number of environment variables:
-
-```bash
-export PDK_PATH=<pdk-location/sky130A>
-export CARAVEL_ROOT=<caravel_root>
-export UPRJ_ROOT=<user_project_root>
-```
-
-Then, run the following command to start the docker container :
-
-```
-docker run -it -v $CARAVEL_ROOT:$CARAVEL_ROOT -v $PDK_PATH:$PDK_PATH -v $UPRJ_ROOT:$UPRJ_ROOT -e CARAVEL_ROOT=$CARAVEL_ROOT -e PDK_PATH=$PDK_PATH -e UPRJ_ROOT=$UPRJ_ROOT -u $(id -u $USER):$(id -g $USER) efabless/dv_setup:latest
-```
-
-Then, navigate to the directory where the DV tests reside :
-
-```bash
-cd $UPRJ_ROOT/verilog/dv/
-```
-
-Then, follow the instructions at [Both](#both) to run RTL/GL simulation.
-
-## Local
-
-You will need to export these environment variables:
-
-```bash
-export GCC_PATH=<gcc-installation-path>
-export PDK_PATH=<pdk-location/sky130A>
-```
-
-Then, follow the instruction at [Both](#both) to run RTL/GL simulation.
-
-## Both
-
-To run RTL simulation for one of the DV tests,
-
-```bash
-cd <dv-test>
-make
-```
-
-To run gate level simulation for one of the DV tests,
-
-```bash
-cd <dv-test>
-SIM=GL make
-```
-
-# User Project Example DV
-
-The directory includes four tests for the counter user-project example:
-
-### IO Ports Test
-
-* This test is meant to verify that we can configure the pads for the user project area. The firmware configures the lower 8 IO pads in the user space as outputs:
-
- ```c
- reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_1 = GPIO_MODE_USER_STD_OUTPUT;
- .....
- reg_mprj_io_7 = GPIO_MODE_USER_STD_OUTPUT;
- ```
-
-* Then, the firmware applies the pad configuration by enabling the serial transfer on the shift register responsible for configuring the pads and waits until the transfer is done.
- ```c
- reg_mprj_xfer = 1;
- while (reg_mprj_xfer == 1);
- ```
-
-* The testbench success criteria is that we can observe the counter value on the lower 8 I/O pads. This criteria is checked by the testbench through observing the values on the I/O pads as follows:
-
- ```verilog
- wait(mprj_io_0 == 8'h01);
- wait(mprj_io_0 == 8'h02);
- wait(mprj_io_0 == 8'h03);
- ....
- wait(mprj_io_0 == 8'hFF);
- ```
-
-* If the testbench fails, it will print a timeout message to the terminal.
-
-### Logic Analyzer Test 1
-
-* This test is meant to verify that we can use the logic analyzer to monitor and write signals in the user project from the management SoC. Firstly, the firmware configures the upper 16 of the first 32 GPIO pads as outputs from the managent SoC, applies the configuration by initiating the serial transfer on the shift register, and writes a value on the pads to indicate the end of pad configuration and the start of the test.
-
- ```c
- reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT;
- .....
- reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- reg_mprj_xfer = 1;
- while (reg_mprj_xfer == 1);
-
- // Flag start of the test
- reg_mprj_datal = 0xAB400000;
- ```
-
- This is done to flag the start/success/end of the simulation by writing a certain value to the I/Os which is then checked by the testbench to know whether the test started/ended/succeeded. For example, the testbench checks on the value of the upper 16 of 32 I/Os, if it is equal to `16'hAB40`, then we know that the test started.
-
- ```verilog
- wait(checkbits == 16'hAB40);
- $display("LA Test 1 started");
- ```
-
-* Then, the firmware configures the logic analyzer (LA) probes `[31:0]` as inputs to the management SoC to monitor the counter value, and configure the logic analyzer probes `[63:32]` as outputs from the management SoC (inputs to the user_proj_example) to set the counter initial value. This is done by writing to the LA probes enable registers. Note that the output enable is active low, while the input enable is active high. Every channel can be configured for input, output, or both independently.
-
-
- ```c
- reg_la0_oenb = reg_la0_iena = 0xFFFFFFFF; // [31:0] inputs to mgmt_soc
- reg_la1_oenb = reg_la1_iena = 0x00000000; // [63:32] outputs from mgmt_soc
- ```
-
-* Then, the firmware writes an initial value to the counter through the LA1 data register. Afte writing the counter value, the LA probes are disabled to prevent the counter write signal from being always set to one.
-
- ```c
- reg_la1_data = 0x00000000; // Write zero to count register
- reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF; // Disable probes
- ```
-
-* The firmware then waits until the count value exceeds 500 and flags the success of the test by writing `0xAB41` to pads 16 to 31. The firmware reads the count value through the logic analyzer probes `[31:0]`
-
- ```c
- if (reg_la0_data > 0x1F4) { // Read current count value through LA
- reg_mprj_datal = 0xAB410000; // Flag success of the test
- break;
- }
- ```
-
-### Logic Analyzer Test 2
-
-* This test is meant to verify that we can drive the clock and reset signals for the user project example through the logic analyzer. In the [user_proj_example](verilog/rtl/user_proj_example.v) RTL, the clock can either be supplied from the `wb_clk_i` or from the logic analyzer through bit `[64]`. Similarly, the reset signal can be supplied from the `wb_rst_i` or through `LA[65]`. The firmware configures the clk and reset LA probes as outputs from the management SoC by writing to the LA2 enable register.
-
- ```c
- reg_la2_oenb = reg_la2_iena = 0xFFFFFFFC; // Configure LA[64] LA[65] as outputs from the cpu
- ```
-
-* Then, the firmware supplies both clock reset signals through LA2 data register. First, both are set to one. Then, reset is driven to zero and the clock is toggled for 6 clock cycles.
-
- ```c
- reg_la2_data = 0x00000003; // Write one to LA[64] and LA[65]
- for (i=0; i<11; i=i+1) { // Toggle clk & de-assert reset
- clk = !clk;
- reg_la2_data = 0x00000000 | clk;
- }
- ```
-* The testbench success criteria is that the firmware reads a count value of five through the LA probes.
- ```c
- if (reg_la0_data == 0x05) {
- reg_mprj_datal = 0xAB610000; // FLag success of the test
- }
- ```
-
-### Wishbone Test
-
-* This test is meant to verify that we can read and write to the count register through the wishbone port. The firmware writes a value of `0x2710` to the count register, then reads back the count value after some time. The read and write transactions happen through the management SoC wishbone bus and are initiated by either writing or reading from the user project address on the wishbone bus.
diff --git a/verilog/dv/io_ports/Makefile b/verilog/dv/io_ports/Makefile
deleted file mode 100644
index 0ef079e..0000000
--- a/verilog/dv/io_ports/Makefile
+++ /dev/null
@@ -1,78 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-## Caravel Pointers
-CARAVEL_ROOT ?= ../../../caravel
-CARAVEL_PATH ?= $(CARAVEL_ROOT)
-CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel
-CARAVEL_VERILOG_PATH = $(CARAVEL_PATH)/verilog
-CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl
-CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel
-
-## User Project Pointers
-UPRJ_VERILOG_PATH ?= ../../../verilog
-UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl
-UPRJ_BEHAVIOURAL_MODELS = ../
-
-## RISCV GCC
-GCC_PATH?=/ef/apps/bin
-GCC_PREFIX?=riscv32-unknown-elf
-PDK_PATH?=/ef/tech/SW/sky130A
-
-## Simulation mode: RTL/GL
-SIM?=RTL
-
-.SUFFIXES:
-
-PATTERN = io_ports
-
-all: ${PATTERN:=.vcd}
-
-hex: ${PATTERN:=.hex}
-
-%.vvp: %_tb.v %.hex
-ifeq ($(SIM),RTL)
- iverilog -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I $(UPRJ_RTL_PATH) \
- $< -o $@
-else
- iverilog -DFUNCTIONAL -DSIM -DGL -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH) -I $(UPRJ_VERILOG_PATH) \
- $< -o $@
-endif
-
-%.vcd: %.vvp
- vvp $<
-
-%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s
- ${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<
-
-%.hex: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
- # to fix flash base address
- sed -i 's/@10000000/@00000000/g' $@
-
-%.bin: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
-
-# ---- Clean ----
-
-clean:
- rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
-
-.PHONY: clean hex all
diff --git a/verilog/dv/io_ports/io_ports.c b/verilog/dv/io_ports/io_ports.c
deleted file mode 100644
index 0b23571..0000000
--- a/verilog/dv/io_ports/io_ports.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020 Efabless Corporation
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- * SPDX-License-Identifier: Apache-2.0
- */
-
-// This include is relative to $CARAVEL_PATH (see Makefile)
-#include "verilog/dv/caravel/defs.h"
-#include "verilog/dv/caravel/stub.c"
-
-/*
- IO Test:
- - Configures MPRJ lower 8-IO pins as outputs
- - Observes counter value through the MPRJ lower 8 IO pins (in the testbench)
-*/
-
-void main()
-{
- /*
- IO Control Registers
- | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
- | 3-bits | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit |
-
- Output: 0000_0110_0000_1110 (0x1808) = GPIO_MODE_USER_STD_OUTPUT
- | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
- | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
-
-
- Input: 0000_0001_0000_1111 (0x0402) = GPIO_MODE_USER_STD_INPUT_NOPULL
- | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
- | 001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
-
- */
-
- /* Set up the housekeeping SPI to be connected internally so */
- /* that external pin changes don't affect it. */
-
- reg_spimaster_config = 0xa002; // Enable, prescaler = 2,
- // connect to housekeeping SPI
-
- // Connect the housekeeping SPI to the SPI master
- // so that the CSB line is not left floating. This allows
- // all of the GPIO pins to be used for user functions.
-
- // Configure lower 8-IOs as user output
- // Observe counter value in the testbench
- reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_1 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_2 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_3 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_4 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_5 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_6 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_7 = GPIO_MODE_USER_STD_OUTPUT;
-
- /* Apply configuration */
- reg_mprj_xfer = 1;
- while (reg_mprj_xfer == 1);
-
-}
-
diff --git a/verilog/dv/io_ports/io_ports_tb.v b/verilog/dv/io_ports/io_ports_tb.v
deleted file mode 100644
index f7628bc..0000000
--- a/verilog/dv/io_ports/io_ports_tb.v
+++ /dev/null
@@ -1,169 +0,0 @@
-// SPDX-FileCopyrightText: 2020 Efabless Corporation
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-// SPDX-License-Identifier: Apache-2.0
-
-`default_nettype none
-
-`timescale 1 ns / 1 ps
-
-`include "uprj_netlists.v"
-`include "caravel_netlists.v"
-`include "spiflash.v"
-
-module io_ports_tb;
- reg clock;
- reg RSTB;
- reg CSB;
- reg power1, power2;
- reg power3, power4;
-
- wire gpio;
- wire [37:0] mprj_io;
- wire [7:0] mprj_io_0;
-
- assign mprj_io_0 = mprj_io[7:0];
- // assign mprj_io_0 = {mprj_io[8:4],mprj_io[2:0]};
-
- assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
- // assign mprj_io[3] = 1'b1;
-
- // External clock is used by default. Make this artificially fast for the
- // simulation. Normally this would be a slow clock and the digital PLL
- // would be the fast clock.
-
- always #12.5 clock <= (clock === 1'b0);
-
- initial begin
- clock = 0;
- end
-
- initial begin
- $dumpfile("io_ports.vcd");
- $dumpvars(0, io_ports_tb);
-
- // Repeat cycles of 1000 clock edges as needed to complete testbench
- repeat (25) begin
- repeat (1000) @(posedge clock);
- // $display("+1000 cycles");
- end
- $display("%c[1;31m",27);
- `ifdef GL
- $display ("Monitor: Timeout, Test Mega-Project IO Ports (GL) Failed");
- `else
- $display ("Monitor: Timeout, Test Mega-Project IO Ports (RTL) Failed");
- `endif
- $display("%c[0m",27);
- $finish;
- end
-
- initial begin
- // Observe Output pins [7:0]
- wait(mprj_io_0 == 8'h01);
- wait(mprj_io_0 == 8'h02);
- wait(mprj_io_0 == 8'h03);
- wait(mprj_io_0 == 8'h04);
- wait(mprj_io_0 == 8'h05);
- wait(mprj_io_0 == 8'h06);
- wait(mprj_io_0 == 8'h07);
- wait(mprj_io_0 == 8'h08);
- wait(mprj_io_0 == 8'h09);
- wait(mprj_io_0 == 8'h0A);
- wait(mprj_io_0 == 8'hFF);
- wait(mprj_io_0 == 8'h00);
-
- `ifdef GL
- $display("Monitor: Test 1 Mega-Project IO (GL) Passed");
- `else
- $display("Monitor: Test 1 Mega-Project IO (RTL) Passed");
- `endif
- $finish;
- end
-
- initial begin
- RSTB <= 1'b0;
- CSB <= 1'b1; // Force CSB high
- #2000;
- RSTB <= 1'b1; // Release reset
- #170000;
- CSB = 1'b0; // CSB can be released
- end
-
- initial begin // Power-up sequence
- power1 <= 1'b0;
- power2 <= 1'b0;
- power3 <= 1'b0;
- power4 <= 1'b0;
- #100;
- power1 <= 1'b1;
- #100;
- power2 <= 1'b1;
- #100;
- power3 <= 1'b1;
- #100;
- power4 <= 1'b1;
- end
-
- always @(mprj_io) begin
- #1 $display("MPRJ-IO state = %b ", mprj_io[7:0]);
- end
-
- wire flash_csb;
- wire flash_clk;
- wire flash_io0;
- wire flash_io1;
-
- wire VDD3V3 = power1;
- wire VDD1V8 = power2;
- wire USER_VDD3V3 = power3;
- wire USER_VDD1V8 = power4;
- wire VSS = 1'b0;
-
- caravel uut (
- .vddio (VDD3V3),
- .vssio (VSS),
- .vdda (VDD3V3),
- .vssa (VSS),
- .vccd (VDD1V8),
- .vssd (VSS),
- .vdda1 (USER_VDD3V3),
- .vdda2 (USER_VDD3V3),
- .vssa1 (VSS),
- .vssa2 (VSS),
- .vccd1 (USER_VDD1V8),
- .vccd2 (USER_VDD1V8),
- .vssd1 (VSS),
- .vssd2 (VSS),
- .clock (clock),
- .gpio (gpio),
- .mprj_io (mprj_io),
- .flash_csb(flash_csb),
- .flash_clk(flash_clk),
- .flash_io0(flash_io0),
- .flash_io1(flash_io1),
- .resetb (RSTB)
- );
-
- spiflash #(
- .FILENAME("io_ports.hex")
- ) spiflash (
- .csb(flash_csb),
- .clk(flash_clk),
- .io0(flash_io0),
- .io1(flash_io1),
- .io2(), // not used
- .io3() // not used
- );
-
-endmodule
-`default_nettype wire
diff --git a/verilog/dv/la_test1/Makefile b/verilog/dv/la_test1/Makefile
deleted file mode 100644
index b23075d..0000000
--- a/verilog/dv/la_test1/Makefile
+++ /dev/null
@@ -1,78 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-## Caravel Pointers
-CARAVEL_ROOT ?= ../../../caravel
-CARAVEL_PATH ?= $(CARAVEL_ROOT)
-CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel
-CARAVEL_VERILOG_PATH = $(CARAVEL_PATH)/verilog
-CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl
-CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel
-
-## User Project Pointers
-UPRJ_VERILOG_PATH ?= ../../../verilog
-UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl
-UPRJ_BEHAVIOURAL_MODELS = ../
-
-## RISCV GCC
-GCC_PATH?=/ef/apps/bin
-GCC_PREFIX?=riscv32-unknown-elf
-PDK_PATH?=/ef/tech/SW/sky130A
-
-## Simulation mode: RTL/GL
-SIM?=RTL
-
-.SUFFIXES:
-
-PATTERN = la_test1
-
-all: ${PATTERN:=.vcd}
-
-hex: ${PATTERN:=.hex}
-
-%.vvp: %_tb.v %.hex
-ifeq ($(SIM),RTL)
- iverilog -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I $(UPRJ_RTL_PATH) \
- $< -o $@
-else
- iverilog -DFUNCTIONAL -DSIM -DGL -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH) -I $(UPRJ_VERILOG_PATH) \
- $< -o $@
-endif
-
-%.vcd: %.vvp
- vvp $<
-
-%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s
- ${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<
-
-%.hex: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
- # to fix flash base address
- sed -i 's/@10000000/@00000000/g' $@
-
-%.bin: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
-
-# ---- Clean ----
-
-clean:
- rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
-
-.PHONY: clean hex all
diff --git a/verilog/dv/la_test1/la_test1.c b/verilog/dv/la_test1/la_test1.c
deleted file mode 100644
index 220bdfe..0000000
--- a/verilog/dv/la_test1/la_test1.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020 Efabless Corporation
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- * SPDX-License-Identifier: Apache-2.0
- */
-
-// This include is relative to $CARAVEL_PATH (see Makefile)
-#include "verilog/dv/caravel/defs.h"
-#include "verilog/dv/caravel/stub.c"
-
-// --------------------------------------------------------
-
-/*
- MPRJ Logic Analyzer Test:
- - Observes counter value through LA probes [31:0]
- - Sets counter initial value through LA probes [63:32]
- - Flags when counter value exceeds 500 through the management SoC gpio
- - Outputs message to the UART when the test concludes successfuly
-*/
-
-void main()
-{
-
- /* Set up the housekeeping SPI to be connected internally so */
- /* that external pin changes don't affect it. */
-
- reg_spimaster_config = 0xa002; // Enable, prescaler = 2,
- // connect to housekeeping SPI
-
- // Connect the housekeeping SPI to the SPI master
- // so that the CSB line is not left floating. This allows
- // all of the GPIO pins to be used for user functions.
-
- // The upper GPIO pins are configured to be output
- // and accessble to the management SoC.
- // Used to flad the start/end of a test
- // The lower GPIO pins are configured to be output
- // and accessible to the user project. They show
- // the project count value, although this test is
- // designed to read the project count through the
- // logic analyzer probes.
- // I/O 6 is configured for the UART Tx line
-
- reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- reg_mprj_io_15 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_14 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_13 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_12 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_11 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_10 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_9 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_8 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_7 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_5 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_4 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_3 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_2 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_1 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT;
-
- reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- // Set UART clock to 64 kbaud (enable before I/O configuration)
- reg_uart_clkdiv = 625;
- reg_uart_enable = 1;
-
- /* Apply configuration */
- reg_mprj_xfer = 1;
- while (reg_mprj_xfer == 1);
-
- // Configure LA probes [31:0], [127:64] as inputs to the cpu
- // Configure LA probes [63:32] as outputs from the cpu
- reg_la0_oenb = reg_la0_iena = 0xFFFFFFFF; // [31:0]
- reg_la1_oenb = reg_la1_iena = 0x00000000; // [63:32]
- reg_la2_oenb = reg_la2_iena = 0xFFFFFFFF; // [95:64]
- reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF; // [127:96]
-
- // Flag start of the test
- reg_mprj_datal = 0xAB400000;
-
- // Set Counter value to zero through LA probes [63:32]
- reg_la1_data = 0x00000000;
-
- // Configure LA probes from [63:32] as inputs to disable counter write
- reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF;
-
- while (1) {
- if (reg_la0_data > 0x1F4) {
- reg_mprj_datal = 0xAB410000;
- break;
- }
- }
- print("\n");
- print("Monitor: Test 2 Passed\n\n"); // Makes simulation very long!
- reg_mprj_datal = 0xAB510000;
-}
-
diff --git a/verilog/dv/la_test1/la_test1_tb.v b/verilog/dv/la_test1/la_test1_tb.v
deleted file mode 100644
index 626e390..0000000
--- a/verilog/dv/la_test1/la_test1_tb.v
+++ /dev/null
@@ -1,149 +0,0 @@
-// SPDX-FileCopyrightText: 2020 Efabless Corporation
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-// SPDX-License-Identifier: Apache-2.0
-
-`default_nettype none
-
-`timescale 1 ns / 1 ps
-
-`include "uprj_netlists.v"
-`include "caravel_netlists.v"
-`include "spiflash.v"
-`include "tbuart.v"
-
-module la_test1_tb;
- reg clock;
- reg RSTB;
- reg CSB;
-
- reg power1, power2;
-
- wire gpio;
- wire uart_tx;
- wire [37:0] mprj_io;
- wire [15:0] checkbits;
-
- assign checkbits = mprj_io[31:16];
- assign uart_tx = mprj_io[6];
-
- always #12.5 clock <= (clock === 1'b0);
-
- initial begin
- clock = 0;
- end
-
- assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
-
- initial begin
- // $dumpfile("la_test1.vcd");
- // $dumpvars(0, la_test1_tb);
-
- // Repeat cycles of 1000 clock edges as needed to complete testbench
- repeat (200) begin
- repeat (1000) @(posedge clock);
- // $display("+1000 cycles");
- end
- $display("%c[1;31m",27);
- `ifdef GL
- $display ("Monitor: Timeout, Test LA (GL) Failed");
- `else
- $display ("Monitor: Timeout, Test LA (RTL) Failed");
- `endif
- $display("%c[0m",27);
- $finish;
- end
-
- initial begin
- wait(checkbits == 16'hAB40);
- $display("LA Test 1 started");
- wait(checkbits == 16'hAB41);
- wait(checkbits == 16'hAB51);
- #10000;
- $finish;
- end
-
- initial begin
- RSTB <= 1'b0;
- CSB <= 1'b1; // Force CSB high
- #2000;
- RSTB <= 1'b1; // Release reset
- #170000;
- CSB = 1'b0; // CSB can be released
- end
-
- initial begin // Power-up sequence
- power1 <= 1'b0;
- power2 <= 1'b0;
- #200;
- power1 <= 1'b1;
- #200;
- power2 <= 1'b1;
- end
-
- wire flash_csb;
- wire flash_clk;
- wire flash_io0;
- wire flash_io1;
-
- wire VDD1V8;
- wire VDD3V3;
- wire VSS;
-
- assign VDD3V3 = power1;
- assign VDD1V8 = power2;
- assign VSS = 1'b0;
-
- caravel uut (
- .vddio (VDD3V3),
- .vssio (VSS),
- .vdda (VDD3V3),
- .vssa (VSS),
- .vccd (VDD1V8),
- .vssd (VSS),
- .vdda1 (VDD3V3),
- .vdda2 (VDD3V3),
- .vssa1 (VSS),
- .vssa2 (VSS),
- .vccd1 (VDD1V8),
- .vccd2 (VDD1V8),
- .vssd1 (VSS),
- .vssd2 (VSS),
- .clock (clock),
- .gpio (gpio),
- .mprj_io (mprj_io),
- .flash_csb(flash_csb),
- .flash_clk(flash_clk),
- .flash_io0(flash_io0),
- .flash_io1(flash_io1),
- .resetb (RSTB)
- );
-
- spiflash #(
- .FILENAME("la_test1.hex")
- ) spiflash (
- .csb(flash_csb),
- .clk(flash_clk),
- .io0(flash_io0),
- .io1(flash_io1),
- .io2(), // not used
- .io3() // not used
- );
-
- // Testbench UART
- tbuart tbuart (
- .ser_rx(uart_tx)
- );
-
-endmodule
-`default_nettype wire
diff --git a/verilog/dv/la_test2/Makefile b/verilog/dv/la_test2/Makefile
deleted file mode 100644
index 14e48fc..0000000
--- a/verilog/dv/la_test2/Makefile
+++ /dev/null
@@ -1,78 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-## Caravel Pointers
-CARAVEL_ROOT ?= ../../../caravel
-CARAVEL_PATH ?= $(CARAVEL_ROOT)
-CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel
-CARAVEL_VERILOG_PATH = $(CARAVEL_PATH)/verilog
-CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl
-CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel
-
-## User Project Pointers
-UPRJ_VERILOG_PATH ?= ../../../verilog
-UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl
-UPRJ_BEHAVIOURAL_MODELS = ../
-
-## RISCV GCC
-GCC_PATH?=/ef/apps/bin
-GCC_PREFIX?=riscv32-unknown-elf
-PDK_PATH?=/ef/tech/SW/sky130A
-
-## Simulation mode: RTL/GL
-SIM?=RTL
-
-.SUFFIXES:
-
-PATTERN = la_test2
-
-all: ${PATTERN:=.vcd}
-
-hex: ${PATTERN:=.hex}
-
-%.vvp: %_tb.v %.hex
-ifeq ($(SIM),RTL)
- iverilog -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I $(UPRJ_RTL_PATH) \
- $< -o $@
-else
- iverilog -DFUNCTIONAL -DSIM -DGL -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH) -I $(UPRJ_VERILOG_PATH) \
- $< -o $@
-endif
-
-%.vcd: %.vvp
- vvp $<
-
-%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s
- ${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<
-
-%.hex: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
- # to fix flash base address
- sed -i 's/@10000000/@00000000/g' $@
-
-%.bin: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
-
-# ---- Clean ----
-
-clean:
- rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
-
-.PHONY: clean hex all
diff --git a/verilog/dv/la_test2/la_test2.c b/verilog/dv/la_test2/la_test2.c
deleted file mode 100644
index f9a293c..0000000
--- a/verilog/dv/la_test2/la_test2.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020 Efabless Corporation
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- * SPDX-License-Identifier: Apache-2.0
- */
-
-// This include is relative to $CARAVEL_PATH (see Makefile)
-#include "verilog/dv/caravel/defs.h"
-#include "verilog/dv/caravel/stub.c"
-
-/*
- MPRJ LA Test:
- - Sets counter clk through LA[64]
- - Sets counter rst through LA[65]
- - Observes count value for five clk cycle through LA[31:0]
-*/
-
-int clk = 0;
-int i;
-
-void main()
-{
- /* Set up the housekeeping SPI to be connected internally so */
- /* that external pin changes don't affect it. */
-
- reg_spimaster_config = 0xa002; // Enable, prescaler = 2,
- // connect to housekeeping SPI
-
- // Connect the housekeeping SPI to the SPI master
- // so that the CSB line is not left floating. This allows
- // all of the GPIO pins to be used for user functions.
-
-
- // All GPIO pins are configured to be output
- // Used to flad the start/end of a test
-
- reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- reg_mprj_io_15 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_14 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_13 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_12 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_11 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_10 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_9 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_8 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_7 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_5 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_4 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_3 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_2 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_1 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT;
-
- /* Apply configuration */
- reg_mprj_xfer = 1;
- while (reg_mprj_xfer == 1);
-
- // Configure All LA probes as inputs to the cpu
- reg_la0_oenb = reg_la0_iena = 0xFFFFFFFF; // [31:0]
- reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF; // [63:32]
- reg_la2_oenb = reg_la2_iena = 0xFFFFFFFF; // [95:64]
- reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF; // [127:96]
-
- // Flag start of the test
- reg_mprj_datal = 0xAB600000;
-
- // Configure LA[64] LA[65] as outputs from the cpu
- reg_la2_oenb = reg_la2_iena = 0xFFFFFFFC;
-
- // Set clk & reset to one
- reg_la2_data = 0x00000003;
-
- // Toggle clk & de-assert reset
- for (i=0; i<11; i=i+1) {
- clk = !clk;
- reg_la2_data = 0x00000000 | clk;
- }
-
- if (reg_la0_data == 0x05) {
- reg_mprj_datal = 0xAB610000;
- }
-
-}
-
diff --git a/verilog/dv/la_test2/la_test2_tb.v b/verilog/dv/la_test2/la_test2_tb.v
deleted file mode 100644
index e09905e..0000000
--- a/verilog/dv/la_test2/la_test2_tb.v
+++ /dev/null
@@ -1,139 +0,0 @@
-// SPDX-FileCopyrightText: 2020 Efabless Corporation
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-// SPDX-License-Identifier: Apache-2.0
-
-`default_nettype none
-
-`timescale 1 ns / 1 ps
-
-`include "uprj_netlists.v"
-`include "caravel_netlists.v"
-`include "spiflash.v"
-
-module la_test2_tb;
- reg clock;
- reg RSTB;
- reg CSB;
-
- reg power1, power2;
-
- wire gpio;
- wire [37:0] mprj_io;
- wire [15:0] checkbits;
-
- assign checkbits = mprj_io[31:16];
- assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
-
- always #12.5 clock <= (clock === 1'b0);
-
- initial begin
- clock = 0;
- end
-
- initial begin
- $dumpfile("la_test2.vcd");
- $dumpvars(0, la_test2_tb);
-
- // Repeat cycles of 1000 clock edges as needed to complete testbench
- repeat (30) begin
- repeat (1000) @(posedge clock);
- // $display("+1000 cycles");
- end
- $display("%c[1;31m",27);
- `ifdef GL
- $display ("Monitor: Timeout, Test Mega-Project IO (GL) Failed");
- `else
- $display ("Monitor: Timeout, Test Mega-Project IO (RTL) Failed");
- `endif
- $display("%c[0m",27);
- $finish;
- end
-
- initial begin
- wait(checkbits == 16'h AB60);
- $display("Monitor: Test 2 MPRJ-Logic Analyzer Started");
- wait(checkbits == 16'h AB61);
- $display("Monitor: Test 2 MPRJ-Logic Analyzer Passed");
- $finish;
- end
-
- initial begin
- RSTB <= 1'b0;
- CSB <= 1'b1; // Force CSB high
- #2000;
- RSTB <= 1'b1; // Release reset
- #170000;
- CSB = 1'b0; // CSB can be released
- end
-
- initial begin // Power-up sequence
- power1 <= 1'b0;
- power2 <= 1'b0;
- #200;
- power1 <= 1'b1;
- #200;
- power2 <= 1'b1;
- end
-
- wire flash_csb;
- wire flash_clk;
- wire flash_io0;
- wire flash_io1;
-
- wire VDD1V8;
- wire VDD3V3;
- wire VSS;
-
- assign VDD3V3 = power1;
- assign VDD1V8 = power2;
- assign VSS = 1'b0;
-
- caravel uut (
- .vddio (VDD3V3),
- .vssio (VSS),
- .vdda (VDD3V3),
- .vssa (VSS),
- .vccd (VDD1V8),
- .vssd (VSS),
- .vdda1 (VDD3V3),
- .vdda2 (VDD3V3),
- .vssa1 (VSS),
- .vssa2 (VSS),
- .vccd1 (VDD1V8),
- .vccd2 (VDD1V8),
- .vssd1 (VSS),
- .vssd2 (VSS),
- .clock (clock),
- .gpio (gpio),
- .mprj_io (mprj_io),
- .flash_csb(flash_csb),
- .flash_clk(flash_clk),
- .flash_io0(flash_io0),
- .flash_io1(flash_io1),
- .resetb (RSTB)
- );
-
- spiflash #(
- .FILENAME("la_test2.hex")
- ) spiflash (
- .csb(flash_csb),
- .clk(flash_clk),
- .io0(flash_io0),
- .io1(flash_io1),
- .io2(),
- .io3()
- );
-
-endmodule
-`default_nettype wire
diff --git a/verilog/dv/mprj_stimulus/Makefile b/verilog/dv/mprj_stimulus/Makefile
deleted file mode 100644
index 304d32c..0000000
--- a/verilog/dv/mprj_stimulus/Makefile
+++ /dev/null
@@ -1,78 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-## Caravel Pointers
-CARAVEL_ROOT ?= ../../../caravel
-CARAVEL_PATH ?= $(CARAVEL_ROOT)
-CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel
-CARAVEL_VERILOG_PATH = $(CARAVEL_PATH)/verilog
-CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl
-CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel
-
-## User Project Pointers
-UPRJ_VERILOG_PATH ?= ../../../verilog
-UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl
-UPRJ_BEHAVIOURAL_MODELS = ../
-
-## RISCV GCC
-GCC_PATH?=/ef/apps/bin
-GCC_PREFIX?=riscv32-unknown-elf
-PDK_PATH?=/ef/tech/SW/sky130A
-
-## Simulation mode: RTL/GL
-SIM?=RTL
-
-.SUFFIXES:
-
-PATTERN = mprj_stimulus
-
-all: ${PATTERN:=.vcd}
-
-hex: ${PATTERN:=.hex}
-
-%.vvp: %_tb.v %.hex
-ifeq ($(SIM),RTL)
- iverilog -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I $(UPRJ_RTL_PATH) \
- $< -o $@
-else
- iverilog -DFUNCTIONAL -DSIM -DGL -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH) -I $(UPRJ_VERILOG_PATH) \
- $< -o $@
-endif
-
-%.vcd: %.vvp
- vvp $<
-
-%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s
- ${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<
-
-%.hex: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
- # to fix flash base address
- sed -i 's/@10000000/@00000000/g' $@
-
-%.bin: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
-
-# ---- Clean ----
-
-clean:
- rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
-
-.PHONY: clean hex all
diff --git a/verilog/dv/mprj_stimulus/mprj_stimulus.c b/verilog/dv/mprj_stimulus/mprj_stimulus.c
deleted file mode 100644
index e4d0a2d..0000000
--- a/verilog/dv/mprj_stimulus/mprj_stimulus.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020 Efabless Corporation
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- * SPDX-License-Identifier: Apache-2.0
- */
-
-// This include is relative to $CARAVEL_PATH (see Makefile)
-#include "verilog/dv/caravel/defs.h"
-
-// --------------------------------------------------------
-
-void main()
-{
- // The upper GPIO pins are configured to be output
- // and accessble to the management SoC.
- // Used to flag the start/end of a test
- // The lower GPIO pins are configured to be output
- // and accessible to the user project. They show
- // the project count value, although this test is
- // designed to read the project count through the
- // logic analyzer probes.
- // I/O 6 is configured for the UART Tx line
- uint32_t testval;
-
- reg_spimaster_config = 0xa002; // Enable, prescaler = 2
-
- reg_mprj_datal = 0x00000000;
- reg_mprj_datah = 0x00000000;
-
- reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT;;
- reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT;;
- reg_mprj_io_35 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL;
- reg_mprj_io_34 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL;
- reg_mprj_io_33 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL;
- reg_mprj_io_32 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL;
-
- reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- reg_mprj_io_15 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_14 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_13 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_12 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_11 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_10 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_9 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_8 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_7 = GPIO_MODE_USER_STD_OUT_MONITORED;
- reg_mprj_io_5 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_4 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_3 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_2 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_1 = GPIO_MODE_USER_STD_OUTPUT;
- reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT;
-
- reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- // Set UART clock to 64 kbaud (enable before I/O configuration)
- reg_uart_clkdiv = 625;
- reg_uart_enable = 1;
-
- /* Apply configuration */
- reg_mprj_xfer = 1;
- while (reg_mprj_xfer == 1);
-
- /* TEST: Recast channels 35 to 32 to allow input to user project */
- /* This is done locally only: Do not run reg_mprj_xfer! */
- reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- // Configure LA probes [31:0], [127:64] as inputs to the cpu
- // Configure LA probes [63:32] as outputs from the cpu
- reg_la0_oenb = reg_la0_iena = 0xFFFFFFFF; // [31:0]
- reg_la1_oenb = reg_la1_iena = 0x00000000; // [63:32]
- reg_la2_oenb = reg_la2_iena = 0xFFFFFFFF; // [95:64]
- reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF; // [127:96]
-
- // Flag start of the test
- reg_mprj_datal = 0xAB400000;
-
- // Set Counter value to zero through LA probes [63:32]
- reg_la1_data = 0x00000000;
-
- // Configure LA probes from [63:32] as inputs to disable counter write
- reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF;
-
- reg_mprj_datal = 0xAB410000;
- reg_mprj_datah = 0x00000000;
-
- // Test ability to force data on channel 37
- // NOTE: Only the low 6 bits of reg_mprj_datah are meaningful
- reg_mprj_datah = 0xffffffca;
- reg_mprj_datah = 0x00000000;
- reg_mprj_datah = 0x0f0f0fc5;
- reg_mprj_datah = 0x00000000;
-
- // Test ability to read back data generated by the user project
- // on the "monitored" outputs. Read from the lower 16 bits and
- // copy the value to the upper 16 bits.
-
- testval = reg_mprj_datal;
- reg_mprj_datal = ((testval & 0xff8) << 9) & 0xffff0000;
-
- // Flag end of the test
- reg_mprj_datal = 0xAB510000;
-}
-
diff --git a/verilog/dv/mprj_stimulus/mprj_stimulus_tb.v b/verilog/dv/mprj_stimulus/mprj_stimulus_tb.v
deleted file mode 100644
index 1409015..0000000
--- a/verilog/dv/mprj_stimulus/mprj_stimulus_tb.v
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-FileCopyrightText: 2020 Efabless Corporation
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-// SPDX-License-Identifier: Apache-2.0
-
-`default_nettype wire
-
-`timescale 1 ns / 1 ps
-
-`include "uprj_netlists.v"
-`include "caravel_netlists.v"
-`include "spiflash.v"
-`include "tbuart.v"
-
-module mprj_stimulus_tb;
- // Signals declaration
- reg clock;
- reg RSTB;
- reg CSB;
- reg power1, power2;
- reg power3, power4;
-
- wire HIGH;
- wire LOW;
- wire TRI;
- assign HIGH = 1'b1;
- assign LOW = 1'b0;
- assign TRI = 1'bz;
-
- wire gpio;
- wire uart_tx;
- wire [37:0] mprj_io;
- wire [15:0] checkbits;
- wire [3:0] status;
-
- // Signals Assignment
- assign checkbits = mprj_io[31:16];
- assign status = mprj_io[35:32];
- assign uart_tx = mprj_io[6];
- assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
-
- always #12.5 clock <= (clock === 1'b0);
-
- initial begin
- clock = 0;
- end
-
- initial begin
- $dumpfile("mprj_stimulus.vcd");
- $dumpvars(0, mprj_stimulus_tb);
-
- // Repeat cycles of 1000 clock edges as needed to complete testbench
- repeat (150) begin
- repeat (1000) @(posedge clock);
- end
- $display("%c[1;31m",27);
- $display ("Monitor: Timeout, Test Project IO Stimulus (RTL) Failed");
- $display("%c[0m",27);
- $finish;
- end
-
- initial begin
- wait(checkbits == 16'hAB40);
- $display("Monitor: mprj_stimulus test started");
- wait(status == 4'ha);
- wait(status == 4'h5);
- // Value 0009 reflects copying user-controlled outputs to memory and back
- // to management-controlled outputs.
- wait(checkbits == 16'h0009);
- wait(checkbits == 16'hAB51);
- $display("Monitor: mprj_stimulus test Passed");
- #10000;
- $finish;
- end
-
- // Reset Operation
- initial begin
- RSTB <= 1'b0;
- CSB <= 1'b1; // Force CSB high
- #2000;
- RSTB <= 1'b1; // Release reset
- #170000;
- CSB = 1'b0; // CSB can be released
- end
-
- initial begin // Power-up sequence
- power1 <= 1'b0;
- power2 <= 1'b0;
- #200;
- power1 <= 1'b1;
- #200;
- power2 <= 1'b1;
- end
-
- wire flash_csb;
- wire flash_clk;
- wire flash_io0;
- wire flash_io1;
-
- wire VDD3V3 = power1;
- wire VDD1V8 = power2;
- wire VSS = 1'b0;
-
- caravel uut (
- .vddio (VDD3V3),
- .vssio (VSS),
- .vdda (VDD3V3),
- .vssa (VSS),
- .vccd (VDD1V8),
- .vssd (VSS),
- .vdda1 (VDD3V3),
- .vdda2 (VDD3V3),
- .vssa1 (VSS),
- .vssa2 (VSS),
- .vccd1 (VDD1V8),
- .vccd2 (VDD1V8),
- .vssd1 (VSS),
- .vssd2 (VSS),
- .clock (clock),
- .gpio (gpio),
- .mprj_io (mprj_io),
- .flash_csb(flash_csb),
- .flash_clk(flash_clk),
- .flash_io0(flash_io0),
- .flash_io1(flash_io1),
- .resetb (RSTB)
- );
-
-
- spiflash #(
- .FILENAME("mprj_stimulus.hex")
- ) spiflash (
- .csb(flash_csb),
- .clk(flash_clk),
- .io0(flash_io0),
- .io1(flash_io1),
- .io2(), // not used
- .io3() // not used
- );
-
- // Testbench UART
- tbuart tbuart (
- .ser_rx(uart_tx)
- );
-
-endmodule
-`default_nettype wire
diff --git a/verilog/dv/wb_port/Makefile b/verilog/dv/wb_port/Makefile
deleted file mode 100644
index 132a1cc..0000000
--- a/verilog/dv/wb_port/Makefile
+++ /dev/null
@@ -1,78 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-## Caravel Pointers
-CARAVEL_ROOT ?= ../../../caravel
-CARAVEL_PATH ?= $(CARAVEL_ROOT)
-CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel
-CARAVEL_VERILOG_PATH = $(CARAVEL_PATH)/verilog
-CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl
-CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel
-
-## User Project Pointers
-UPRJ_VERILOG_PATH ?= ../../../verilog
-UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl
-UPRJ_BEHAVIOURAL_MODELS = ../
-
-## RISCV GCC
-GCC_PATH?=/ef/apps/bin
-GCC_PREFIX?=riscv32-unknown-elf
-PDK_PATH?=/ef/tech/SW/sky130A
-
-## Simulation mode: RTL/GL
-SIM?=RTL
-
-.SUFFIXES:
-
-PATTERN = wb_port
-
-all: ${PATTERN:=.vcd}
-
-hex: ${PATTERN:=.hex}
-
-%.vvp: %_tb.v %.hex
-ifeq ($(SIM),RTL)
- iverilog -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I $(UPRJ_RTL_PATH) \
- $< -o $@
-else
- iverilog -DFUNCTIONAL -DSIM -DGL -I $(PDK_PATH) \
- -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \
- -I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH) -I $(UPRJ_VERILOG_PATH) \
- $< -o $@
-endif
-
-%.vcd: %.vvp
- vvp $<
-
-%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s
- ${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<
-
-%.hex: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
- # to fix flash base address
- sed -i 's/@10000000/@00000000/g' $@
-
-%.bin: %.elf
- ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
-
-# ---- Clean ----
-
-clean:
- rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
-
-.PHONY: clean hex all
diff --git a/verilog/dv/wb_port/wb_port.c b/verilog/dv/wb_port/wb_port.c
deleted file mode 100644
index 425c115..0000000
--- a/verilog/dv/wb_port/wb_port.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020 Efabless Corporation
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- * SPDX-License-Identifier: Apache-2.0
- */
-
-// This include is relative to $CARAVEL_PATH (see Makefile)
-#include "verilog/dv/caravel/defs.h"
-#include "verilog/dv/caravel/stub.c"
-
-/*
- Wishbone Test:
- - Configures MPRJ lower 8-IO pins as outputs
- - Checks counter value through the wishbone port
-*/
-int i = 0;
-int clk = 0;
-
-void main()
-{
-
- /*
- IO Control Registers
- | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
- | 3-bits | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit |
- Output: 0000_0110_0000_1110 (0x1808) = GPIO_MODE_USER_STD_OUTPUT
- | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
- | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
-
-
- Input: 0000_0001_0000_1111 (0x0402) = GPIO_MODE_USER_STD_INPUT_NOPULL
- | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
- | 001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
- */
-
- /* Set up the housekeeping SPI to be connected internally so */
- /* that external pin changes don't affect it. */
-
- reg_spimaster_config = 0xa002; // Enable, prescaler = 2,
- // connect to housekeeping SPI
-
- // Connect the housekeeping SPI to the SPI master
- // so that the CSB line is not left floating. This allows
- // all of the GPIO pins to be used for user functions.
-
- reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT;
- reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT;
-
- /* Apply configuration */
- reg_mprj_xfer = 1;
- while (reg_mprj_xfer == 1);
-
- reg_la2_oenb = reg_la2_iena = 0xFFFFFFFF; // [95:64]
-
- // Flag start of the test
- reg_mprj_datal = 0xAB600000;
-
- reg_mprj_slave = 0x00002710;
- if (reg_mprj_slave == 0x2752) {
- reg_mprj_datal = 0xAB610000;
- } else {
- reg_mprj_datal = 0xAB600000;
- }
-}
diff --git a/verilog/dv/wb_port/wb_port_tb.v b/verilog/dv/wb_port/wb_port_tb.v
deleted file mode 100644
index b32f900..0000000
--- a/verilog/dv/wb_port/wb_port_tb.v
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-FileCopyrightText: 2020 Efabless Corporation
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-// SPDX-License-Identifier: Apache-2.0
-
-`default_nettype none
-
-`timescale 1 ns / 1 ps
-
-`include "uprj_netlists.v"
-`include "caravel_netlists.v"
-`include "spiflash.v"
-
-module wb_port_tb;
- reg clock;
- reg RSTB;
- reg CSB;
- reg power1, power2;
- reg power3, power4;
-
- wire gpio;
- wire [37:0] mprj_io;
- wire [7:0] mprj_io_0;
- wire [15:0] checkbits;
-
- assign checkbits = mprj_io[31:16];
-
- assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
-
- // External clock is used by default. Make this artificially fast for the
- // simulation. Normally this would be a slow clock and the digital PLL
- // would be the fast clock.
-
- always #12.5 clock <= (clock === 1'b0);
-
- initial begin
- clock = 0;
- end
-
- initial begin
- $dumpfile("wb_port.vcd");
- $dumpvars(0, wb_port_tb);
-
- // Repeat cycles of 1000 clock edges as needed to complete testbench
- repeat (30) begin
- repeat (1000) @(posedge clock);
- // $display("+1000 cycles");
- end
- $display("%c[1;31m",27);
- `ifdef GL
- $display ("Monitor: Timeout, Test Mega-Project WB Port (GL) Failed");
- `else
- $display ("Monitor: Timeout, Test Mega-Project WB Port (RTL) Failed");
- `endif
- $display("%c[0m",27);
- $finish;
- end
-
- initial begin
- wait(checkbits == 16'h AB60);
- $display("Monitor: MPRJ-Logic WB Started");
- wait(checkbits == 16'h AB61);
- `ifdef GL
- $display("Monitor: Mega-Project WB (GL) Passed");
- `else
- $display("Monitor: Mega-Project WB (RTL) Passed");
- `endif
- $finish;
- end
-
- initial begin
- RSTB <= 1'b0;
- CSB <= 1'b1; // Force CSB high
- #2000;
- RSTB <= 1'b1; // Release reset
- #170000;
- CSB = 1'b0; // CSB can be released
- end
-
- initial begin // Power-up sequence
- power1 <= 1'b0;
- power2 <= 1'b0;
- power3 <= 1'b0;
- power4 <= 1'b0;
- #100;
- power1 <= 1'b1;
- #100;
- power2 <= 1'b1;
- #100;
- power3 <= 1'b1;
- #100;
- power4 <= 1'b1;
- end
-
- always @(mprj_io) begin
- #1 $display("MPRJ-IO state = %b ", mprj_io[7:0]);
- end
-
- wire flash_csb;
- wire flash_clk;
- wire flash_io0;
- wire flash_io1;
-
- wire VDD3V3 = power1;
- wire VDD1V8 = power2;
- wire USER_VDD3V3 = power3;
- wire USER_VDD1V8 = power4;
- wire VSS = 1'b0;
-
- caravel uut (
- .vddio (VDD3V3),
- .vssio (VSS),
- .vdda (VDD3V3),
- .vssa (VSS),
- .vccd (VDD1V8),
- .vssd (VSS),
- .vdda1 (USER_VDD3V3),
- .vdda2 (USER_VDD3V3),
- .vssa1 (VSS),
- .vssa2 (VSS),
- .vccd1 (USER_VDD1V8),
- .vccd2 (USER_VDD1V8),
- .vssd1 (VSS),
- .vssd2 (VSS),
- .clock (clock),
- .gpio (gpio),
- .mprj_io (mprj_io),
- .flash_csb(flash_csb),
- .flash_clk(flash_clk),
- .flash_io0(flash_io0),
- .flash_io1(flash_io1),
- .resetb (RSTB)
- );
-
- spiflash #(
- .FILENAME("wb_port.hex")
- ) spiflash (
- .csb(flash_csb),
- .clk(flash_clk),
- .io0(flash_io0),
- .io1(flash_io1),
- .io2(), // not used
- .io3() // not used
- );
-
-endmodule
-`default_nettype wire
\ No newline at end of file
diff --git a/verilog/gl/user_proj_example.v b/verilog/gl/user_proj_example.v
deleted file mode 100644
index 7bb8d42..0000000
--- a/verilog/gl/user_proj_example.v
+++ /dev/null
@@ -1,442537 +0,0 @@
-module user_proj_example (wb_clk_i,
- wb_rst_i,
- wbs_ack_o,
- wbs_cyc_i,
- wbs_stb_i,
- wbs_we_i,
- vccd1,
- vssd1,
- vccd2,
- vssd2,
- vdda1,
- vssa1,
- vdda2,
- vssa2,
- io_in,
- io_oeb,
- io_out,
- irq,
- la_data_in,
- la_data_out,
- la_oenb,
- wbs_adr_i,
- wbs_dat_i,
- wbs_dat_o,
- wbs_sel_i);
- input wb_clk_i;
- input wb_rst_i;
- output wbs_ack_o;
- input wbs_cyc_i;
- input wbs_stb_i;
- input wbs_we_i;
- input vccd1;
- input vssd1;
- input vccd2;
- input vssd2;
- input vdda1;
- input vssa1;
- input vdda2;
- input vssa2;
- input [37:0] io_in;
- output [37:0] io_oeb;
- output [37:0] io_out;
- output [2:0] irq;
- input [127:0] la_data_in;
- output [127:0] la_data_out;
- input [127:0] la_oenb;
- input [31:0] wbs_adr_i;
- input [31:0] wbs_dat_i;
- output [31:0] wbs_dat_o;
- input [3:0] wbs_sel_i;
-
- sky130_fd_sc_hd__inv_2 _16136_ (.A(\ptc2_i.rptc_ctrl[8] ),
- .Y(_13340_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16137_ (.A(net957),
- .Y(_13341_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16138_ (.A(net325),
- .B(net307),
- .C(net296),
- .X(_13342_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16139_ (.A(net984),
- .B(net978),
- .C(_13342_),
- .X(_13343_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_4 _16140_ (.A(net956),
- .B(net980),
- .X(_13344_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16141_ (.A(net959),
- .X(_13345_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16142_ (.A(net1370),
- .Y(_13346_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _16143_ (.A(net943),
- .B(_13346_),
- .C(net1373),
- .X(_13347_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16144_ (.A(net931),
- .Y(_13348_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16145_ (.A(net992),
- .B(net985),
- .C(net993),
- .D(net981),
- .X(_13349_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4bb_4 _16146_ (.A(net320),
- .B(net996),
- .C_N(net316),
- .D_N(net317),
- .X(_13350_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16147_ (.A(net948),
- .B(net945),
- .C(net983),
- .D(net995),
- .X(_13351_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkinv_4 _16148_ (.A(net1000),
- .Y(_13352_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_2 _16149_ (.A(net310),
- .B(net309),
- .C(net308),
- .X(_13353_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16150_ (.A(net314),
- .B(net313),
- .C(net312),
- .D(net1097),
- .X(_13354_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16151_ (.A(net1094),
- .B(net1076),
- .C(net1098),
- .D_N(net1102),
- .X(_13355_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16152_ (.A(net999),
- .B(net1079),
- .X(_13356_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16153_ (.A(net1308),
- .B(_13348_),
- .C(net947),
- .D(net1002),
- .X(_13357_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_2 _16154_ (.A(_13345_),
- .B(_13347_),
- .C(net1309),
- .X(_13358_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16155_ (.A(_13358_),
- .X(_01476_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16156_ (.A(_13340_),
- .B(net663),
- .Y(_13359_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16157_ (.A(_13359_),
- .X(_13360_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16158_ (.A(_13360_),
- .X(_13361_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16159_ (.A(_13359_),
- .Y(_13362_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16160_ (.A(_13362_),
- .X(_13363_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16161_ (.A(_13363_),
- .X(_13364_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16162_ (.A1(_00352_),
- .A2(_13361_),
- .B1(\ptc2_i.rptc_lrc[31] ),
- .B2(_13364_),
- .X(_05665_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_4 _16163_ (.A(net780),
- .Y(_13365_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16164_ (.A(net783),
- .X(_13366_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16165_ (.A(_13366_),
- .X(_05299_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16166_ (.A1(_00351_),
- .A2(_13361_),
- .B1(\ptc2_i.rptc_lrc[30] ),
- .B2(_13364_),
- .X(_05664_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16167_ (.A(_05299_),
- .X(_05298_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16168_ (.A1(_00349_),
- .A2(_13361_),
- .B1(\ptc2_i.rptc_lrc[29] ),
- .B2(_13364_),
- .X(_05663_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16169_ (.A(_05299_),
- .X(_05297_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16170_ (.A1(_00348_),
- .A2(_13361_),
- .B1(\ptc2_i.rptc_lrc[28] ),
- .B2(_13364_),
- .X(_05662_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16171_ (.A(_05299_),
- .X(_05296_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16172_ (.A1(_00347_),
- .A2(_13361_),
- .B1(\ptc2_i.rptc_lrc[27] ),
- .B2(_13364_),
- .X(_05661_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16173_ (.A(_05299_),
- .X(_05295_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16174_ (.A1(_00346_),
- .A2(_13361_),
- .B1(\ptc2_i.rptc_lrc[26] ),
- .B2(_13364_),
- .X(_05660_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16175_ (.A(_05299_),
- .X(_05294_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16176_ (.A(_13360_),
- .X(_13367_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16177_ (.A(_13363_),
- .X(_13368_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16178_ (.A1(_00345_),
- .A2(_13367_),
- .B1(\ptc2_i.rptc_lrc[25] ),
- .B2(_13368_),
- .X(_05659_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16179_ (.A(_13366_),
- .X(_13369_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16180_ (.A(_13369_),
- .X(_05293_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16181_ (.A1(_00344_),
- .A2(_13367_),
- .B1(\ptc2_i.rptc_lrc[24] ),
- .B2(_13368_),
- .X(_05658_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16182_ (.A(_13369_),
- .X(_05292_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16183_ (.A1(_00343_),
- .A2(_13367_),
- .B1(\ptc2_i.rptc_lrc[23] ),
- .B2(_13368_),
- .X(_05657_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16184_ (.A(_13369_),
- .X(_05291_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16185_ (.A1(_00342_),
- .A2(_13367_),
- .B1(\ptc2_i.rptc_lrc[22] ),
- .B2(_13368_),
- .X(_05656_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16186_ (.A(_13369_),
- .X(_05290_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16187_ (.A1(_00341_),
- .A2(_13367_),
- .B1(\ptc2_i.rptc_lrc[21] ),
- .B2(_13368_),
- .X(_05655_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16188_ (.A(_13369_),
- .X(_05289_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16189_ (.A1(_00340_),
- .A2(_13367_),
- .B1(\ptc2_i.rptc_lrc[20] ),
- .B2(_13368_),
- .X(_05654_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16190_ (.A(_13369_),
- .X(_05288_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16191_ (.A(_13360_),
- .X(_13370_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16192_ (.A(_13363_),
- .X(_13371_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16193_ (.A1(_00338_),
- .A2(_13370_),
- .B1(\ptc2_i.rptc_lrc[19] ),
- .B2(_13371_),
- .X(_05653_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16194_ (.A(_13366_),
- .X(_13372_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16195_ (.A(_13372_),
- .X(_05287_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16196_ (.A1(_00337_),
- .A2(_13370_),
- .B1(\ptc2_i.rptc_lrc[18] ),
- .B2(_13371_),
- .X(_05652_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16197_ (.A(_13372_),
- .X(_05286_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16198_ (.A1(_00336_),
- .A2(_13370_),
- .B1(\ptc2_i.rptc_lrc[17] ),
- .B2(_13371_),
- .X(_05651_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16199_ (.A(_13372_),
- .X(_05285_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16200_ (.A1(_00335_),
- .A2(_13370_),
- .B1(\ptc2_i.rptc_lrc[16] ),
- .B2(_13371_),
- .X(_05650_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16201_ (.A(_13372_),
- .X(_05284_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16202_ (.A1(_00334_),
- .A2(_13370_),
- .B1(\ptc2_i.rptc_lrc[15] ),
- .B2(_13371_),
- .X(_05649_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16203_ (.A(_13372_),
- .X(_05283_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16204_ (.A1(_00333_),
- .A2(_13370_),
- .B1(\ptc2_i.rptc_lrc[14] ),
- .B2(_13371_),
- .X(_05648_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16205_ (.A(_13372_),
- .X(_05282_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16206_ (.A(_13360_),
- .X(_13373_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16207_ (.A(_13363_),
- .X(_13374_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16208_ (.A1(_00332_),
- .A2(_13373_),
- .B1(\ptc2_i.rptc_lrc[13] ),
- .B2(_13374_),
- .X(_05647_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16209_ (.A(_13366_),
- .X(_13375_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16210_ (.A(_13375_),
- .X(_05281_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16211_ (.A1(_00331_),
- .A2(_13373_),
- .B1(\ptc2_i.rptc_lrc[12] ),
- .B2(_13374_),
- .X(_05646_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16212_ (.A(_13375_),
- .X(_05280_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16213_ (.A1(_00330_),
- .A2(_13373_),
- .B1(\ptc2_i.rptc_lrc[11] ),
- .B2(_13374_),
- .X(_05645_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16214_ (.A(_13375_),
- .X(_05279_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16215_ (.A1(_00329_),
- .A2(_13373_),
- .B1(\ptc2_i.rptc_lrc[10] ),
- .B2(_13374_),
- .X(_05644_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16216_ (.A(_13375_),
- .X(_05278_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16217_ (.A1(_00359_),
- .A2(_13373_),
- .B1(\ptc2_i.rptc_lrc[9] ),
- .B2(_13374_),
- .X(_05643_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16218_ (.A(_13375_),
- .X(_05277_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16219_ (.A1(_00358_),
- .A2(_13373_),
- .B1(\ptc2_i.rptc_lrc[8] ),
- .B2(_13374_),
- .X(_05642_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16220_ (.A(_13375_),
- .X(_05276_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16221_ (.A(_13359_),
- .X(_13376_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16222_ (.A(_13362_),
- .X(_13377_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16223_ (.A1(net1319),
- .A2(_13376_),
- .B1(\ptc2_i.rptc_lrc[7] ),
- .B2(_13377_),
- .X(_05641_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16224_ (.A(_13366_),
- .X(_13378_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16225_ (.A(_13378_),
- .X(_05275_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16226_ (.A1(_00356_),
- .A2(_13376_),
- .B1(\ptc2_i.rptc_lrc[6] ),
- .B2(_13377_),
- .X(_05640_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16227_ (.A(_13378_),
- .X(_05274_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16228_ (.A1(_00355_),
- .A2(_13376_),
- .B1(\ptc2_i.rptc_lrc[5] ),
- .B2(_13377_),
- .X(_05639_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16229_ (.A(_13378_),
- .X(_05273_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16230_ (.A1(_00354_),
- .A2(_13376_),
- .B1(\ptc2_i.rptc_lrc[4] ),
- .B2(_13377_),
- .X(_05638_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16231_ (.A(_13378_),
- .X(_05272_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16232_ (.A1(_00353_),
- .A2(_13376_),
- .B1(\ptc2_i.rptc_lrc[3] ),
- .B2(_13377_),
- .X(_05637_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16233_ (.A(_13378_),
- .X(_05271_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16234_ (.A1(_00350_),
- .A2(_13376_),
- .B1(\ptc2_i.rptc_lrc[2] ),
- .B2(_13377_),
- .X(_05636_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16235_ (.A(_13378_),
- .X(_05270_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16236_ (.A1(_00339_),
- .A2(_13360_),
- .B1(\ptc2_i.rptc_lrc[1] ),
- .B2(_13363_),
- .X(_05635_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16237_ (.A(_13366_),
- .X(_13379_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16238_ (.A(_13379_),
- .X(_05269_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16239_ (.A1(_00328_),
- .A2(_13360_),
- .B1(\ptc2_i.rptc_lrc[0] ),
- .B2(_13363_),
- .X(_05634_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16240_ (.A(_13379_),
- .X(_05268_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16241_ (.A(net943),
- .Y(_13380_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _16242_ (.A(_13380_),
- .B(net941),
- .C(net938),
- .X(_13381_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_2 _16243_ (.A(_13345_),
- .B(_13381_),
- .C(net1309),
- .X(_13382_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16244_ (.A(net1310),
- .X(_02486_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16245_ (.A(_13340_),
- .B(net661),
- .Y(_13383_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _16246_ (.A(_13383_),
- .X(_13384_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16247_ (.A(_13384_),
- .X(_13385_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16248_ (.A(_13383_),
- .Y(_13386_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _16249_ (.A(_13386_),
- .X(_13387_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16250_ (.A(_13387_),
- .X(_13388_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16251_ (.A1(_00320_),
- .A2(_13385_),
- .B1(\ptc2_i.rptc_hrc[31] ),
- .B2(_13388_),
- .X(_05633_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16252_ (.A(_13379_),
- .X(_05267_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16253_ (.A1(_00319_),
- .A2(_13385_),
- .B1(\ptc2_i.rptc_hrc[30] ),
- .B2(_13388_),
- .X(_05632_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16254_ (.A(_13379_),
- .X(_05266_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16255_ (.A1(_00317_),
- .A2(_13385_),
- .B1(\ptc2_i.rptc_hrc[29] ),
- .B2(_13388_),
- .X(_05631_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16256_ (.A(_13379_),
- .X(_05265_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16257_ (.A1(_00316_),
- .A2(_13385_),
- .B1(\ptc2_i.rptc_hrc[28] ),
- .B2(_13388_),
- .X(_05630_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16258_ (.A(_13379_),
- .X(_05264_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16259_ (.A1(_00315_),
- .A2(_13385_),
- .B1(\ptc2_i.rptc_hrc[27] ),
- .B2(_13388_),
- .X(_05629_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16260_ (.A(net783),
- .X(_13389_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16261_ (.A(_13389_),
- .X(_13390_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16262_ (.A(_13390_),
- .X(_13391_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16263_ (.A(_13391_),
- .X(_05263_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16264_ (.A1(_00314_),
- .A2(_13385_),
- .B1(\ptc2_i.rptc_hrc[26] ),
- .B2(_13388_),
- .X(_05628_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16265_ (.A(_13391_),
- .X(_05262_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16266_ (.A(_13384_),
- .X(_13392_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16267_ (.A(_13387_),
- .X(_13393_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16268_ (.A1(_00313_),
- .A2(_13392_),
- .B1(\ptc2_i.rptc_hrc[25] ),
- .B2(_13393_),
- .X(_05627_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16269_ (.A(_13391_),
- .X(_05261_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16270_ (.A1(_00312_),
- .A2(_13392_),
- .B1(\ptc2_i.rptc_hrc[24] ),
- .B2(_13393_),
- .X(_05626_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16271_ (.A(_13391_),
- .X(_05260_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16272_ (.A1(_00311_),
- .A2(_13392_),
- .B1(\ptc2_i.rptc_hrc[23] ),
- .B2(_13393_),
- .X(_05625_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16273_ (.A(_13391_),
- .X(_05259_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16274_ (.A1(_00310_),
- .A2(_13392_),
- .B1(\ptc2_i.rptc_hrc[22] ),
- .B2(_13393_),
- .X(_05624_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16275_ (.A(_13391_),
- .X(_05258_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16276_ (.A1(_00309_),
- .A2(_13392_),
- .B1(\ptc2_i.rptc_hrc[21] ),
- .B2(_13393_),
- .X(_05623_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16277_ (.A(_13390_),
- .X(_13394_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16278_ (.A(_13394_),
- .X(_05257_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16279_ (.A1(_00308_),
- .A2(_13392_),
- .B1(\ptc2_i.rptc_hrc[20] ),
- .B2(_13393_),
- .X(_05622_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16280_ (.A(_13394_),
- .X(_05256_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16281_ (.A(_13384_),
- .X(_13395_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16282_ (.A(_13387_),
- .X(_13396_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16283_ (.A1(_00306_),
- .A2(_13395_),
- .B1(\ptc2_i.rptc_hrc[19] ),
- .B2(_13396_),
- .X(_05621_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16284_ (.A(_13394_),
- .X(_05255_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16285_ (.A1(_00305_),
- .A2(_13395_),
- .B1(\ptc2_i.rptc_hrc[18] ),
- .B2(_13396_),
- .X(_05620_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16286_ (.A(_13394_),
- .X(_05254_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16287_ (.A1(_00304_),
- .A2(_13395_),
- .B1(\ptc2_i.rptc_hrc[17] ),
- .B2(_13396_),
- .X(_05619_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16288_ (.A(_13394_),
- .X(_05253_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16289_ (.A1(_00303_),
- .A2(_13395_),
- .B1(\ptc2_i.rptc_hrc[16] ),
- .B2(_13396_),
- .X(_05618_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16290_ (.A(_13394_),
- .X(_05252_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16291_ (.A1(_00302_),
- .A2(_13395_),
- .B1(\ptc2_i.rptc_hrc[15] ),
- .B2(_13396_),
- .X(_05617_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16292_ (.A(_13390_),
- .X(_13397_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16293_ (.A(_13397_),
- .X(_05251_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16294_ (.A1(_00301_),
- .A2(_13395_),
- .B1(\ptc2_i.rptc_hrc[14] ),
- .B2(_13396_),
- .X(_05616_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16295_ (.A(_13397_),
- .X(_05250_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16296_ (.A(_13384_),
- .X(_13398_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16297_ (.A(_13387_),
- .X(_13399_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16298_ (.A1(_00300_),
- .A2(_13398_),
- .B1(\ptc2_i.rptc_hrc[13] ),
- .B2(_13399_),
- .X(_05615_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16299_ (.A(_13397_),
- .X(_05249_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16300_ (.A1(_00299_),
- .A2(_13398_),
- .B1(\ptc2_i.rptc_hrc[12] ),
- .B2(_13399_),
- .X(_05614_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16301_ (.A(_13397_),
- .X(_05248_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16302_ (.A1(_00298_),
- .A2(_13398_),
- .B1(\ptc2_i.rptc_hrc[11] ),
- .B2(_13399_),
- .X(_05613_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16303_ (.A(_13397_),
- .X(_05247_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16304_ (.A1(_00297_),
- .A2(_13398_),
- .B1(\ptc2_i.rptc_hrc[10] ),
- .B2(_13399_),
- .X(_05612_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16305_ (.A(_13397_),
- .X(_05246_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16306_ (.A1(net1277),
- .A2(_13398_),
- .B1(\ptc2_i.rptc_hrc[9] ),
- .B2(_13399_),
- .X(_05611_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16307_ (.A(_13390_),
- .X(_13400_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16308_ (.A(_13400_),
- .X(_05245_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16309_ (.A1(net1296),
- .A2(_13398_),
- .B1(\ptc2_i.rptc_hrc[8] ),
- .B2(_13399_),
- .X(_05610_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16310_ (.A(_13400_),
- .X(_05244_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16311_ (.A(_13383_),
- .X(_13401_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16312_ (.A(_13386_),
- .X(_13402_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16313_ (.A1(net1311),
- .A2(_13401_),
- .B1(\ptc2_i.rptc_hrc[7] ),
- .B2(_13402_),
- .X(_05609_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16314_ (.A(_13400_),
- .X(_05243_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16315_ (.A1(net989),
- .A2(_13401_),
- .B1(\ptc2_i.rptc_hrc[6] ),
- .B2(_13402_),
- .X(_05608_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16316_ (.A(_13400_),
- .X(_05242_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16317_ (.A1(_00323_),
- .A2(_13401_),
- .B1(\ptc2_i.rptc_hrc[5] ),
- .B2(_13402_),
- .X(_05607_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16318_ (.A(_13400_),
- .X(_05241_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16319_ (.A1(_00322_),
- .A2(_13401_),
- .B1(\ptc2_i.rptc_hrc[4] ),
- .B2(_13402_),
- .X(_05606_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16320_ (.A(_13400_),
- .X(_05240_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16321_ (.A1(_00321_),
- .A2(_13401_),
- .B1(\ptc2_i.rptc_hrc[3] ),
- .B2(_13402_),
- .X(_05605_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16322_ (.A(_13390_),
- .X(_13403_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16323_ (.A(_13403_),
- .X(_05239_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16324_ (.A1(_00318_),
- .A2(_13401_),
- .B1(\ptc2_i.rptc_hrc[2] ),
- .B2(_13402_),
- .X(_05604_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16325_ (.A(_13403_),
- .X(_05238_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16326_ (.A1(_00307_),
- .A2(_13384_),
- .B1(\ptc2_i.rptc_hrc[1] ),
- .B2(_13387_),
- .X(_05603_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16327_ (.A(_13403_),
- .X(_05237_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16328_ (.A1(_00296_),
- .A2(_13384_),
- .B1(\ptc2_i.rptc_hrc[0] ),
- .B2(_13387_),
- .X(_05602_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16329_ (.A(_13403_),
- .X(_05236_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16330_ (.A(\ptc2_i.rptc_lrc[0] ),
- .Y(_13404_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16331_ (.A(\ptc2_i.rptc_cntr[0] ),
- .X(_13405_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16332_ (.A(\ptc2_i.rptc_lrc[26] ),
- .Y(_13406_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16333_ (.A(\ptc2_i.rptc_cntr[23] ),
- .Y(_02686_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16334_ (.A(\ptc2_i.rptc_cntr[25] ),
- .Y(_02698_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16335_ (.A1(\ptc2_i.rptc_lrc[23] ),
- .A2(_02686_),
- .B1(\ptc2_i.rptc_lrc[25] ),
- .B2(_02698_),
- .X(_13407_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16336_ (.A1(_13404_),
- .A2(_13405_),
- .B1(_13406_),
- .B2(\ptc2_i.rptc_cntr[26] ),
- .C1(_13407_),
- .X(_13408_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16337_ (.A(\ptc2_i.rptc_cntr[19] ),
- .Y(_02662_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16338_ (.A(\ptc2_i.rptc_lrc[9] ),
- .Y(_13409_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16339_ (.A(\ptc2_i.rptc_cntr[1] ),
- .Y(_13410_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16340_ (.A(\ptc2_i.rptc_cntr[30] ),
- .Y(_02728_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16341_ (.A1(\ptc2_i.rptc_lrc[1] ),
- .A2(_13410_),
- .B1(\ptc2_i.rptc_lrc[30] ),
- .B2(_02728_),
- .X(_13411_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16342_ (.A1(\ptc2_i.rptc_lrc[19] ),
- .A2(_02662_),
- .B1(_13409_),
- .B2(\ptc2_i.rptc_cntr[9] ),
- .C1(_13411_),
- .X(_13412_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16343_ (.A(\ptc2_i.rptc_cntr[26] ),
- .Y(_02704_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16344_ (.A(\ptc2_i.rptc_cntr[10] ),
- .Y(_02607_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16345_ (.A(\ptc2_i.rptc_cntr[8] ),
- .Y(_02595_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16346_ (.A(\ptc2_i.rptc_lrc[13] ),
- .Y(_13413_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16347_ (.A1(\ptc2_i.rptc_lrc[8] ),
- .A2(_02595_),
- .B1(_13413_),
- .B2(\ptc2_i.rptc_cntr[13] ),
- .X(_13414_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16348_ (.A1(\ptc2_i.rptc_lrc[26] ),
- .A2(_02704_),
- .B1(\ptc2_i.rptc_lrc[10] ),
- .B2(_02607_),
- .C1(_13414_),
- .X(_13415_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16349_ (.A(\ptc2_i.rptc_cntr[22] ),
- .Y(_02680_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16350_ (.A(\ptc2_i.rptc_lrc[19] ),
- .Y(_13416_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16351_ (.A(\ptc2_i.rptc_lrc[17] ),
- .Y(_13417_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16352_ (.A(\ptc2_i.rptc_lrc[30] ),
- .Y(_13418_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16353_ (.A1(_13417_),
- .A2(\ptc2_i.rptc_cntr[17] ),
- .B1(_13418_),
- .B2(\ptc2_i.rptc_cntr[30] ),
- .X(_13419_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16354_ (.A1(\ptc2_i.rptc_lrc[22] ),
- .A2(_02680_),
- .B1(_13416_),
- .B2(\ptc2_i.rptc_cntr[19] ),
- .C1(_13419_),
- .X(_13420_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _16355_ (.A(_13408_),
- .B(_13412_),
- .C(_13415_),
- .D(_13420_),
- .X(_13421_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16356_ (.A(\ptc2_i.rptc_cntr[5] ),
- .Y(_13422_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16357_ (.A(\ptc2_i.rptc_lrc[16] ),
- .Y(_13423_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16358_ (.A(\ptc2_i.rptc_lrc[6] ),
- .Y(_13424_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16359_ (.A(\ptc2_i.rptc_lrc[5] ),
- .Y(_13425_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16360_ (.A1(_13424_),
- .A2(\ptc2_i.rptc_cntr[6] ),
- .B1(_13425_),
- .B2(\ptc2_i.rptc_cntr[5] ),
- .X(_13426_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16361_ (.A1(\ptc2_i.rptc_lrc[5] ),
- .A2(_13422_),
- .B1(_13423_),
- .B2(\ptc2_i.rptc_cntr[16] ),
- .C1(_13426_),
- .X(_13427_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16362_ (.A(\ptc2_i.rptc_cntr[9] ),
- .Y(_02601_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16363_ (.A(_13405_),
- .Y(_13428_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16364_ (.A(\ptc2_i.rptc_lrc[24] ),
- .Y(_13429_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16365_ (.A(\ptc2_i.rptc_lrc[3] ),
- .Y(_13430_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16366_ (.A1(_13429_),
- .A2(\ptc2_i.rptc_cntr[24] ),
- .B1(_13430_),
- .B2(\ptc2_i.rptc_cntr[3] ),
- .X(_13431_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16367_ (.A1(\ptc2_i.rptc_lrc[9] ),
- .A2(_02601_),
- .B1(\ptc2_i.rptc_lrc[0] ),
- .B2(_13428_),
- .C1(_13431_),
- .X(_13432_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16368_ (.A(\ptc2_i.rptc_lrc[25] ),
- .Y(_13433_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16369_ (.A(\ptc2_i.rptc_cntr[3] ),
- .Y(_13434_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16370_ (.A(\ptc2_i.rptc_lrc[7] ),
- .Y(_13435_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16371_ (.A(\ptc2_i.rptc_lrc[8] ),
- .Y(_13436_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16372_ (.A1(_13435_),
- .A2(\ptc2_i.rptc_cntr[7] ),
- .B1(_13436_),
- .B2(\ptc2_i.rptc_cntr[8] ),
- .X(_13437_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16373_ (.A1(_13433_),
- .A2(\ptc2_i.rptc_cntr[25] ),
- .B1(\ptc2_i.rptc_lrc[3] ),
- .B2(_13434_),
- .C1(_13437_),
- .X(_13438_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16374_ (.A(\ptc2_i.rptc_cntr[16] ),
- .Y(_02643_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16375_ (.A(\ptc2_i.rptc_lrc[21] ),
- .Y(_13439_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16376_ (.A(\ptc2_i.rptc_cntr[11] ),
- .Y(_02613_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16377_ (.A(\ptc2_i.rptc_cntr[6] ),
- .Y(_13440_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16378_ (.A1(\ptc2_i.rptc_lrc[11] ),
- .A2(_02613_),
- .B1(\ptc2_i.rptc_lrc[6] ),
- .B2(_13440_),
- .X(_13441_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16379_ (.A1(\ptc2_i.rptc_lrc[16] ),
- .A2(_02643_),
- .B1(_13439_),
- .B2(\ptc2_i.rptc_cntr[21] ),
- .C1(_13441_),
- .X(_13442_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _16380_ (.A(_13427_),
- .B(_13432_),
- .C(_13438_),
- .D(_13442_),
- .X(_13443_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16381_ (.A(\ptc2_i.rptc_cntr[4] ),
- .Y(_13444_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16382_ (.A(\ptc2_i.rptc_cntr[18] ),
- .Y(_02656_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16383_ (.A(\ptc2_i.rptc_lrc[22] ),
- .Y(_13445_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16384_ (.A1(\ptc2_i.rptc_lrc[18] ),
- .A2(_02656_),
- .B1(_13445_),
- .B2(\ptc2_i.rptc_cntr[22] ),
- .X(_13446_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16385_ (.A(\ptc2_i.rptc_lrc[23] ),
- .Y(_13447_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16386_ (.A(\ptc2_i.rptc_cntr[28] ),
- .Y(_02716_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16387_ (.A(\ptc2_i.rptc_lrc[1] ),
- .Y(_13448_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16388_ (.A(\ptc2_i.rptc_lrc[4] ),
- .Y(_13449_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16389_ (.A1(_13448_),
- .A2(\ptc2_i.rptc_cntr[1] ),
- .B1(_13449_),
- .B2(\ptc2_i.rptc_cntr[4] ),
- .X(_13450_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16390_ (.A1(_13447_),
- .A2(\ptc2_i.rptc_cntr[23] ),
- .B1(\ptc2_i.rptc_lrc[28] ),
- .B2(_02716_),
- .C1(_13450_),
- .X(_13451_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16391_ (.A(\ptc2_i.rptc_cntr[31] ),
- .Y(_02734_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16392_ (.A(\ptc2_i.rptc_lrc[28] ),
- .Y(_13452_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16393_ (.A(\ptc2_i.rptc_lrc[29] ),
- .Y(_13453_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16394_ (.A(\ptc2_i.rptc_lrc[18] ),
- .Y(_13454_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16395_ (.A1(_13453_),
- .A2(\ptc2_i.rptc_cntr[29] ),
- .B1(_13454_),
- .B2(\ptc2_i.rptc_cntr[18] ),
- .X(_13455_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16396_ (.A1(\ptc2_i.rptc_lrc[31] ),
- .A2(_02734_),
- .B1(_13452_),
- .B2(\ptc2_i.rptc_cntr[28] ),
- .C1(_13455_),
- .X(_13456_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _16397_ (.A1(\ptc2_i.rptc_lrc[4] ),
- .A2(_13444_),
- .B1(_13446_),
- .C1(_13451_),
- .D1(_13456_),
- .X(_13457_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16398_ (.A(\ptc2_i.rptc_cntr[14] ),
- .Y(_02631_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16399_ (.A(\ptc2_i.rptc_lrc[11] ),
- .Y(_13458_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16400_ (.A(\ptc2_i.rptc_cntr[29] ),
- .Y(_02722_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16401_ (.A(\ptc2_i.rptc_cntr[12] ),
- .Y(_02619_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16402_ (.A(\ptc2_i.rptc_cntr[20] ),
- .Y(_02668_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16403_ (.A1(\ptc2_i.rptc_lrc[12] ),
- .A2(_02619_),
- .B1(\ptc2_i.rptc_lrc[20] ),
- .B2(_02668_),
- .X(_13459_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16404_ (.A1(_13458_),
- .A2(\ptc2_i.rptc_cntr[11] ),
- .B1(\ptc2_i.rptc_lrc[29] ),
- .B2(_02722_),
- .C1(_13459_),
- .X(_13460_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16405_ (.A(\ptc2_i.rptc_lrc[12] ),
- .Y(_13461_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16406_ (.A(\ptc2_i.rptc_cntr[27] ),
- .Y(_02710_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16407_ (.A(\ptc2_i.rptc_cntr[7] ),
- .Y(_13462_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16408_ (.A(\ptc2_i.rptc_cntr[21] ),
- .Y(_02674_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16409_ (.A1(\ptc2_i.rptc_lrc[7] ),
- .A2(_13462_),
- .B1(\ptc2_i.rptc_lrc[21] ),
- .B2(_02674_),
- .X(_13463_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16410_ (.A1(_13461_),
- .A2(\ptc2_i.rptc_cntr[12] ),
- .B1(\ptc2_i.rptc_lrc[27] ),
- .B2(_02710_),
- .C1(_13463_),
- .X(_13464_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16411_ (.A(\ptc2_i.rptc_lrc[15] ),
- .Y(_13465_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16412_ (.A(\ptc2_i.rptc_lrc[20] ),
- .Y(_13466_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16413_ (.A(\ptc2_i.rptc_cntr[15] ),
- .Y(_02637_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16414_ (.A(\ptc2_i.rptc_lrc[27] ),
- .Y(_13467_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16415_ (.A1(\ptc2_i.rptc_lrc[15] ),
- .A2(_02637_),
- .B1(_13467_),
- .B2(\ptc2_i.rptc_cntr[27] ),
- .X(_13468_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16416_ (.A1(_13465_),
- .A2(\ptc2_i.rptc_cntr[15] ),
- .B1(_13466_),
- .B2(\ptc2_i.rptc_cntr[20] ),
- .C1(_13468_),
- .X(_13469_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16417_ (.A(\ptc2_i.rptc_cntr[13] ),
- .Y(_02625_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16418_ (.A(\ptc2_i.rptc_cntr[24] ),
- .Y(_02692_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16419_ (.A(\ptc2_i.rptc_lrc[14] ),
- .Y(_13470_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16420_ (.A(\ptc2_i.rptc_lrc[2] ),
- .Y(_13471_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16421_ (.A1(_13470_),
- .A2(\ptc2_i.rptc_cntr[14] ),
- .B1(_13471_),
- .B2(\ptc2_i.rptc_cntr[2] ),
- .X(_13472_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16422_ (.A1(\ptc2_i.rptc_lrc[13] ),
- .A2(_02625_),
- .B1(\ptc2_i.rptc_lrc[24] ),
- .B2(_02692_),
- .C1(_13472_),
- .X(_13473_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16423_ (.A(\ptc2_i.rptc_cntr[17] ),
- .Y(_02649_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16424_ (.A(\ptc2_i.rptc_lrc[10] ),
- .Y(_13474_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16425_ (.A(\ptc2_i.rptc_lrc[31] ),
- .Y(_13475_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16426_ (.A(\ptc2_i.rptc_cntr[2] ),
- .Y(_13476_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16427_ (.A1(_13475_),
- .A2(\ptc2_i.rptc_cntr[31] ),
- .B1(\ptc2_i.rptc_lrc[2] ),
- .B2(_13476_),
- .X(_13477_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16428_ (.A1(\ptc2_i.rptc_lrc[17] ),
- .A2(_02649_),
- .B1(_13474_),
- .B2(\ptc2_i.rptc_cntr[10] ),
- .C1(_13477_),
- .X(_13478_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _16429_ (.A(_13464_),
- .B(_13469_),
- .C(_13473_),
- .D(_13478_),
- .X(_13479_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _16430_ (.A1(\ptc2_i.rptc_lrc[14] ),
- .A2(_02631_),
- .B1(\ptc2_i.rptc_ctrl[0] ),
- .C1(_13460_),
- .D1(_13479_),
- .X(_13480_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_2 _16431_ (.A(_13421_),
- .B(_13443_),
- .C(_13457_),
- .D(_13480_),
- .X(_13481_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16432_ (.A(_13481_),
- .Y(_13482_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16433_ (.A(\ptc2_i.rptc_ctrl[7] ),
- .Y(_13483_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_4 _16434_ (.A1(\ptc2_i.rptc_ctrl[4] ),
- .A2(_13482_),
- .B1(_13483_),
- .Y(_13484_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16435_ (.A(net943),
- .B(net941),
- .C(net938),
- .D(net959),
- .X(_13485_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_2 _16436_ (.A(net1309),
- .B(net940),
- .Y(_01475_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16437_ (.A(\ptc2_i.rptc_ctrl[1] ),
- .Y(_13486_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16438_ (.A(\ptc2_i.rptc_ctrl[2] ),
- .Y(_13487_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a2bb2o_1 _16439_ (.A1_N(_13487_),
- .A2_N(net1118),
- .B1(_13487_),
- .B2(net1118),
- .X(_02811_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16440_ (.A(\ptc2_i.rptc_ctrl[0] ),
- .Y(_13488_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221oi_2 _16441_ (.A1(_13486_),
- .A2(_02811_),
- .B1(\ptc2_i.rptc_ctrl[4] ),
- .B2(_13481_),
- .C1(_13488_),
- .Y(_13489_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16442_ (.A(_13484_),
- .B(net670),
- .C(_13489_),
- .X(_13490_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _16443_ (.A(_13490_),
- .X(_13491_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16444_ (.A(_13491_),
- .X(_13492_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16445_ (.A0(\ptc2_i.rptc_cntr[31] ),
- .A1(_00288_),
- .S(_13492_),
- .X(_05601_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16446_ (.A(_13403_),
- .X(_05235_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16447_ (.A0(\ptc2_i.rptc_cntr[30] ),
- .A1(_00287_),
- .S(_13492_),
- .X(_05600_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16448_ (.A(_13403_),
- .X(_05234_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16449_ (.A0(\ptc2_i.rptc_cntr[29] ),
- .A1(_00285_),
- .S(_13492_),
- .X(_05599_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16450_ (.A(_13390_),
- .X(_13493_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16451_ (.A(_13493_),
- .X(_05233_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16452_ (.A0(\ptc2_i.rptc_cntr[28] ),
- .A1(_00284_),
- .S(_13492_),
- .X(_05598_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16453_ (.A(_13493_),
- .X(_05232_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16454_ (.A0(\ptc2_i.rptc_cntr[27] ),
- .A1(_00283_),
- .S(_13492_),
- .X(_05597_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16455_ (.A(_13493_),
- .X(_05231_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16456_ (.A0(\ptc2_i.rptc_cntr[26] ),
- .A1(_00282_),
- .S(_13492_),
- .X(_05596_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16457_ (.A(_13493_),
- .X(_05230_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16458_ (.A(_13491_),
- .X(_13494_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16459_ (.A0(\ptc2_i.rptc_cntr[25] ),
- .A1(_00281_),
- .S(_13494_),
- .X(_05595_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16460_ (.A(_13493_),
- .X(_05229_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16461_ (.A0(\ptc2_i.rptc_cntr[24] ),
- .A1(_00280_),
- .S(_13494_),
- .X(_05594_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16462_ (.A(_13493_),
- .X(_05228_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16463_ (.A0(\ptc2_i.rptc_cntr[23] ),
- .A1(_00279_),
- .S(_13494_),
- .X(_05593_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16464_ (.A(_13389_),
- .X(_13495_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16465_ (.A(_13495_),
- .X(_13496_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16466_ (.A(_13496_),
- .X(_05227_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16467_ (.A0(\ptc2_i.rptc_cntr[22] ),
- .A1(_00278_),
- .S(_13494_),
- .X(_05592_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16468_ (.A(_13496_),
- .X(_05226_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16469_ (.A0(\ptc2_i.rptc_cntr[21] ),
- .A1(_00277_),
- .S(_13494_),
- .X(_05591_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16470_ (.A(_13496_),
- .X(_05225_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16471_ (.A0(\ptc2_i.rptc_cntr[20] ),
- .A1(_00276_),
- .S(_13494_),
- .X(_05590_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16472_ (.A(_13496_),
- .X(_05224_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16473_ (.A(_13491_),
- .X(_13497_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16474_ (.A0(\ptc2_i.rptc_cntr[19] ),
- .A1(_00274_),
- .S(_13497_),
- .X(_05589_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16475_ (.A(_13496_),
- .X(_05223_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16476_ (.A0(\ptc2_i.rptc_cntr[18] ),
- .A1(_00273_),
- .S(_13497_),
- .X(_05588_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16477_ (.A(_13496_),
- .X(_05222_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16478_ (.A0(\ptc2_i.rptc_cntr[17] ),
- .A1(_00272_),
- .S(_13497_),
- .X(_05587_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16479_ (.A(_13495_),
- .X(_13498_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16480_ (.A(_13498_),
- .X(_05221_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16481_ (.A0(\ptc2_i.rptc_cntr[16] ),
- .A1(_00271_),
- .S(_13497_),
- .X(_05586_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16482_ (.A(_13498_),
- .X(_05220_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16483_ (.A0(\ptc2_i.rptc_cntr[15] ),
- .A1(_00270_),
- .S(_13497_),
- .X(_05585_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16484_ (.A(_13498_),
- .X(_05219_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16485_ (.A0(\ptc2_i.rptc_cntr[14] ),
- .A1(_00269_),
- .S(_13497_),
- .X(_05584_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16486_ (.A(_13498_),
- .X(_05218_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16487_ (.A(_13491_),
- .X(_13499_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16488_ (.A0(\ptc2_i.rptc_cntr[13] ),
- .A1(_00268_),
- .S(_13499_),
- .X(_05583_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16489_ (.A(_13498_),
- .X(_05217_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16490_ (.A0(\ptc2_i.rptc_cntr[12] ),
- .A1(_00267_),
- .S(_13499_),
- .X(_05582_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16491_ (.A(_13498_),
- .X(_05216_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16492_ (.A0(\ptc2_i.rptc_cntr[11] ),
- .A1(_00266_),
- .S(_13499_),
- .X(_05581_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16493_ (.A(_13495_),
- .X(_13500_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16494_ (.A(_13500_),
- .X(_05215_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16495_ (.A0(\ptc2_i.rptc_cntr[10] ),
- .A1(_00265_),
- .S(_13499_),
- .X(_05580_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16496_ (.A(_13500_),
- .X(_05214_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16497_ (.A0(\ptc2_i.rptc_cntr[9] ),
- .A1(net1273),
- .S(_13499_),
- .X(_05579_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16498_ (.A(_13500_),
- .X(_05213_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16499_ (.A0(\ptc2_i.rptc_cntr[8] ),
- .A1(_00294_),
- .S(_13499_),
- .X(_05578_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16500_ (.A(_13500_),
- .X(_05212_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16501_ (.A(_13490_),
- .X(_13501_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16502_ (.A0(\ptc2_i.rptc_cntr[7] ),
- .A1(_00293_),
- .S(_13501_),
- .X(_05577_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16503_ (.A(_13500_),
- .X(_05211_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16504_ (.A0(\ptc2_i.rptc_cntr[6] ),
- .A1(net987),
- .S(_13501_),
- .X(_05576_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16505_ (.A(_13500_),
- .X(_05210_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16506_ (.A0(\ptc2_i.rptc_cntr[5] ),
- .A1(_00291_),
- .S(_13501_),
- .X(_05575_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16507_ (.A(_13495_),
- .X(_13502_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16508_ (.A(_13502_),
- .X(_05209_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16509_ (.A0(\ptc2_i.rptc_cntr[4] ),
- .A1(_00290_),
- .S(_13501_),
- .X(_05574_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16510_ (.A(_13502_),
- .X(_05208_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16511_ (.A0(\ptc2_i.rptc_cntr[3] ),
- .A1(_00289_),
- .S(_13501_),
- .X(_05573_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16512_ (.A(_13502_),
- .X(_05207_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16513_ (.A0(\ptc2_i.rptc_cntr[2] ),
- .A1(_00286_),
- .S(_13501_),
- .X(_05572_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16514_ (.A(_13502_),
- .X(_05206_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16515_ (.A0(\ptc2_i.rptc_cntr[1] ),
- .A1(_00275_),
- .S(_13491_),
- .X(_05571_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16516_ (.A(_13502_),
- .X(_05205_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16517_ (.A0(_13405_),
- .A1(_00264_),
- .S(_13491_),
- .X(_05570_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _16518_ (.A(_13502_),
- .X(_05204_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16519_ (.A(\ptc1_i.rptc_ctrl[5] ),
- .Y(_13503_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _16520_ (.A(_13380_),
- .B(_13346_),
- .C(net1373),
- .X(_13504_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16521_ (.A(net935),
- .Y(_13505_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16522_ (.A(_13505_),
- .B(net931),
- .C(net947),
- .D(net1002),
- .X(_13506_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _16523_ (.A(_13345_),
- .B(_13504_),
- .C(net934),
- .X(_13507_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16524_ (.A(_13507_),
- .Y(_13508_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16525_ (.A(\ptc1_i.rptc_ctrl[5] ),
- .B(_13508_),
- .X(_13509_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a32o_1 _16526_ (.A1(_13503_),
- .A2(_13507_),
- .A3(\ptc1_i.rptc_ctrl[6] ),
- .B1(_00047_),
- .B2(_13509_),
- .X(_05569_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16527_ (.A(\i2c_i.byte_controller.bit_controller.clk_en ),
- .X(_13510_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16528_ (.A(_13510_),
- .Y(_13511_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16529_ (.A(\i2c_i.byte_controller.bit_controller.c_state[16] ),
- .X(_13512_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16530_ (.A(\i2c_i.byte_controller.bit_controller.c_state[5] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[4] ),
- .C(\i2c_i.byte_controller.bit_controller.c_state[7] ),
- .D(\i2c_i.byte_controller.bit_controller.c_state[6] ),
- .X(_13513_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16531_ (.A(\i2c_i.byte_controller.bit_controller.c_state[3] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[2] ),
- .C(\i2c_i.byte_controller.bit_controller.c_state[1] ),
- .X(_13514_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16532_ (.A(\i2c_i.byte_controller.bit_controller.c_state[0] ),
- .B(_13514_),
- .X(_13515_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16533_ (.A(\i2c_i.byte_controller.bit_controller.c_state[11] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[10] ),
- .C(\i2c_i.byte_controller.bit_controller.c_state[9] ),
- .D(\i2c_i.byte_controller.bit_controller.c_state[8] ),
- .X(_13516_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16534_ (.A(_13513_),
- .B(_13515_),
- .C(_13516_),
- .X(_13517_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16535_ (.A(\i2c_i.byte_controller.bit_controller.c_state[12] ),
- .B(_13517_),
- .X(_13518_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16536_ (.A(\i2c_i.byte_controller.bit_controller.c_state[13] ),
- .B(_13518_),
- .X(_13519_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16537_ (.A(\i2c_i.byte_controller.bit_controller.c_state[15] ),
- .Y(_13520_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4bb_2 _16538_ (.A_N(_13512_),
- .B_N(_13519_),
- .C(\i2c_i.byte_controller.bit_controller.c_state[14] ),
- .D(_13520_),
- .X(_13521_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16539_ (.A(\i2c_i.byte_controller.bit_controller.c_state[15] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[14] ),
- .X(_13522_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16540_ (.A(_13512_),
- .B(_13518_),
- .C(_13522_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[13] ),
- .X(_13523_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16541_ (.A(_13523_),
- .Y(_13524_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3b_4 _16542_ (.A(_13521_),
- .B(_13524_),
- .C_N(_01472_),
- .X(_13525_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_4 _16543_ (.A(\i2c_i.byte_controller.bit_controller.c_state[16] ),
- .B(_13515_),
- .X(_13526_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16544_ (.A(_13513_),
- .B(_13526_),
- .X(_13527_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16545_ (.A(\i2c_i.byte_controller.bit_controller.c_state[11] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[10] ),
- .C(_13527_),
- .X(_13528_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _16546_ (.A(\i2c_i.byte_controller.bit_controller.c_state[13] ),
- .B(_13522_),
- .C(\i2c_i.byte_controller.bit_controller.c_state[12] ),
- .X(_13529_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16547_ (.A(_13528_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[8] ),
- .C(_13529_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[9] ),
- .X(_13530_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16548_ (.A(_13530_),
- .Y(_13531_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16549_ (.A(\i2c_i.byte_controller.bit_controller.c_state[8] ),
- .Y(_13532_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor4_2 _16550_ (.A(\i2c_i.byte_controller.bit_controller.c_state[9] ),
- .B(_13529_),
- .C(_13532_),
- .D(_13528_),
- .Y(_13533_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16551_ (.A(\i2c_i.byte_controller.bit_controller.c_state[11] ),
- .Y(_13534_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16552_ (.A(\i2c_i.byte_controller.bit_controller.c_state[9] ),
- .B(_13529_),
- .C(_13527_),
- .X(_13535_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor4_2 _16553_ (.A(_13534_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[10] ),
- .C(\i2c_i.byte_controller.bit_controller.c_state[8] ),
- .D(_13535_),
- .Y(_13536_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4b_1 _16554_ (.A_N(_13535_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[10] ),
- .C(_13532_),
- .D(_13534_),
- .X(_13537_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16555_ (.A(_13533_),
- .B(_13536_),
- .C(_13537_),
- .X(_13538_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16556_ (.A(\i2c_i.byte_controller.bit_controller.c_state[13] ),
- .B(_13522_),
- .C(_13517_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[12] ),
- .X(_02252_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16557_ (.A(_13512_),
- .B(_02252_),
- .X(_13539_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3b_4 _16558_ (.A(_13531_),
- .B(_13538_),
- .C_N(_13539_),
- .X(_13540_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16559_ (.A(_13516_),
- .B(_13529_),
- .X(_13541_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_4 _16560_ (.A(_13513_),
- .B(_13541_),
- .X(_13542_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16561_ (.A(_13512_),
- .B(_13542_),
- .C(_13514_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[0] ),
- .X(_13543_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16562_ (.A(_13543_),
- .Y(_13544_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16563_ (.A(\i2c_i.byte_controller.bit_controller.c_state[3] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[2] ),
- .C(\i2c_i.byte_controller.bit_controller.c_state[16] ),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[1] ),
- .X(_13545_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor3_4 _16564_ (.A(\i2c_i.byte_controller.bit_controller.c_state[0] ),
- .B(_13542_),
- .C(_13545_),
- .Y(_13546_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a2111oi_2 _16565_ (.A1(\i2c_i.byte_controller.bit_controller.din ),
- .A2(_13525_),
- .B1(_13540_),
- .C1(_13544_),
- .D1(_13546_),
- .Y(_13547_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16566_ (.A(net385),
- .Y(_13548_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16567_ (.A(\i2c_i.byte_controller.bit_controller.c_state[5] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[4] ),
- .C(_13541_),
- .X(_13549_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16568_ (.A(_13549_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[6] ),
- .C(_13526_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[7] ),
- .X(_13550_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16569_ (.A(_13550_),
- .Y(_13551_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16570_ (.A(\i2c_i.byte_controller.bit_controller.c_state[7] ),
- .B(_13549_),
- .C(_13526_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[6] ),
- .X(_13552_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16571_ (.A(_13552_),
- .Y(_13553_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16572_ (.A(_13551_),
- .B(_13553_),
- .X(_13554_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16573_ (.A(\i2c_i.byte_controller.bit_controller.c_state[7] ),
- .B(\i2c_i.byte_controller.bit_controller.c_state[6] ),
- .C(_13541_),
- .X(_13555_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16574_ (.A(\i2c_i.byte_controller.bit_controller.c_state[5] ),
- .B(_13555_),
- .C(_13526_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[4] ),
- .X(_13556_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16575_ (.A(_13555_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[4] ),
- .C(_13526_),
- .D_N(\i2c_i.byte_controller.bit_controller.c_state[5] ),
- .X(_13557_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16576_ (.A(_13556_),
- .B(_13557_),
- .Y(_13558_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16577_ (.A(\i2c_i.byte_controller.bit_controller.c_state[3] ),
- .Y(_13559_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16578_ (.A(\i2c_i.byte_controller.bit_controller.c_state[0] ),
- .B(_13542_),
- .C(\i2c_i.byte_controller.bit_controller.c_state[16] ),
- .D(\i2c_i.byte_controller.bit_controller.c_state[1] ),
- .X(_13560_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor3_4 _16579_ (.A(_13559_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[2] ),
- .C(_13560_),
- .Y(_13561_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and3b_1 _16580_ (.A_N(_13560_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[2] ),
- .C(_13559_),
- .X(_13562_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16581_ (.A(_13554_),
- .B(_13558_),
- .C(_13561_),
- .D(_13562_),
- .X(_13563_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21a_1 _16582_ (.A1(_13525_),
- .A2(_13563_),
- .B1(_13510_),
- .X(_13564_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_4 _16583_ (.A(net1342),
- .B(\i2c_i.byte_controller.bit_controller.al ),
- .X(_13565_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16584_ (.A(_13565_),
- .Y(_13566_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16585_ (.A(_13566_),
- .X(_13567_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16586_ (.A(_13567_),
- .X(_13568_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221ai_1 _16587_ (.A1(_13511_),
- .A2(_13547_),
- .B1(_13548_),
- .B2(_13564_),
- .C1(_13568_),
- .Y(_05568_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16588_ (.A(_13495_),
- .X(_13569_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16589_ (.A(_13569_),
- .X(_05203_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16590_ (.A(\ptc1_i.rptc_ctrl[8] ),
- .Y(_13570_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16591_ (.A(_13345_),
- .B(_13381_),
- .C(net934),
- .X(_13571_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _16592_ (.A(_13571_),
- .X(_01473_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16593_ (.A(_13570_),
- .B(_01473_),
- .Y(_13572_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _16594_ (.A(_13572_),
- .X(_13573_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16595_ (.A(_13573_),
- .X(_13574_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16596_ (.A(_13572_),
- .Y(_13575_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _16597_ (.A(_13575_),
- .X(_13576_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16598_ (.A(_13576_),
- .X(_13577_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16599_ (.A1(_00223_),
- .A2(_13574_),
- .B1(\ptc1_i.rptc_hrc[31] ),
- .B2(_13577_),
- .X(_05567_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16600_ (.A(_13569_),
- .X(_05202_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16601_ (.A1(net895),
- .A2(_13574_),
- .B1(\ptc1_i.rptc_hrc[30] ),
- .B2(_13577_),
- .X(_05566_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16602_ (.A(_13569_),
- .X(_05201_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16603_ (.A1(_00220_),
- .A2(_13574_),
- .B1(\ptc1_i.rptc_hrc[29] ),
- .B2(_13577_),
- .X(_05565_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16604_ (.A(_13569_),
- .X(_05200_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16605_ (.A1(_00219_),
- .A2(_13574_),
- .B1(\ptc1_i.rptc_hrc[28] ),
- .B2(_13577_),
- .X(_05564_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16606_ (.A(_13569_),
- .X(_05199_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16607_ (.A1(_00218_),
- .A2(_13574_),
- .B1(\ptc1_i.rptc_hrc[27] ),
- .B2(_13577_),
- .X(_05563_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16608_ (.A(_13569_),
- .X(_05198_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16609_ (.A1(_00217_),
- .A2(_13574_),
- .B1(\ptc1_i.rptc_hrc[26] ),
- .B2(_13577_),
- .X(_05562_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16610_ (.A(_13495_),
- .X(_13578_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16611_ (.A(_13578_),
- .X(_05197_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16612_ (.A(_13573_),
- .X(_13579_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16613_ (.A(_13576_),
- .X(_13580_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16614_ (.A1(net1206),
- .A2(_13579_),
- .B1(\ptc1_i.rptc_hrc[25] ),
- .B2(_13580_),
- .X(_05561_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16615_ (.A(_13578_),
- .X(_05196_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16616_ (.A1(net913),
- .A2(_13579_),
- .B1(\ptc1_i.rptc_hrc[24] ),
- .B2(_13580_),
- .X(_05560_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16617_ (.A(_13578_),
- .X(_05195_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16618_ (.A1(net917),
- .A2(_13579_),
- .B1(\ptc1_i.rptc_hrc[23] ),
- .B2(_13580_),
- .X(_05559_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16619_ (.A(_13578_),
- .X(_05194_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16620_ (.A1(net901),
- .A2(_13579_),
- .B1(\ptc1_i.rptc_hrc[22] ),
- .B2(_13580_),
- .X(_05558_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16621_ (.A(_13578_),
- .X(_05193_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16622_ (.A1(_00212_),
- .A2(_13579_),
- .B1(\ptc1_i.rptc_hrc[21] ),
- .B2(_13580_),
- .X(_05557_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16623_ (.A(_13578_),
- .X(_05192_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16624_ (.A1(net897),
- .A2(_13579_),
- .B1(\ptc1_i.rptc_hrc[20] ),
- .B2(_13580_),
- .X(_05556_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16625_ (.A(_13389_),
- .X(_13581_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16626_ (.A(_13581_),
- .X(_13582_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16627_ (.A(_13582_),
- .X(_05191_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16628_ (.A(_13573_),
- .X(_13583_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16629_ (.A(_13576_),
- .X(_13584_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16630_ (.A1(net907),
- .A2(_13583_),
- .B1(\ptc1_i.rptc_hrc[19] ),
- .B2(_13584_),
- .X(_05555_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16631_ (.A(_13582_),
- .X(_05190_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16632_ (.A1(net919),
- .A2(_13583_),
- .B1(\ptc1_i.rptc_hrc[18] ),
- .B2(_13584_),
- .X(_05554_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16633_ (.A(_13582_),
- .X(_05189_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16634_ (.A1(net911),
- .A2(_13583_),
- .B1(\ptc1_i.rptc_hrc[17] ),
- .B2(_13584_),
- .X(_05553_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16635_ (.A(_13582_),
- .X(_05188_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16636_ (.A1(net915),
- .A2(_13583_),
- .B1(\ptc1_i.rptc_hrc[16] ),
- .B2(_13584_),
- .X(_05552_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16637_ (.A(_13582_),
- .X(_05187_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16638_ (.A1(net909),
- .A2(_13583_),
- .B1(\ptc1_i.rptc_hrc[15] ),
- .B2(_13584_),
- .X(_05551_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16639_ (.A(_13582_),
- .X(_05186_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16640_ (.A1(net903),
- .A2(_13583_),
- .B1(\ptc1_i.rptc_hrc[14] ),
- .B2(_13584_),
- .X(_05550_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16641_ (.A(_13581_),
- .X(_13585_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16642_ (.A(_13585_),
- .X(_05185_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16643_ (.A(_13573_),
- .X(_13586_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16644_ (.A(_13576_),
- .X(_13587_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16645_ (.A1(_00203_),
- .A2(_13586_),
- .B1(\ptc1_i.rptc_hrc[13] ),
- .B2(_13587_),
- .X(_05549_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16646_ (.A(_13585_),
- .X(_05184_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16647_ (.A1(net921),
- .A2(_13586_),
- .B1(\ptc1_i.rptc_hrc[12] ),
- .B2(_13587_),
- .X(_05548_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16648_ (.A(_13585_),
- .X(_05183_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16649_ (.A1(_00201_),
- .A2(_13586_),
- .B1(\ptc1_i.rptc_hrc[11] ),
- .B2(_13587_),
- .X(_05547_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16650_ (.A(_13585_),
- .X(_05182_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16651_ (.A1(_00200_),
- .A2(_13586_),
- .B1(\ptc1_i.rptc_hrc[10] ),
- .B2(_13587_),
- .X(_05546_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16652_ (.A(_13585_),
- .X(_05181_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16653_ (.A1(net891),
- .A2(_13586_),
- .B1(\ptc1_i.rptc_hrc[9] ),
- .B2(_13587_),
- .X(_05545_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16654_ (.A(_13585_),
- .X(_05180_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16655_ (.A1(net871),
- .A2(_13586_),
- .B1(\ptc1_i.rptc_hrc[8] ),
- .B2(_13587_),
- .X(_05544_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16656_ (.A(_13581_),
- .X(_13588_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16657_ (.A(_13588_),
- .X(_05179_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16658_ (.A(_13572_),
- .X(_13589_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16659_ (.A(_13575_),
- .X(_13590_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16660_ (.A1(net875),
- .A2(_13589_),
- .B1(\ptc1_i.rptc_hrc[7] ),
- .B2(_13590_),
- .X(_05543_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16661_ (.A(_13588_),
- .X(_05178_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16662_ (.A1(net928),
- .A2(_13589_),
- .B1(\ptc1_i.rptc_hrc[6] ),
- .B2(_13590_),
- .X(_05542_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16663_ (.A(_13588_),
- .X(_05177_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16664_ (.A1(_00226_),
- .A2(_13589_),
- .B1(\ptc1_i.rptc_hrc[5] ),
- .B2(_13590_),
- .X(_05541_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16665_ (.A(_13588_),
- .X(_05176_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16666_ (.A1(net885),
- .A2(_13589_),
- .B1(\ptc1_i.rptc_hrc[4] ),
- .B2(_13590_),
- .X(_05540_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16667_ (.A(_13588_),
- .X(_05175_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16668_ (.A1(_00224_),
- .A2(_13589_),
- .B1(\ptc1_i.rptc_hrc[3] ),
- .B2(_13590_),
- .X(_05539_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16669_ (.A(_13588_),
- .X(_05174_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16670_ (.A1(net881),
- .A2(_13589_),
- .B1(\ptc1_i.rptc_hrc[2] ),
- .B2(_13590_),
- .X(_05538_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16671_ (.A(_13581_),
- .X(_13591_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16672_ (.A(_13591_),
- .X(_05173_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16673_ (.A1(net883),
- .A2(_13573_),
- .B1(\ptc1_i.rptc_hrc[1] ),
- .B2(_13576_),
- .X(_05537_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16674_ (.A(_13591_),
- .X(_05172_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16675_ (.A1(net877),
- .A2(_13573_),
- .B1(\ptc1_i.rptc_hrc[0] ),
- .B2(_13576_),
- .X(_05536_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16676_ (.A(_13591_),
- .X(_05171_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_2 _16677_ (.A(_13345_),
- .B(net1374),
- .C(net934),
- .X(_13592_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16678_ (.A(_13592_),
- .X(_01474_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16679_ (.A(_13570_),
- .B(net656),
- .Y(_13593_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16680_ (.A(_13593_),
- .X(_13594_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16681_ (.A(_13594_),
- .X(_13595_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16682_ (.A(_13593_),
- .Y(_13596_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16683_ (.A(_13596_),
- .X(_13597_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16684_ (.A(_13597_),
- .X(_13598_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16685_ (.A1(_00255_),
- .A2(_13595_),
- .B1(\ptc1_i.rptc_lrc[31] ),
- .B2(_13598_),
- .X(_05535_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16686_ (.A(_13591_),
- .X(_05170_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16687_ (.A1(_00254_),
- .A2(_13595_),
- .B1(\ptc1_i.rptc_lrc[30] ),
- .B2(_13598_),
- .X(_05534_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16688_ (.A(_13591_),
- .X(_05169_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16689_ (.A1(_00252_),
- .A2(_13595_),
- .B1(\ptc1_i.rptc_lrc[29] ),
- .B2(_13598_),
- .X(_05533_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16690_ (.A(_13591_),
- .X(_05168_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16691_ (.A1(_00251_),
- .A2(_13595_),
- .B1(\ptc1_i.rptc_lrc[28] ),
- .B2(_13598_),
- .X(_05532_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16692_ (.A(_13581_),
- .X(_13599_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16693_ (.A(_13599_),
- .X(_05167_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16694_ (.A1(_00250_),
- .A2(_13595_),
- .B1(\ptc1_i.rptc_lrc[27] ),
- .B2(_13598_),
- .X(_05531_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16695_ (.A(_13599_),
- .X(_05166_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16696_ (.A1(_00249_),
- .A2(_13595_),
- .B1(\ptc1_i.rptc_lrc[26] ),
- .B2(_13598_),
- .X(_05530_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16697_ (.A(_13599_),
- .X(_05165_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16698_ (.A(_13594_),
- .X(_13600_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16699_ (.A(_13597_),
- .X(_13601_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16700_ (.A1(_00248_),
- .A2(_13600_),
- .B1(\ptc1_i.rptc_lrc[25] ),
- .B2(_13601_),
- .X(_05529_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16701_ (.A(_13599_),
- .X(_05164_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16702_ (.A1(_00247_),
- .A2(_13600_),
- .B1(\ptc1_i.rptc_lrc[24] ),
- .B2(_13601_),
- .X(_05528_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16703_ (.A(_13599_),
- .X(_05163_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16704_ (.A1(net1199),
- .A2(_13600_),
- .B1(\ptc1_i.rptc_lrc[23] ),
- .B2(_13601_),
- .X(_05527_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16705_ (.A(_13599_),
- .X(_05162_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16706_ (.A1(net1196),
- .A2(_13600_),
- .B1(\ptc1_i.rptc_lrc[22] ),
- .B2(_13601_),
- .X(_05526_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16707_ (.A(_13581_),
- .X(_13602_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16708_ (.A(_13602_),
- .X(_05161_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16709_ (.A1(_00244_),
- .A2(_13600_),
- .B1(\ptc1_i.rptc_lrc[21] ),
- .B2(_13601_),
- .X(_05525_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16710_ (.A(_13602_),
- .X(_05160_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16711_ (.A1(net1205),
- .A2(_13600_),
- .B1(\ptc1_i.rptc_lrc[20] ),
- .B2(_13601_),
- .X(_05524_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16712_ (.A(_13602_),
- .X(_05159_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16713_ (.A(_13594_),
- .X(_13603_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16714_ (.A(_13597_),
- .X(_13604_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16715_ (.A1(net1207),
- .A2(_13603_),
- .B1(\ptc1_i.rptc_lrc[19] ),
- .B2(_13604_),
- .X(_05523_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16716_ (.A(_13602_),
- .X(_05158_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16717_ (.A1(net1198),
- .A2(_13603_),
- .B1(\ptc1_i.rptc_lrc[18] ),
- .B2(_13604_),
- .X(_05522_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16718_ (.A(_13602_),
- .X(_05157_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16719_ (.A1(net1203),
- .A2(_13603_),
- .B1(\ptc1_i.rptc_lrc[17] ),
- .B2(_13604_),
- .X(_05521_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16720_ (.A(_13602_),
- .X(_05156_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16721_ (.A1(net1204),
- .A2(_13603_),
- .B1(\ptc1_i.rptc_lrc[16] ),
- .B2(_13604_),
- .X(_05520_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _16722_ (.A(_13389_),
- .X(_13605_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16723_ (.A(_13605_),
- .X(_13606_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16724_ (.A(_13606_),
- .X(_05155_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16725_ (.A1(net1197),
- .A2(_13603_),
- .B1(\ptc1_i.rptc_lrc[15] ),
- .B2(_13604_),
- .X(_05519_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16726_ (.A(_13606_),
- .X(_05154_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16727_ (.A1(net1195),
- .A2(_13603_),
- .B1(\ptc1_i.rptc_lrc[14] ),
- .B2(_13604_),
- .X(_05518_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16728_ (.A(_13606_),
- .X(_05153_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16729_ (.A(_13594_),
- .X(_13607_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16730_ (.A(_13597_),
- .X(_13608_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16731_ (.A1(net1215),
- .A2(_13607_),
- .B1(\ptc1_i.rptc_lrc[13] ),
- .B2(_13608_),
- .X(_05517_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16732_ (.A(_13606_),
- .X(_05152_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16733_ (.A1(net1202),
- .A2(_13607_),
- .B1(\ptc1_i.rptc_lrc[12] ),
- .B2(_13608_),
- .X(_05516_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16734_ (.A(_13606_),
- .X(_05151_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16735_ (.A1(net1211),
- .A2(_13607_),
- .B1(\ptc1_i.rptc_lrc[11] ),
- .B2(_13608_),
- .X(_05515_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16736_ (.A(_13606_),
- .X(_05150_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16737_ (.A1(net1219),
- .A2(_13607_),
- .B1(\ptc1_i.rptc_lrc[10] ),
- .B2(_13608_),
- .X(_05514_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16738_ (.A(_13605_),
- .X(_13609_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16739_ (.A(_13609_),
- .X(_05149_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16740_ (.A1(net899),
- .A2(_13607_),
- .B1(\ptc1_i.rptc_lrc[9] ),
- .B2(_13608_),
- .X(_05513_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16741_ (.A(_13609_),
- .X(_05148_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16742_ (.A1(net873),
- .A2(_13607_),
- .B1(\ptc1_i.rptc_lrc[8] ),
- .B2(_13608_),
- .X(_05512_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16743_ (.A(_13609_),
- .X(_05147_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16744_ (.A(_13593_),
- .X(_13610_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16745_ (.A(_13596_),
- .X(_13611_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16746_ (.A1(net893),
- .A2(_13610_),
- .B1(\ptc1_i.rptc_lrc[7] ),
- .B2(_13611_),
- .X(_05511_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16747_ (.A(_13609_),
- .X(_05146_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16748_ (.A1(net930),
- .A2(_13610_),
- .B1(\ptc1_i.rptc_lrc[6] ),
- .B2(_13611_),
- .X(_05510_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16749_ (.A(_13609_),
- .X(_05145_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16750_ (.A1(_00258_),
- .A2(_13610_),
- .B1(\ptc1_i.rptc_lrc[5] ),
- .B2(_13611_),
- .X(_05509_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16751_ (.A(_13609_),
- .X(_05144_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16752_ (.A1(net889),
- .A2(_13610_),
- .B1(\ptc1_i.rptc_lrc[4] ),
- .B2(_13611_),
- .X(_05508_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16753_ (.A(_13605_),
- .X(_13612_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16754_ (.A(_13612_),
- .X(_05143_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16755_ (.A1(net1260),
- .A2(_13610_),
- .B1(\ptc1_i.rptc_lrc[3] ),
- .B2(_13611_),
- .X(_05507_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16756_ (.A(_13612_),
- .X(_05142_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16757_ (.A1(net887),
- .A2(_13610_),
- .B1(\ptc1_i.rptc_lrc[2] ),
- .B2(_13611_),
- .X(_05506_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16758_ (.A(_13612_),
- .X(_05141_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16759_ (.A1(net905),
- .A2(_13594_),
- .B1(\ptc1_i.rptc_lrc[1] ),
- .B2(_13597_),
- .X(_05505_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16760_ (.A(_13612_),
- .X(_05140_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _16761_ (.A1(net879),
- .A2(_13594_),
- .B1(\ptc1_i.rptc_lrc[0] ),
- .B2(_13597_),
- .X(_05504_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16762_ (.A(_13557_),
- .Y(_13613_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16763_ (.A(_02257_),
- .B(_13556_),
- .Y(_13614_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16764_ (.A(_13524_),
- .B(_13531_),
- .C(_13613_),
- .D(_13614_),
- .X(_13615_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_1 _16765_ (.A(_13520_),
- .B(\i2c_i.byte_controller.bit_controller.c_state[14] ),
- .C(_13519_),
- .X(_01471_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _16766_ (.A(_13512_),
- .B(_01471_),
- .X(_13616_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16767_ (.A(_13616_),
- .Y(_13617_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16768_ (.A(_13546_),
- .B(_13562_),
- .X(_13618_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16769_ (.A(_13521_),
- .B(_13538_),
- .C(_13554_),
- .D(_13618_),
- .X(_13619_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16770_ (.A(_13561_),
- .B(_13615_),
- .C(_13617_),
- .D(_13619_),
- .X(_13620_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16771_ (.A(_13510_),
- .B(_13620_),
- .Y(_13621_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _16772_ (.A(_13615_),
- .B(_13621_),
- .Y(_13622_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a211o_1 _16773_ (.A1(net383),
- .A2(_13621_),
- .B1(_13565_),
- .C1(_13622_),
- .X(_05503_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16774_ (.A(net1342),
- .X(_13623_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16775_ (.A(_13623_),
- .X(_13624_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16776_ (.A(\i2c_i.byte_controller.shift ),
- .Y(_13625_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _16777_ (.A(\i2c_i.byte_controller.dcnt[1] ),
- .B(\i2c_i.byte_controller.dcnt[0] ),
- .C(_13625_),
- .X(_13626_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16778_ (.A(\i2c_i.byte_controller.ld ),
- .Y(_13627_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nand2_1 _16779_ (.A(\i2c_i.byte_controller.dcnt[2] ),
- .B(_13626_),
- .Y(_13628_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o211a_1 _16780_ (.A1(\i2c_i.byte_controller.dcnt[2] ),
- .A2(_13626_),
- .B1(_13627_),
- .C1(_13628_),
- .X(_13629_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _16781_ (.A(_13624_),
- .B(_13629_),
- .Y(_05502_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _16782_ (.A(\i2c_i.byte_controller.ld ),
- .B(\i2c_i.byte_controller.shift ),
- .X(_13630_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16783_ (.A(_13630_),
- .Y(_13631_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_1 _16784_ (.A1(\i2c_i.byte_controller.dcnt[0] ),
- .A2(_13631_),
- .B1(\i2c_i.byte_controller.dcnt[1] ),
- .Y(_13632_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16785_ (.A(_13623_),
- .X(_13633_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a31oi_1 _16786_ (.A1(_13627_),
- .A2(_13626_),
- .A3(_13632_),
- .B1(_13633_),
- .Y(_05501_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_1 _16787_ (.A1(\i2c_i.byte_controller.ld ),
- .A2(_13625_),
- .B1(\i2c_i.byte_controller.dcnt[0] ),
- .Y(_13634_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21a_1 _16788_ (.A1(\i2c_i.byte_controller.dcnt[0] ),
- .A2(_13631_),
- .B1(_13634_),
- .X(_13635_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _16789_ (.A(_13624_),
- .B(_13635_),
- .Y(_05500_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16790_ (.A(_13631_),
- .X(_13636_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16791_ (.A(_13630_),
- .X(_13637_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16792_ (.A(net783),
- .X(_13638_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16793_ (.A(_13638_),
- .X(_13639_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16794_ (.A1(_00135_),
- .A2(_13636_),
- .B1(\i2c_i.byte_controller.dout[7] ),
- .B2(_13637_),
- .C1(_13639_),
- .X(_05499_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16795_ (.A1(_00134_),
- .A2(_13636_),
- .B1(\i2c_i.byte_controller.dout[6] ),
- .B2(_13637_),
- .C1(_13639_),
- .X(_05498_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16796_ (.A1(_00133_),
- .A2(_13636_),
- .B1(\i2c_i.byte_controller.dout[5] ),
- .B2(_13637_),
- .C1(_13639_),
- .X(_05497_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16797_ (.A1(_00132_),
- .A2(_13636_),
- .B1(\i2c_i.byte_controller.dout[4] ),
- .B2(_13637_),
- .C1(_13639_),
- .X(_05496_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16798_ (.A1(_00131_),
- .A2(_13636_),
- .B1(\i2c_i.byte_controller.dout[3] ),
- .B2(_13637_),
- .C1(_13639_),
- .X(_05495_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16799_ (.A(_13638_),
- .X(_13640_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16800_ (.A1(_00130_),
- .A2(_13636_),
- .B1(\i2c_i.byte_controller.dout[2] ),
- .B2(_13637_),
- .C1(_13640_),
- .X(_05494_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16801_ (.A1(_00129_),
- .A2(_13631_),
- .B1(\i2c_i.byte_controller.dout[1] ),
- .B2(_13630_),
- .C1(_13640_),
- .X(_05493_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16802_ (.A1(_00128_),
- .A2(_13631_),
- .B1(\i2c_i.byte_controller.dout[0] ),
- .B2(_13630_),
- .C1(_13640_),
- .X(_05492_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16803_ (.A(\i2c_i.byte_controller.bit_controller.sda_chk ),
- .Y(_13641_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21a_1 _16804_ (.A1(_13511_),
- .A2(_13616_),
- .B1(_13641_),
- .X(_13642_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _16805_ (.A(_13515_),
- .B(_13542_),
- .X(_02256_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4b_4 _16806_ (.A(_13521_),
- .B(_13524_),
- .C(_13536_),
- .D_N(_02256_),
- .X(_13643_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_2 _16807_ (.A(_13542_),
- .B(_13526_),
- .Y(_13644_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _16808_ (.A(_13544_),
- .B(_13644_),
- .C(_13618_),
- .D(_13563_),
- .X(_13645_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o31a_1 _16809_ (.A1(_13540_),
- .A2(_13643_),
- .A3(_13645_),
- .B1(_13510_),
- .X(_13646_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor3_2 _16810_ (.A(_13565_),
- .B(_13642_),
- .C(_13646_),
- .Y(_05491_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16811_ (.A(_13612_),
- .X(_05139_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16812_ (.A(\ptc1_i.rptc_lrc[0] ),
- .Y(_13647_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16813_ (.A(\ptc1_i.rptc_cntr[0] ),
- .X(_13648_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16814_ (.A(\ptc1_i.rptc_lrc[26] ),
- .Y(_13649_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16815_ (.A(\ptc1_i.rptc_cntr[23] ),
- .Y(_13650_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16816_ (.A(\ptc1_i.rptc_cntr[25] ),
- .Y(_13651_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16817_ (.A1(\ptc1_i.rptc_lrc[23] ),
- .A2(_13650_),
- .B1(\ptc1_i.rptc_lrc[25] ),
- .B2(_13651_),
- .X(_13652_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16818_ (.A1(_13647_),
- .A2(_13648_),
- .B1(_13649_),
- .B2(\ptc1_i.rptc_cntr[26] ),
- .C1(_13652_),
- .X(_13653_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16819_ (.A(\ptc1_i.rptc_cntr[1] ),
- .Y(_13654_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16820_ (.A(\ptc1_i.rptc_cntr[30] ),
- .Y(_13655_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16821_ (.A(\ptc1_i.rptc_cntr[19] ),
- .Y(_13656_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16822_ (.A(\ptc1_i.rptc_lrc[9] ),
- .Y(_13657_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16823_ (.A1(\ptc1_i.rptc_lrc[19] ),
- .A2(_13656_),
- .B1(_13657_),
- .B2(\ptc1_i.rptc_cntr[9] ),
- .X(_13658_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16824_ (.A1(\ptc1_i.rptc_lrc[1] ),
- .A2(_13654_),
- .B1(\ptc1_i.rptc_lrc[30] ),
- .B2(_13655_),
- .C1(_13658_),
- .X(_13659_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16825_ (.A(\ptc1_i.rptc_cntr[26] ),
- .Y(_13660_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16826_ (.A(\ptc1_i.rptc_cntr[10] ),
- .Y(_13661_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16827_ (.A(\ptc1_i.rptc_cntr[8] ),
- .Y(_13662_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16828_ (.A(\ptc1_i.rptc_lrc[13] ),
- .Y(_13663_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16829_ (.A1(\ptc1_i.rptc_lrc[8] ),
- .A2(_13662_),
- .B1(_13663_),
- .B2(\ptc1_i.rptc_cntr[13] ),
- .X(_13664_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16830_ (.A1(\ptc1_i.rptc_lrc[26] ),
- .A2(_13660_),
- .B1(\ptc1_i.rptc_lrc[10] ),
- .B2(_13661_),
- .C1(_13664_),
- .X(_13665_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16831_ (.A(\ptc1_i.rptc_cntr[22] ),
- .Y(_13666_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16832_ (.A(\ptc1_i.rptc_lrc[19] ),
- .Y(_13667_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16833_ (.A(\ptc1_i.rptc_lrc[17] ),
- .Y(_13668_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16834_ (.A(\ptc1_i.rptc_lrc[30] ),
- .Y(_13669_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16835_ (.A1(_13668_),
- .A2(\ptc1_i.rptc_cntr[17] ),
- .B1(_13669_),
- .B2(\ptc1_i.rptc_cntr[30] ),
- .X(_13670_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16836_ (.A1(\ptc1_i.rptc_lrc[22] ),
- .A2(_13666_),
- .B1(_13667_),
- .B2(\ptc1_i.rptc_cntr[19] ),
- .C1(_13670_),
- .X(_13671_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _16837_ (.A(_13653_),
- .B(_13659_),
- .C(_13665_),
- .D(_13671_),
- .X(_13672_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16838_ (.A(\ptc1_i.rptc_lrc[6] ),
- .Y(_13673_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16839_ (.A(\ptc1_i.rptc_lrc[5] ),
- .Y(_13674_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16840_ (.A(\ptc1_i.rptc_cntr[5] ),
- .Y(_13675_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16841_ (.A(\ptc1_i.rptc_lrc[16] ),
- .Y(_13676_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16842_ (.A1(\ptc1_i.rptc_lrc[5] ),
- .A2(_13675_),
- .B1(_13676_),
- .B2(\ptc1_i.rptc_cntr[16] ),
- .X(_13677_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16843_ (.A1(_13673_),
- .A2(\ptc1_i.rptc_cntr[6] ),
- .B1(_13674_),
- .B2(\ptc1_i.rptc_cntr[5] ),
- .C1(_13677_),
- .X(_13678_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16844_ (.A(\ptc1_i.rptc_cntr[9] ),
- .Y(_13679_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16845_ (.A(_13648_),
- .Y(_13680_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16846_ (.A(\ptc1_i.rptc_lrc[24] ),
- .Y(_13681_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16847_ (.A(\ptc1_i.rptc_lrc[3] ),
- .Y(_13682_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16848_ (.A1(_13681_),
- .A2(\ptc1_i.rptc_cntr[24] ),
- .B1(_13682_),
- .B2(\ptc1_i.rptc_cntr[3] ),
- .X(_13683_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16849_ (.A1(\ptc1_i.rptc_lrc[9] ),
- .A2(_13679_),
- .B1(\ptc1_i.rptc_lrc[0] ),
- .B2(_13680_),
- .C1(_13683_),
- .X(_13684_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16850_ (.A(\ptc1_i.rptc_lrc[25] ),
- .Y(_13685_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16851_ (.A(\ptc1_i.rptc_cntr[3] ),
- .Y(_13686_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16852_ (.A(\ptc1_i.rptc_lrc[7] ),
- .Y(_13687_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16853_ (.A(\ptc1_i.rptc_lrc[8] ),
- .Y(_13688_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16854_ (.A1(_13687_),
- .A2(\ptc1_i.rptc_cntr[7] ),
- .B1(_13688_),
- .B2(\ptc1_i.rptc_cntr[8] ),
- .X(_13689_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16855_ (.A1(_13685_),
- .A2(\ptc1_i.rptc_cntr[25] ),
- .B1(\ptc1_i.rptc_lrc[3] ),
- .B2(_13686_),
- .C1(_13689_),
- .X(_13690_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16856_ (.A(\ptc1_i.rptc_cntr[16] ),
- .Y(_13691_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16857_ (.A(\ptc1_i.rptc_lrc[21] ),
- .Y(_13692_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16858_ (.A(\ptc1_i.rptc_cntr[11] ),
- .Y(_13693_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16859_ (.A(\ptc1_i.rptc_cntr[6] ),
- .Y(_13694_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16860_ (.A1(\ptc1_i.rptc_lrc[11] ),
- .A2(_13693_),
- .B1(\ptc1_i.rptc_lrc[6] ),
- .B2(_13694_),
- .X(_13695_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16861_ (.A1(\ptc1_i.rptc_lrc[16] ),
- .A2(_13691_),
- .B1(_13692_),
- .B2(\ptc1_i.rptc_cntr[21] ),
- .C1(_13695_),
- .X(_13696_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _16862_ (.A(_13678_),
- .B(_13684_),
- .C(_13690_),
- .D(_13696_),
- .X(_13697_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16863_ (.A(\ptc1_i.rptc_cntr[4] ),
- .Y(_13698_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16864_ (.A(\ptc1_i.rptc_cntr[18] ),
- .Y(_13699_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16865_ (.A(\ptc1_i.rptc_lrc[22] ),
- .Y(_13700_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16866_ (.A1(\ptc1_i.rptc_lrc[18] ),
- .A2(_13699_),
- .B1(_13700_),
- .B2(\ptc1_i.rptc_cntr[22] ),
- .X(_13701_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16867_ (.A(\ptc1_i.rptc_lrc[1] ),
- .Y(_13702_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16868_ (.A(\ptc1_i.rptc_lrc[4] ),
- .Y(_13703_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16869_ (.A(\ptc1_i.rptc_lrc[23] ),
- .Y(_13704_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16870_ (.A(\ptc1_i.rptc_cntr[28] ),
- .Y(_13705_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16871_ (.A1(_13704_),
- .A2(\ptc1_i.rptc_cntr[23] ),
- .B1(\ptc1_i.rptc_lrc[28] ),
- .B2(_13705_),
- .X(_13706_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16872_ (.A1(_13702_),
- .A2(\ptc1_i.rptc_cntr[1] ),
- .B1(_13703_),
- .B2(\ptc1_i.rptc_cntr[4] ),
- .C1(_13706_),
- .X(_13707_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16873_ (.A(\ptc1_i.rptc_cntr[31] ),
- .Y(_13708_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16874_ (.A(\ptc1_i.rptc_lrc[28] ),
- .Y(_13709_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16875_ (.A(\ptc1_i.rptc_lrc[29] ),
- .Y(_13710_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16876_ (.A(\ptc1_i.rptc_lrc[18] ),
- .Y(_13711_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16877_ (.A1(_13710_),
- .A2(\ptc1_i.rptc_cntr[29] ),
- .B1(_13711_),
- .B2(\ptc1_i.rptc_cntr[18] ),
- .X(_13712_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16878_ (.A1(\ptc1_i.rptc_lrc[31] ),
- .A2(_13708_),
- .B1(_13709_),
- .B2(\ptc1_i.rptc_cntr[28] ),
- .C1(_13712_),
- .X(_13713_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _16879_ (.A1(\ptc1_i.rptc_lrc[4] ),
- .A2(_13698_),
- .B1(_13701_),
- .C1(_13707_),
- .D1(_13713_),
- .X(_13714_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16880_ (.A(\ptc1_i.rptc_cntr[14] ),
- .Y(_13715_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16881_ (.A(\ptc1_i.rptc_lrc[11] ),
- .Y(_13716_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16882_ (.A(\ptc1_i.rptc_cntr[29] ),
- .Y(_13717_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16883_ (.A(\ptc1_i.rptc_cntr[12] ),
- .Y(_13718_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16884_ (.A(\ptc1_i.rptc_cntr[20] ),
- .Y(_13719_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16885_ (.A1(\ptc1_i.rptc_lrc[12] ),
- .A2(_13718_),
- .B1(\ptc1_i.rptc_lrc[20] ),
- .B2(_13719_),
- .X(_13720_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16886_ (.A1(_13716_),
- .A2(\ptc1_i.rptc_cntr[11] ),
- .B1(\ptc1_i.rptc_lrc[29] ),
- .B2(_13717_),
- .C1(_13720_),
- .X(_13721_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16887_ (.A(\ptc1_i.rptc_lrc[12] ),
- .Y(_13722_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16888_ (.A(\ptc1_i.rptc_cntr[27] ),
- .Y(_13723_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16889_ (.A(\ptc1_i.rptc_cntr[7] ),
- .Y(_13724_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16890_ (.A(\ptc1_i.rptc_cntr[21] ),
- .Y(_13725_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16891_ (.A1(\ptc1_i.rptc_lrc[7] ),
- .A2(_13724_),
- .B1(\ptc1_i.rptc_lrc[21] ),
- .B2(_13725_),
- .X(_13726_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16892_ (.A1(_13722_),
- .A2(\ptc1_i.rptc_cntr[12] ),
- .B1(\ptc1_i.rptc_lrc[27] ),
- .B2(_13723_),
- .C1(_13726_),
- .X(_13727_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16893_ (.A(\ptc1_i.rptc_lrc[15] ),
- .Y(_13728_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16894_ (.A(\ptc1_i.rptc_lrc[20] ),
- .Y(_13729_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16895_ (.A(\ptc1_i.rptc_cntr[15] ),
- .Y(_13730_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16896_ (.A(\ptc1_i.rptc_lrc[27] ),
- .Y(_13731_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16897_ (.A1(\ptc1_i.rptc_lrc[15] ),
- .A2(_13730_),
- .B1(_13731_),
- .B2(\ptc1_i.rptc_cntr[27] ),
- .X(_13732_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16898_ (.A1(_13728_),
- .A2(\ptc1_i.rptc_cntr[15] ),
- .B1(_13729_),
- .B2(\ptc1_i.rptc_cntr[20] ),
- .C1(_13732_),
- .X(_13733_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16899_ (.A(\ptc1_i.rptc_cntr[13] ),
- .Y(_13734_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16900_ (.A(\ptc1_i.rptc_cntr[24] ),
- .Y(_13735_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16901_ (.A(\ptc1_i.rptc_lrc[14] ),
- .Y(_13736_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16902_ (.A(\ptc1_i.rptc_lrc[2] ),
- .Y(_13737_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16903_ (.A1(_13736_),
- .A2(\ptc1_i.rptc_cntr[14] ),
- .B1(_13737_),
- .B2(\ptc1_i.rptc_cntr[2] ),
- .X(_13738_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16904_ (.A1(\ptc1_i.rptc_lrc[13] ),
- .A2(_13734_),
- .B1(\ptc1_i.rptc_lrc[24] ),
- .B2(_13735_),
- .C1(_13738_),
- .X(_13739_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16905_ (.A(\ptc1_i.rptc_cntr[17] ),
- .Y(_13740_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16906_ (.A(\ptc1_i.rptc_lrc[10] ),
- .Y(_13741_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16907_ (.A(\ptc1_i.rptc_lrc[31] ),
- .Y(_13742_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16908_ (.A(\ptc1_i.rptc_cntr[2] ),
- .Y(_13743_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _16909_ (.A1(_13742_),
- .A2(\ptc1_i.rptc_cntr[31] ),
- .B1(\ptc1_i.rptc_lrc[2] ),
- .B2(_13743_),
- .X(_13744_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _16910_ (.A1(\ptc1_i.rptc_lrc[17] ),
- .A2(_13740_),
- .B1(_13741_),
- .B2(\ptc1_i.rptc_cntr[10] ),
- .C1(_13744_),
- .X(_13745_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _16911_ (.A(_13727_),
- .B(_13733_),
- .C(_13739_),
- .D(_13745_),
- .X(_13746_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _16912_ (.A1(\ptc1_i.rptc_lrc[14] ),
- .A2(_13715_),
- .B1(\ptc1_i.rptc_ctrl[0] ),
- .C1(_13721_),
- .D1(_13746_),
- .X(_13747_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_2 _16913_ (.A(_13672_),
- .B(_13697_),
- .C(_13714_),
- .D(_13747_),
- .X(_13748_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16914_ (.A(_13748_),
- .Y(_13749_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16915_ (.A(\ptc1_i.rptc_ctrl[7] ),
- .Y(_13750_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_4 _16916_ (.A1(\ptc1_i.rptc_ctrl[4] ),
- .A2(_13749_),
- .B1(_13750_),
- .Y(_13751_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_8 _16917_ (.A(net940),
- .B(net934),
- .Y(_01470_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16918_ (.A(\ptc1_i.rptc_ctrl[1] ),
- .Y(_13752_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16919_ (.A(\ptc1_i.rptc_ctrl[2] ),
- .Y(_13753_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a2bb2o_1 _16920_ (.A1_N(_13753_),
- .A2_N(net1135),
- .B1(_13753_),
- .B2(net1135),
- .X(_02775_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _16921_ (.A(\ptc1_i.rptc_ctrl[0] ),
- .Y(_13754_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221oi_2 _16922_ (.A1(_13752_),
- .A2(_02775_),
- .B1(\ptc1_i.rptc_ctrl[4] ),
- .B2(_13748_),
- .C1(_13754_),
- .Y(_13755_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _16923_ (.A(_13751_),
- .B(net669),
- .C(_13755_),
- .X(_13756_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _16924_ (.A(_13756_),
- .X(_13757_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16925_ (.A(_13757_),
- .X(_13758_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16926_ (.A0(\ptc1_i.rptc_cntr[31] ),
- .A1(_00191_),
- .S(_13758_),
- .X(_05490_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16927_ (.A(_13612_),
- .X(_05138_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16928_ (.A0(\ptc1_i.rptc_cntr[30] ),
- .A1(_00190_),
- .S(_13758_),
- .X(_05489_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16929_ (.A(_13605_),
- .X(_13759_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16930_ (.A(_13759_),
- .X(_05137_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16931_ (.A0(\ptc1_i.rptc_cntr[29] ),
- .A1(_00188_),
- .S(_13758_),
- .X(_05488_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16932_ (.A(_13759_),
- .X(_05136_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16933_ (.A0(\ptc1_i.rptc_cntr[28] ),
- .A1(_00187_),
- .S(_13758_),
- .X(_05487_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16934_ (.A(_13759_),
- .X(_05135_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16935_ (.A0(\ptc1_i.rptc_cntr[27] ),
- .A1(_00186_),
- .S(_13758_),
- .X(_05486_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16936_ (.A(_13759_),
- .X(_05134_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16937_ (.A0(\ptc1_i.rptc_cntr[26] ),
- .A1(_00185_),
- .S(_13758_),
- .X(_05485_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16938_ (.A(_13759_),
- .X(_05133_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16939_ (.A(_13757_),
- .X(_13760_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16940_ (.A0(\ptc1_i.rptc_cntr[25] ),
- .A1(_00184_),
- .S(_13760_),
- .X(_05484_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16941_ (.A(_13759_),
- .X(_05132_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16942_ (.A0(\ptc1_i.rptc_cntr[24] ),
- .A1(_00183_),
- .S(_13760_),
- .X(_05483_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16943_ (.A(_13605_),
- .X(_13761_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16944_ (.A(_13761_),
- .X(_05131_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16945_ (.A0(\ptc1_i.rptc_cntr[23] ),
- .A1(_00182_),
- .S(_13760_),
- .X(_05482_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16946_ (.A(_13761_),
- .X(_05130_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16947_ (.A0(\ptc1_i.rptc_cntr[22] ),
- .A1(_00181_),
- .S(_13760_),
- .X(_05481_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16948_ (.A(_13761_),
- .X(_05129_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16949_ (.A0(\ptc1_i.rptc_cntr[21] ),
- .A1(_00180_),
- .S(_13760_),
- .X(_05480_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16950_ (.A(_13761_),
- .X(_05128_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16951_ (.A0(\ptc1_i.rptc_cntr[20] ),
- .A1(_00179_),
- .S(_13760_),
- .X(_05479_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16952_ (.A(_13761_),
- .X(_05127_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _16953_ (.A(_13757_),
- .X(_13762_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16954_ (.A0(\ptc1_i.rptc_cntr[19] ),
- .A1(_00177_),
- .S(_13762_),
- .X(_05478_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16955_ (.A(_13761_),
- .X(_05126_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16956_ (.A0(\ptc1_i.rptc_cntr[18] ),
- .A1(_00176_),
- .S(_13762_),
- .X(_05477_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16957_ (.A(_13605_),
- .X(_13763_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16958_ (.A(_13763_),
- .X(_05125_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16959_ (.A0(\ptc1_i.rptc_cntr[17] ),
- .A1(_00175_),
- .S(_13762_),
- .X(_05476_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16960_ (.A(_13763_),
- .X(_05124_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16961_ (.A0(\ptc1_i.rptc_cntr[16] ),
- .A1(_00174_),
- .S(_13762_),
- .X(_05475_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16962_ (.A(_13763_),
- .X(_05123_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16963_ (.A0(\ptc1_i.rptc_cntr[15] ),
- .A1(_00173_),
- .S(_13762_),
- .X(_05474_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16964_ (.A(_13763_),
- .X(_05122_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16965_ (.A0(\ptc1_i.rptc_cntr[14] ),
- .A1(_00172_),
- .S(_13762_),
- .X(_05473_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16966_ (.A(_13763_),
- .X(_05121_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16967_ (.A(_13757_),
- .X(_13764_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16968_ (.A0(\ptc1_i.rptc_cntr[13] ),
- .A1(_00171_),
- .S(_13764_),
- .X(_05472_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16969_ (.A(_13763_),
- .X(_05120_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16970_ (.A0(\ptc1_i.rptc_cntr[12] ),
- .A1(_00170_),
- .S(_13764_),
- .X(_05471_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16971_ (.A(net783),
- .X(_13765_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16972_ (.A(net782),
- .X(_13766_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16973_ (.A(_13766_),
- .X(_05119_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16974_ (.A0(\ptc1_i.rptc_cntr[11] ),
- .A1(net846),
- .S(_13764_),
- .X(_05470_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16975_ (.A(_13766_),
- .X(_05118_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16976_ (.A0(\ptc1_i.rptc_cntr[10] ),
- .A1(net857),
- .S(_13764_),
- .X(_05469_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16977_ (.A(_13766_),
- .X(_05117_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16978_ (.A0(\ptc1_i.rptc_cntr[9] ),
- .A1(net811),
- .S(_13764_),
- .X(_05468_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16979_ (.A(_13766_),
- .X(_05116_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16980_ (.A0(\ptc1_i.rptc_cntr[8] ),
- .A1(net787),
- .S(_13764_),
- .X(_05467_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16981_ (.A(_13766_),
- .X(_05115_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _16982_ (.A(_13756_),
- .X(_13767_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16983_ (.A0(\ptc1_i.rptc_cntr[7] ),
- .A1(net803),
- .S(_13767_),
- .X(_05466_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16984_ (.A(_13766_),
- .X(_05114_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16985_ (.A0(\ptc1_i.rptc_cntr[6] ),
- .A1(net926),
- .S(_13767_),
- .X(_05465_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _16986_ (.A(net782),
- .X(_13768_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16987_ (.A(_13768_),
- .X(_05113_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16988_ (.A0(\ptc1_i.rptc_cntr[5] ),
- .A1(net861),
- .S(_13767_),
- .X(_05464_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16989_ (.A(_13768_),
- .X(_05112_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16990_ (.A0(\ptc1_i.rptc_cntr[4] ),
- .A1(net791),
- .S(_13767_),
- .X(_05463_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16991_ (.A(_13768_),
- .X(_05111_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16992_ (.A0(\ptc1_i.rptc_cntr[3] ),
- .A1(net831),
- .S(_13767_),
- .X(_05462_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16993_ (.A(_13768_),
- .X(_05110_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16994_ (.A0(\ptc1_i.rptc_cntr[2] ),
- .A1(net795),
- .S(_13767_),
- .X(_05461_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16995_ (.A(_13768_),
- .X(_05109_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16996_ (.A0(\ptc1_i.rptc_cntr[1] ),
- .A1(net807),
- .S(_13757_),
- .X(_05460_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _16997_ (.A(_13768_),
- .X(_05108_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__mux2_1 _16998_ (.A0(_13648_),
- .A1(net799),
- .S(_13757_),
- .X(_05459_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_2 _16999_ (.A1(_13620_),
- .A2(_13645_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_en ),
- .Y(_13769_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17000_ (.A(_13769_),
- .X(_13770_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17001_ (.A(_13769_),
- .Y(_13771_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17002_ (.A(_13771_),
- .X(_13772_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17003_ (.A(_13772_),
- .X(_13773_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17004_ (.A(_13566_),
- .X(_13774_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17005_ (.A1(_13617_),
- .A2(_13770_),
- .B1(_13512_),
- .B2(_13773_),
- .C1(_13774_),
- .X(_05458_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17006_ (.A(_13770_),
- .X(_13775_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17007_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[15] ),
- .A2(_13773_),
- .B1(_13521_),
- .B2(_13775_),
- .C1(_13774_),
- .X(_05457_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17008_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[14] ),
- .A2(_13773_),
- .B1(_13524_),
- .B2(_13775_),
- .C1(_13774_),
- .X(_05456_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17009_ (.A(\i2c_i.byte_controller.core_cmd[2] ),
- .Y(_13776_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _17010_ (.A(\i2c_i.byte_controller.bit_controller.c_state[0] ),
- .B(_13620_),
- .X(_13777_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _17011_ (.A(_13776_),
- .B(_13777_),
- .Y(_13778_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17012_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[13] ),
- .A2(_13773_),
- .B1(_13775_),
- .B2(_13778_),
- .C1(_13774_),
- .X(_05455_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17013_ (.A(_13771_),
- .X(_13779_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17014_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[12] ),
- .A2(_13779_),
- .B1(_13536_),
- .B2(_13775_),
- .C1(_13774_),
- .X(_05454_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17015_ (.A(_13567_),
- .X(_13780_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17016_ (.A1(_13537_),
- .A2(_13770_),
- .B1(\i2c_i.byte_controller.bit_controller.c_state[11] ),
- .B2(_13773_),
- .C1(_13780_),
- .X(_05453_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17017_ (.A(_13769_),
- .X(_13781_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17018_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[10] ),
- .A2(_13779_),
- .B1(_13531_),
- .B2(_13781_),
- .C1(_13780_),
- .X(_05452_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17019_ (.A(\i2c_i.byte_controller.core_cmd[1] ),
- .Y(_13782_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _17020_ (.A(_13782_),
- .B(_13777_),
- .Y(_13783_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17021_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[9] ),
- .A2(_13779_),
- .B1(_13775_),
- .B2(_13783_),
- .C1(_13780_),
- .X(_05451_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17022_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[8] ),
- .A2(_13779_),
- .B1(_13551_),
- .B2(_13781_),
- .C1(_13780_),
- .X(_05450_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17023_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[7] ),
- .A2(_13779_),
- .B1(_13553_),
- .B2(_13781_),
- .C1(_13780_),
- .X(_05449_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17024_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[6] ),
- .A2(_13779_),
- .B1(_13613_),
- .B2(_13781_),
- .C1(_13780_),
- .X(_05448_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and2b_1 _17025_ (.A_N(_13777_),
- .B(\i2c_i.byte_controller.core_cmd[3] ),
- .X(_13784_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17026_ (.A(_13566_),
- .X(_13785_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17027_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[5] ),
- .A2(_13772_),
- .B1(_13775_),
- .B2(_13784_),
- .C1(_13785_),
- .X(_05447_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17028_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[4] ),
- .A2(_13772_),
- .B1(_13561_),
- .B2(_13781_),
- .C1(_13785_),
- .X(_05446_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17029_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[3] ),
- .A2(_13772_),
- .B1(_13562_),
- .B2(_13781_),
- .C1(_13785_),
- .X(_05445_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17030_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[2] ),
- .A2(_13772_),
- .B1(_13546_),
- .B2(_13770_),
- .C1(_13785_),
- .X(_05444_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17031_ (.A1(\i2c_i.byte_controller.bit_controller.c_state[1] ),
- .A2(_13772_),
- .B1(_13544_),
- .B2(_13770_),
- .C1(_13785_),
- .X(_05443_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and2b_1 _17032_ (.A_N(_13777_),
- .B(\i2c_i.byte_controller.core_cmd[4] ),
- .X(_13786_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17033_ (.A1(_13770_),
- .A2(_13786_),
- .B1(\i2c_i.byte_controller.bit_controller.c_state[0] ),
- .B2(_13773_),
- .C1(_13785_),
- .X(_05442_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17034_ (.A(\i2c_i.byte_controller.bit_controller.ena ),
- .X(_13787_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17035_ (.A(_13787_),
- .Y(_13788_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17036_ (.A(net938),
- .Y(_13789_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _17037_ (.A(net943),
- .B(net941),
- .C(_13789_),
- .X(_13790_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_4 _17038_ (.A(_13788_),
- .B(_13790_),
- .X(_13791_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17039_ (.A(_13791_),
- .Y(_00043_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17040_ (.A(net1299),
- .X(_13792_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _17041_ (.A(net937),
- .B(_13348_),
- .C(net947),
- .D(net1079),
- .X(_13793_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _17042_ (.A(net956),
- .B(net999),
- .C(net1078),
- .X(_13794_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17043_ (.A(_13794_),
- .X(_13795_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17044_ (.A(_13795_),
- .X(_02289_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_2 _17045_ (.A(_13623_),
- .B(_02289_),
- .Y(_13796_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17046_ (.A1(\i2c_i.cr[2] ),
- .A2(_00043_),
- .B1(_13792_),
- .B2(_13791_),
- .C1(net1138),
- .X(_05441_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17047_ (.A(net804),
- .X(_13797_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17048_ (.A1(\i2c_i.cr[1] ),
- .A2(_00043_),
- .B1(_13797_),
- .B2(_13791_),
- .C1(_13796_),
- .X(_05440_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17049_ (.A(net796),
- .X(_13798_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17050_ (.A1(\i2c_i.cr[0] ),
- .A2(_00043_),
- .B1(_13798_),
- .B2(_13791_),
- .C1(net1138),
- .X(_05439_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17051_ (.A1(\i2c_i.byte_controller.bit_controller.cmd_stop ),
- .A2(_13510_),
- .B1(\i2c_i.byte_controller.core_cmd[3] ),
- .B2(_13511_),
- .C1(_13640_),
- .X(_05438_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17052_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[0] ),
- .B(\i2c_i.byte_controller.bit_controller.filter_cnt[1] ),
- .X(_13799_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17053_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[2] ),
- .B(_13799_),
- .X(_13800_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17054_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[3] ),
- .B(_13800_),
- .X(_13801_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17055_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[4] ),
- .B(_13801_),
- .X(_13802_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17056_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[5] ),
- .B(_13802_),
- .X(_13803_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17057_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[6] ),
- .B(_13803_),
- .X(_13804_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17058_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[7] ),
- .B(_13804_),
- .X(_13805_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17059_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[8] ),
- .B(_13805_),
- .X(_13806_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17060_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[9] ),
- .B(_13806_),
- .X(_13807_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17061_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[10] ),
- .B(_13807_),
- .X(_13808_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17062_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[11] ),
- .B(_13808_),
- .X(_13809_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17063_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[12] ),
- .B(_13809_),
- .X(_13810_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _17064_ (.A(\i2c_i.byte_controller.bit_controller.filter_cnt[13] ),
- .B(_13810_),
- .X(_13811_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17065_ (.A(_13811_),
- .Y(_13812_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17066_ (.A(_13812_),
- .X(_01469_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17067_ (.A(_13811_),
- .X(_13813_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17068_ (.A(_13623_),
- .X(_13814_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17069_ (.A1(net1381),
- .A2(_01469_),
- .B1(\i2c_i.byte_controller.bit_controller.fSCL[2] ),
- .B2(_13813_),
- .C1(_13814_),
- .X(_05437_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17070_ (.A1(\i2c_i.byte_controller.bit_controller.fSCL[0] ),
- .A2(_01469_),
- .B1(\i2c_i.byte_controller.bit_controller.fSCL[1] ),
- .B2(_13813_),
- .C1(_13814_),
- .X(_05436_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17071_ (.A1(net1379),
- .A2(net634),
- .B1(\i2c_i.byte_controller.bit_controller.fSCL[0] ),
- .B2(_13813_),
- .C1(_13814_),
- .X(_05435_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17072_ (.A1(\i2c_i.byte_controller.bit_controller.fSDA[1] ),
- .A2(_01469_),
- .B1(\i2c_i.byte_controller.bit_controller.fSDA[2] ),
- .B2(_13813_),
- .C1(_13814_),
- .X(_05434_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17073_ (.A1(\i2c_i.byte_controller.bit_controller.fSDA[0] ),
- .A2(_13812_),
- .B1(\i2c_i.byte_controller.bit_controller.fSDA[1] ),
- .B2(_13813_),
- .C1(_13814_),
- .X(_05433_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17074_ (.A1(\i2c_i.byte_controller.bit_controller.cSDA[1] ),
- .A2(_13812_),
- .B1(\i2c_i.byte_controller.bit_controller.fSDA[0] ),
- .B2(_13813_),
- .C1(_13814_),
- .X(_05432_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17075_ (.A(net782),
- .X(_13815_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17076_ (.A(_13815_),
- .X(_05107_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17077_ (.A(\ptc2_i.rptc_ctrl[5] ),
- .Y(_13816_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _17078_ (.A(_13345_),
- .B(_13504_),
- .C(net1309),
- .X(_13817_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17079_ (.A(_13817_),
- .Y(_13818_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_1 _17080_ (.A(\ptc2_i.rptc_ctrl[5] ),
- .B(_13818_),
- .X(_13819_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a32o_1 _17081_ (.A1(_13816_),
- .A2(_13817_),
- .A3(\ptc2_i.rptc_ctrl[6] ),
- .B1(_00048_),
- .B2(_13819_),
- .X(_05431_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17082_ (.A(\i2c_i.byte_controller.c_state[2] ),
- .Y(_13820_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17083_ (.A(\i2c_i.byte_controller.bit_controller.cmd_ack ),
- .Y(_13821_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17084_ (.A(_13821_),
- .X(_13822_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17085_ (.A(_13822_),
- .X(_13823_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17086_ (.A(\i2c_i.byte_controller.ack_out ),
- .Y(_13824_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_1 _17087_ (.A1(_13820_),
- .A2(_13823_),
- .B1(_13824_),
- .Y(_13825_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o311a_1 _17088_ (.A1(_13820_),
- .A2(_13823_),
- .A3(\i2c_i.byte_controller.bit_controller.dout ),
- .B1(_13567_),
- .C1(_13825_),
- .X(_05430_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _17089_ (.A(_13504_),
- .B(_13795_),
- .X(_13826_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17090_ (.A(net1133),
- .Y(_13827_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17091_ (.A(_13827_),
- .X(_13828_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17092_ (.A(net1324),
- .X(_13829_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17093_ (.A(_13826_),
- .X(_13830_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17094_ (.A1(\i2c_i.byte_controller.din[7] ),
- .A2(_13828_),
- .B1(_13829_),
- .B2(_13830_),
- .C1(_13640_),
- .X(_05429_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17095_ (.A1(\i2c_i.byte_controller.din[6] ),
- .A2(_13828_),
- .B1(net922),
- .B2(_13830_),
- .C1(_13640_),
- .X(_05428_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17096_ (.A(net1279),
- .X(_13831_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17097_ (.A(_13638_),
- .X(_13832_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17098_ (.A1(\i2c_i.byte_controller.din[5] ),
- .A2(_13828_),
- .B1(_13831_),
- .B2(_13830_),
- .C1(_13832_),
- .X(_05427_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17099_ (.A(net1326),
- .X(_13833_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17100_ (.A1(\i2c_i.byte_controller.din[4] ),
- .A2(_13828_),
- .B1(_13833_),
- .B2(_13830_),
- .C1(_13832_),
- .X(_05426_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17101_ (.A(net1258),
- .X(_13834_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17102_ (.A1(\i2c_i.byte_controller.din[3] ),
- .A2(_13828_),
- .B1(_13834_),
- .B2(_13830_),
- .C1(_13832_),
- .X(_05425_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17103_ (.A1(\i2c_i.byte_controller.din[2] ),
- .A2(_13828_),
- .B1(_13792_),
- .B2(_13830_),
- .C1(_13832_),
- .X(_05424_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17104_ (.A1(\i2c_i.byte_controller.din[1] ),
- .A2(_13827_),
- .B1(_13797_),
- .B2(net1133),
- .C1(_13832_),
- .X(_05423_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17105_ (.A1(\i2c_i.byte_controller.din[0] ),
- .A2(_13827_),
- .B1(_13798_),
- .B2(_13826_),
- .C1(_13832_),
- .X(_05422_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _17106_ (.A(net1374),
- .B(_13795_),
- .X(_13835_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17107_ (.A(net1130),
- .Y(_13836_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17108_ (.A(_13836_),
- .X(_13837_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17109_ (.A(_13835_),
- .X(_13838_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17110_ (.A(_13638_),
- .X(_13839_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17111_ (.A1(_13787_),
- .A2(_13837_),
- .B1(_13829_),
- .B2(_13838_),
- .C1(_13839_),
- .X(_05421_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17112_ (.A1(\i2c_i.ctr[6] ),
- .A2(_13837_),
- .B1(net922),
- .B2(_13838_),
- .C1(_13839_),
- .X(_05420_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17113_ (.A1(\i2c_i.ctr[5] ),
- .A2(_13837_),
- .B1(_13831_),
- .B2(_13838_),
- .C1(_13839_),
- .X(_05419_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17114_ (.A1(\i2c_i.ctr[4] ),
- .A2(_13837_),
- .B1(_13833_),
- .B2(_13838_),
- .C1(_13839_),
- .X(_05418_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17115_ (.A1(\i2c_i.ctr[3] ),
- .A2(_13837_),
- .B1(_13834_),
- .B2(_13838_),
- .C1(_13839_),
- .X(_05417_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17116_ (.A1(\i2c_i.ctr[2] ),
- .A2(_13837_),
- .B1(_13792_),
- .B2(_13838_),
- .C1(_13839_),
- .X(_05416_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17117_ (.A(_13638_),
- .X(_13840_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17118_ (.A1(\i2c_i.ctr[1] ),
- .A2(_13836_),
- .B1(_13797_),
- .B2(_13835_),
- .C1(_13840_),
- .X(_05415_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17119_ (.A1(\i2c_i.ctr[0] ),
- .A2(_13836_),
- .B1(_13798_),
- .B2(net1130),
- .C1(_13840_),
- .X(_05414_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17120_ (.A(net800),
- .Y(_13841_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17121_ (.A(_00042_),
- .Y(_13842_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17122_ (.A(\i2c_i.byte_controller.start ),
- .Y(_13843_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o32a_1 _17123_ (.A1(_13841_),
- .A2(_13842_),
- .A3(_02289_),
- .B1(_13843_),
- .B2(_00042_),
- .X(_13844_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _17124_ (.A(_13624_),
- .B(_13844_),
- .Y(_05413_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17125_ (.A(net922),
- .Y(_13845_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17126_ (.A(\i2c_i.byte_controller.stop ),
- .Y(_13846_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o32a_1 _17127_ (.A1(_13845_),
- .A2(_13842_),
- .A3(_02289_),
- .B1(_00042_),
- .B2(_13846_),
- .X(_13847_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _17128_ (.A(_13624_),
- .B(_13847_),
- .Y(_05412_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17129_ (.A(net858),
- .Y(_13848_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17130_ (.A(\i2c_i.byte_controller.read ),
- .Y(_13849_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o32a_1 _17131_ (.A1(_13848_),
- .A2(_13842_),
- .A3(_13795_),
- .B1(_00042_),
- .B2(_13849_),
- .X(_13850_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _17132_ (.A(_13624_),
- .B(_13850_),
- .Y(_05411_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17133_ (.A(net788),
- .Y(_13851_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17134_ (.A(\i2c_i.byte_controller.write ),
- .Y(_13852_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o32a_1 _17135_ (.A1(_13851_),
- .A2(_13842_),
- .A3(_13795_),
- .B1(_00042_),
- .B2(_13852_),
- .X(_13853_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _17136_ (.A(_13624_),
- .B(_13853_),
- .Y(_05410_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17137_ (.A(_13389_),
- .X(_13854_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17138_ (.A(\i2c_i.ack ),
- .Y(_13855_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_1 _17139_ (.A1(_02289_),
- .A2(_13791_),
- .B1(_13855_),
- .Y(_13856_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o311a_1 _17140_ (.A1(_02289_),
- .A2(_13791_),
- .A3(net828),
- .B1(_13854_),
- .C1(_13856_),
- .X(_05409_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17141_ (.A(_13815_),
- .X(_05106_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17142_ (.A(_13818_),
- .X(_00360_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17143_ (.A(_13817_),
- .X(_13857_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17144_ (.A1(\ptc2_i.rptc_ctrl[8] ),
- .A2(_13857_),
- .B1(net1294),
- .B2(_00360_),
- .X(_05408_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17145_ (.A(_13815_),
- .X(_05105_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17146_ (.A1(\ptc2_i.rptc_ctrl[7] ),
- .A2(_13857_),
- .B1(_13829_),
- .B2(_00360_),
- .X(_05407_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17147_ (.A(_13815_),
- .X(_05104_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21a_1 _17148_ (.A1(_13831_),
- .A2(_13857_),
- .B1(_13819_),
- .X(_05406_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17149_ (.A(_13815_),
- .X(_05103_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17150_ (.A1(\ptc2_i.rptc_ctrl[4] ),
- .A2(_13857_),
- .B1(_13833_),
- .B2(_00360_),
- .X(_05405_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17151_ (.A(_13815_),
- .X(_05102_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17152_ (.A1(\ptc2_i.rptc_ctrl[3] ),
- .A2(net1322),
- .B1(_13834_),
- .B2(_00360_),
- .X(_05404_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17153_ (.A(net782),
- .X(_13858_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17154_ (.A(_13858_),
- .X(_05101_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17155_ (.A1(\ptc2_i.rptc_ctrl[2] ),
- .A2(_13857_),
- .B1(_13792_),
- .B2(_00360_),
- .X(_05403_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17156_ (.A(_13858_),
- .X(_05100_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17157_ (.A1(\ptc2_i.rptc_ctrl[1] ),
- .A2(_13817_),
- .B1(_13797_),
- .B2(_13818_),
- .X(_05402_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17158_ (.A(_13858_),
- .X(_05099_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17159_ (.A1(\ptc2_i.rptc_ctrl[0] ),
- .A2(_13817_),
- .B1(_13798_),
- .B2(_13818_),
- .X(_05401_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _17160_ (.A(_13381_),
- .B(_13795_),
- .X(_13859_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17161_ (.A(_13859_),
- .Y(_13860_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17162_ (.A(_13860_),
- .X(_13861_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17163_ (.A(net1116),
- .X(_13862_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17164_ (.A(_13623_),
- .X(_13863_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17165_ (.A1(_13829_),
- .A2(_13861_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[15] ),
- .B2(_13862_),
- .C1(_13863_),
- .X(_05400_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17166_ (.A1(net922),
- .A2(_13861_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[14] ),
- .B2(_13862_),
- .C1(_13863_),
- .X(_05399_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17167_ (.A1(_13831_),
- .A2(_13861_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[13] ),
- .B2(_13862_),
- .C1(_13863_),
- .X(_05398_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17168_ (.A1(_13833_),
- .A2(_13861_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[12] ),
- .B2(_13862_),
- .C1(_13863_),
- .X(_05397_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17169_ (.A1(_13834_),
- .A2(_13861_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[11] ),
- .B2(_13862_),
- .C1(_13863_),
- .X(_05396_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17170_ (.A1(_13792_),
- .A2(_13861_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[10] ),
- .B2(_13862_),
- .C1(_13863_),
- .X(_05395_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17171_ (.A(_13623_),
- .X(_13864_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17172_ (.A1(_13797_),
- .A2(_13860_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[9] ),
- .B2(net1116),
- .C1(_13864_),
- .X(_05394_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17173_ (.A1(_13798_),
- .A2(_13860_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[8] ),
- .B2(_13859_),
- .C1(_13864_),
- .X(_05393_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _17174_ (.A(net943),
- .B(net941),
- .C(net938),
- .D(_13794_),
- .X(_13865_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17175_ (.A(_13865_),
- .Y(_13866_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17176_ (.A(_13866_),
- .X(_13867_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17177_ (.A(_13865_),
- .X(_13868_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17178_ (.A1(_13829_),
- .A2(_13867_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[7] ),
- .B2(_13868_),
- .C1(_13864_),
- .X(_05392_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17179_ (.A1(net922),
- .A2(_13867_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[6] ),
- .B2(_13868_),
- .C1(_13864_),
- .X(_05391_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17180_ (.A1(_13831_),
- .A2(_13867_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[5] ),
- .B2(_13868_),
- .C1(_13864_),
- .X(_05390_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17181_ (.A1(_13833_),
- .A2(_13867_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[4] ),
- .B2(_13868_),
- .C1(_13864_),
- .X(_05389_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17182_ (.A(net1342),
- .X(_13869_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17183_ (.A1(_13834_),
- .A2(_13867_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[3] ),
- .B2(_13868_),
- .C1(_13869_),
- .X(_05388_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17184_ (.A1(net792),
- .A2(_13867_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[2] ),
- .B2(_13868_),
- .C1(_13869_),
- .X(_05387_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17185_ (.A1(net804),
- .A2(_13866_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[1] ),
- .B2(_13865_),
- .C1(_13869_),
- .X(_05386_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a221o_1 _17186_ (.A1(net796),
- .A2(_13866_),
- .B1(\i2c_i.byte_controller.bit_controller.clk_cnt[0] ),
- .B2(_13865_),
- .C1(_13869_),
- .X(_05385_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17187_ (.A(\ptc2_i.rptc_hrc[0] ),
- .Y(_13870_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17188_ (.A(\ptc2_i.rptc_hrc[26] ),
- .Y(_13871_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17189_ (.A1(\ptc2_i.rptc_hrc[23] ),
- .A2(_02686_),
- .B1(\ptc2_i.rptc_hrc[25] ),
- .B2(_02698_),
- .X(_13872_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17190_ (.A1(_13870_),
- .A2(_13405_),
- .B1(_13871_),
- .B2(\ptc2_i.rptc_cntr[26] ),
- .C1(_13872_),
- .X(_13873_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17191_ (.A(\ptc2_i.rptc_hrc[9] ),
- .Y(_13874_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17192_ (.A1(\ptc2_i.rptc_hrc[1] ),
- .A2(_13410_),
- .B1(\ptc2_i.rptc_hrc[30] ),
- .B2(_02728_),
- .X(_13875_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17193_ (.A1(\ptc2_i.rptc_hrc[19] ),
- .A2(_02662_),
- .B1(_13874_),
- .B2(\ptc2_i.rptc_cntr[9] ),
- .C1(_13875_),
- .X(_13876_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17194_ (.A(\ptc2_i.rptc_hrc[13] ),
- .Y(_13877_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17195_ (.A1(\ptc2_i.rptc_hrc[8] ),
- .A2(_02595_),
- .B1(_13877_),
- .B2(\ptc2_i.rptc_cntr[13] ),
- .X(_13878_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17196_ (.A1(\ptc2_i.rptc_hrc[26] ),
- .A2(_02704_),
- .B1(\ptc2_i.rptc_hrc[10] ),
- .B2(_02607_),
- .C1(_13878_),
- .X(_13879_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17197_ (.A(\ptc2_i.rptc_hrc[19] ),
- .Y(_13880_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17198_ (.A(\ptc2_i.rptc_hrc[17] ),
- .Y(_13881_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17199_ (.A(\ptc2_i.rptc_hrc[30] ),
- .Y(_13882_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17200_ (.A1(_13881_),
- .A2(\ptc2_i.rptc_cntr[17] ),
- .B1(_13882_),
- .B2(\ptc2_i.rptc_cntr[30] ),
- .X(_13883_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17201_ (.A1(\ptc2_i.rptc_hrc[22] ),
- .A2(_02680_),
- .B1(_13880_),
- .B2(\ptc2_i.rptc_cntr[19] ),
- .C1(_13883_),
- .X(_13884_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _17202_ (.A(_13873_),
- .B(_13876_),
- .C(_13879_),
- .D(_13884_),
- .X(_13885_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17203_ (.A(\ptc2_i.rptc_hrc[16] ),
- .Y(_13886_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17204_ (.A(\ptc2_i.rptc_hrc[6] ),
- .Y(_13887_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17205_ (.A(\ptc2_i.rptc_hrc[5] ),
- .Y(_13888_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17206_ (.A1(_13887_),
- .A2(\ptc2_i.rptc_cntr[6] ),
- .B1(_13888_),
- .B2(\ptc2_i.rptc_cntr[5] ),
- .X(_13889_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17207_ (.A1(\ptc2_i.rptc_hrc[5] ),
- .A2(_13422_),
- .B1(_13886_),
- .B2(\ptc2_i.rptc_cntr[16] ),
- .C1(_13889_),
- .X(_13890_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17208_ (.A(\ptc2_i.rptc_hrc[24] ),
- .Y(_13891_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17209_ (.A(\ptc2_i.rptc_hrc[3] ),
- .Y(_13892_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17210_ (.A1(_13891_),
- .A2(\ptc2_i.rptc_cntr[24] ),
- .B1(_13892_),
- .B2(\ptc2_i.rptc_cntr[3] ),
- .X(_13893_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17211_ (.A1(\ptc2_i.rptc_hrc[9] ),
- .A2(_02601_),
- .B1(\ptc2_i.rptc_hrc[0] ),
- .B2(_13428_),
- .C1(_13893_),
- .X(_13894_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17212_ (.A(\ptc2_i.rptc_hrc[25] ),
- .Y(_13895_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17213_ (.A(\ptc2_i.rptc_hrc[7] ),
- .Y(_13896_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17214_ (.A(\ptc2_i.rptc_hrc[8] ),
- .Y(_13897_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17215_ (.A1(_13896_),
- .A2(\ptc2_i.rptc_cntr[7] ),
- .B1(_13897_),
- .B2(\ptc2_i.rptc_cntr[8] ),
- .X(_13898_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17216_ (.A1(_13895_),
- .A2(\ptc2_i.rptc_cntr[25] ),
- .B1(\ptc2_i.rptc_hrc[3] ),
- .B2(_13434_),
- .C1(_13898_),
- .X(_13899_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17217_ (.A(\ptc2_i.rptc_hrc[21] ),
- .Y(_13900_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17218_ (.A1(\ptc2_i.rptc_hrc[11] ),
- .A2(_02613_),
- .B1(\ptc2_i.rptc_hrc[6] ),
- .B2(_13440_),
- .X(_13901_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17219_ (.A1(\ptc2_i.rptc_hrc[16] ),
- .A2(_02643_),
- .B1(_13900_),
- .B2(\ptc2_i.rptc_cntr[21] ),
- .C1(_13901_),
- .X(_13902_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _17220_ (.A(_13890_),
- .B(_13894_),
- .C(_13899_),
- .D(_13902_),
- .X(_13903_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17221_ (.A(\ptc2_i.rptc_hrc[22] ),
- .Y(_13904_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17222_ (.A1(\ptc2_i.rptc_hrc[18] ),
- .A2(_02656_),
- .B1(_13904_),
- .B2(\ptc2_i.rptc_cntr[22] ),
- .X(_13905_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17223_ (.A(\ptc2_i.rptc_hrc[23] ),
- .Y(_13906_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17224_ (.A(\ptc2_i.rptc_hrc[1] ),
- .Y(_13907_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17225_ (.A(\ptc2_i.rptc_hrc[4] ),
- .Y(_13908_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17226_ (.A1(_13907_),
- .A2(\ptc2_i.rptc_cntr[1] ),
- .B1(_13908_),
- .B2(\ptc2_i.rptc_cntr[4] ),
- .X(_13909_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17227_ (.A1(_13906_),
- .A2(\ptc2_i.rptc_cntr[23] ),
- .B1(\ptc2_i.rptc_hrc[28] ),
- .B2(_02716_),
- .C1(_13909_),
- .X(_13910_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17228_ (.A(\ptc2_i.rptc_hrc[28] ),
- .Y(_13911_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17229_ (.A(\ptc2_i.rptc_hrc[29] ),
- .Y(_13912_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17230_ (.A(\ptc2_i.rptc_hrc[18] ),
- .Y(_13913_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17231_ (.A1(_13912_),
- .A2(\ptc2_i.rptc_cntr[29] ),
- .B1(_13913_),
- .B2(\ptc2_i.rptc_cntr[18] ),
- .X(_13914_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17232_ (.A1(\ptc2_i.rptc_hrc[31] ),
- .A2(_02734_),
- .B1(_13911_),
- .B2(\ptc2_i.rptc_cntr[28] ),
- .C1(_13914_),
- .X(_13915_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _17233_ (.A1(\ptc2_i.rptc_hrc[4] ),
- .A2(_13444_),
- .B1(_13905_),
- .C1(_13910_),
- .D1(_13915_),
- .X(_13916_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17234_ (.A(\ptc2_i.rptc_hrc[11] ),
- .Y(_13917_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17235_ (.A1(\ptc2_i.rptc_hrc[12] ),
- .A2(_02619_),
- .B1(\ptc2_i.rptc_hrc[20] ),
- .B2(_02668_),
- .X(_13918_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17236_ (.A1(_13917_),
- .A2(\ptc2_i.rptc_cntr[11] ),
- .B1(\ptc2_i.rptc_hrc[29] ),
- .B2(_02722_),
- .C1(_13918_),
- .X(_13919_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17237_ (.A(\ptc2_i.rptc_hrc[12] ),
- .Y(_13920_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17238_ (.A1(\ptc2_i.rptc_hrc[7] ),
- .A2(_13462_),
- .B1(\ptc2_i.rptc_hrc[21] ),
- .B2(_02674_),
- .X(_13921_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17239_ (.A1(_13920_),
- .A2(\ptc2_i.rptc_cntr[12] ),
- .B1(\ptc2_i.rptc_hrc[27] ),
- .B2(_02710_),
- .C1(_13921_),
- .X(_13922_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17240_ (.A(\ptc2_i.rptc_hrc[15] ),
- .Y(_13923_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17241_ (.A(\ptc2_i.rptc_hrc[20] ),
- .Y(_13924_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17242_ (.A(\ptc2_i.rptc_hrc[27] ),
- .Y(_13925_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17243_ (.A1(\ptc2_i.rptc_hrc[15] ),
- .A2(_02637_),
- .B1(_13925_),
- .B2(\ptc2_i.rptc_cntr[27] ),
- .X(_13926_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17244_ (.A1(_13923_),
- .A2(\ptc2_i.rptc_cntr[15] ),
- .B1(_13924_),
- .B2(\ptc2_i.rptc_cntr[20] ),
- .C1(_13926_),
- .X(_13927_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17245_ (.A(\ptc2_i.rptc_hrc[14] ),
- .Y(_13928_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17246_ (.A(\ptc2_i.rptc_hrc[2] ),
- .Y(_13929_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17247_ (.A1(_13928_),
- .A2(\ptc2_i.rptc_cntr[14] ),
- .B1(_13929_),
- .B2(\ptc2_i.rptc_cntr[2] ),
- .X(_13930_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17248_ (.A1(\ptc2_i.rptc_hrc[13] ),
- .A2(_02625_),
- .B1(\ptc2_i.rptc_hrc[24] ),
- .B2(_02692_),
- .C1(_13930_),
- .X(_13931_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17249_ (.A(\ptc2_i.rptc_hrc[10] ),
- .Y(_13932_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17250_ (.A(\ptc2_i.rptc_hrc[31] ),
- .Y(_13933_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17251_ (.A1(_13933_),
- .A2(\ptc2_i.rptc_cntr[31] ),
- .B1(\ptc2_i.rptc_hrc[2] ),
- .B2(_13476_),
- .X(_13934_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17252_ (.A1(\ptc2_i.rptc_hrc[17] ),
- .A2(_02649_),
- .B1(_13932_),
- .B2(\ptc2_i.rptc_cntr[10] ),
- .C1(_13934_),
- .X(_13935_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _17253_ (.A(_13922_),
- .B(_13927_),
- .C(_13931_),
- .D(_13935_),
- .X(_13936_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _17254_ (.A1(\ptc2_i.rptc_hrc[14] ),
- .A2(_02631_),
- .B1(\ptc2_i.rptc_ctrl[0] ),
- .C1(_13919_),
- .D1(_13936_),
- .X(_13937_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_2 _17255_ (.A(_13885_),
- .B(_13903_),
- .C(_13916_),
- .D(_13937_),
- .X(_13938_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17256_ (.A(_13389_),
- .X(_13939_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o211a_1 _17257_ (.A1(net420),
- .A2(_13938_),
- .B1(_13939_),
- .C1(_13482_),
- .X(_05384_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17258_ (.A(_13858_),
- .X(_05098_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17259_ (.A(_13508_),
- .X(_00263_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17260_ (.A(_13507_),
- .X(_13940_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17261_ (.A1(\ptc1_i.rptc_ctrl[8] ),
- .A2(_13940_),
- .B1(net1294),
- .B2(_00263_),
- .X(_05383_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17262_ (.A(_13858_),
- .X(_05097_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17263_ (.A1(\ptc1_i.rptc_ctrl[7] ),
- .A2(_13940_),
- .B1(_13829_),
- .B2(_00263_),
- .X(_05382_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17264_ (.A(_13858_),
- .X(_05096_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21a_1 _17265_ (.A1(_13831_),
- .A2(_13940_),
- .B1(_13509_),
- .X(_05381_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17266_ (.A(net782),
- .X(_13941_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17267_ (.A(_13941_),
- .X(_05095_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17268_ (.A1(\ptc1_i.rptc_ctrl[4] ),
- .A2(_13940_),
- .B1(_13833_),
- .B2(_00263_),
- .X(_05380_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17269_ (.A(_13941_),
- .X(_05094_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17270_ (.A1(\ptc1_i.rptc_ctrl[3] ),
- .A2(_13940_),
- .B1(_13834_),
- .B2(_00263_),
- .X(_05379_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17271_ (.A(_13941_),
- .X(_05093_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17272_ (.A1(\ptc1_i.rptc_ctrl[2] ),
- .A2(_13940_),
- .B1(_13792_),
- .B2(_00263_),
- .X(_05378_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17273_ (.A(_13941_),
- .X(_05092_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17274_ (.A1(\ptc1_i.rptc_ctrl[1] ),
- .A2(_13507_),
- .B1(_13797_),
- .B2(_13508_),
- .X(_05377_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_1 _17275_ (.A(_13941_),
- .X(_05091_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17276_ (.A1(\ptc1_i.rptc_ctrl[0] ),
- .A2(_13507_),
- .B1(_13798_),
- .B2(_13508_),
- .X(_05376_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17277_ (.A(\ptc1_i.rptc_hrc[0] ),
- .Y(_13942_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17278_ (.A(\ptc1_i.rptc_hrc[26] ),
- .Y(_13943_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17279_ (.A1(\ptc1_i.rptc_hrc[23] ),
- .A2(_13650_),
- .B1(\ptc1_i.rptc_hrc[25] ),
- .B2(_13651_),
- .X(_13944_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17280_ (.A1(_13942_),
- .A2(_13648_),
- .B1(_13943_),
- .B2(\ptc1_i.rptc_cntr[26] ),
- .C1(_13944_),
- .X(_13945_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17281_ (.A(\ptc1_i.rptc_hrc[9] ),
- .Y(_13946_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17282_ (.A1(\ptc1_i.rptc_hrc[19] ),
- .A2(_13656_),
- .B1(_13946_),
- .B2(\ptc1_i.rptc_cntr[9] ),
- .X(_13947_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17283_ (.A1(\ptc1_i.rptc_hrc[1] ),
- .A2(_13654_),
- .B1(\ptc1_i.rptc_hrc[30] ),
- .B2(_13655_),
- .C1(_13947_),
- .X(_13948_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17284_ (.A(\ptc1_i.rptc_hrc[13] ),
- .Y(_13949_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17285_ (.A1(\ptc1_i.rptc_hrc[8] ),
- .A2(_13662_),
- .B1(_13949_),
- .B2(\ptc1_i.rptc_cntr[13] ),
- .X(_13950_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17286_ (.A1(\ptc1_i.rptc_hrc[26] ),
- .A2(_13660_),
- .B1(\ptc1_i.rptc_hrc[10] ),
- .B2(_13661_),
- .C1(_13950_),
- .X(_13951_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17287_ (.A(\ptc1_i.rptc_hrc[19] ),
- .Y(_13952_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17288_ (.A(\ptc1_i.rptc_hrc[17] ),
- .Y(_13953_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17289_ (.A(\ptc1_i.rptc_hrc[30] ),
- .Y(_13954_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17290_ (.A1(_13953_),
- .A2(\ptc1_i.rptc_cntr[17] ),
- .B1(_13954_),
- .B2(\ptc1_i.rptc_cntr[30] ),
- .X(_13955_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17291_ (.A1(\ptc1_i.rptc_hrc[22] ),
- .A2(_13666_),
- .B1(_13952_),
- .B2(\ptc1_i.rptc_cntr[19] ),
- .C1(_13955_),
- .X(_13956_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _17292_ (.A(_13945_),
- .B(_13948_),
- .C(_13951_),
- .D(_13956_),
- .X(_13957_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17293_ (.A(\ptc1_i.rptc_hrc[6] ),
- .Y(_13958_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17294_ (.A(\ptc1_i.rptc_hrc[5] ),
- .Y(_13959_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17295_ (.A(\ptc1_i.rptc_hrc[16] ),
- .Y(_13960_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17296_ (.A1(\ptc1_i.rptc_hrc[5] ),
- .A2(_13675_),
- .B1(_13960_),
- .B2(\ptc1_i.rptc_cntr[16] ),
- .X(_13961_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17297_ (.A1(_13958_),
- .A2(\ptc1_i.rptc_cntr[6] ),
- .B1(_13959_),
- .B2(\ptc1_i.rptc_cntr[5] ),
- .C1(_13961_),
- .X(_13962_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17298_ (.A(\ptc1_i.rptc_hrc[24] ),
- .Y(_13963_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17299_ (.A(\ptc1_i.rptc_hrc[3] ),
- .Y(_13964_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17300_ (.A1(_13963_),
- .A2(\ptc1_i.rptc_cntr[24] ),
- .B1(_13964_),
- .B2(\ptc1_i.rptc_cntr[3] ),
- .X(_13965_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17301_ (.A1(\ptc1_i.rptc_hrc[9] ),
- .A2(_13679_),
- .B1(\ptc1_i.rptc_hrc[0] ),
- .B2(_13680_),
- .C1(_13965_),
- .X(_13966_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17302_ (.A(\ptc1_i.rptc_hrc[25] ),
- .Y(_13967_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17303_ (.A(\ptc1_i.rptc_hrc[7] ),
- .Y(_13968_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17304_ (.A(\ptc1_i.rptc_hrc[8] ),
- .Y(_13969_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17305_ (.A1(_13968_),
- .A2(\ptc1_i.rptc_cntr[7] ),
- .B1(_13969_),
- .B2(\ptc1_i.rptc_cntr[8] ),
- .X(_13970_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17306_ (.A1(_13967_),
- .A2(\ptc1_i.rptc_cntr[25] ),
- .B1(\ptc1_i.rptc_hrc[3] ),
- .B2(_13686_),
- .C1(_13970_),
- .X(_13971_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17307_ (.A(\ptc1_i.rptc_hrc[21] ),
- .Y(_13972_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17308_ (.A1(\ptc1_i.rptc_hrc[11] ),
- .A2(_13693_),
- .B1(\ptc1_i.rptc_hrc[6] ),
- .B2(_13694_),
- .X(_13973_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17309_ (.A1(\ptc1_i.rptc_hrc[16] ),
- .A2(_13691_),
- .B1(_13972_),
- .B2(\ptc1_i.rptc_cntr[21] ),
- .C1(_13973_),
- .X(_13974_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _17310_ (.A(_13962_),
- .B(_13966_),
- .C(_13971_),
- .D(_13974_),
- .X(_13975_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17311_ (.A(\ptc1_i.rptc_hrc[22] ),
- .Y(_13976_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17312_ (.A1(\ptc1_i.rptc_hrc[18] ),
- .A2(_13699_),
- .B1(_13976_),
- .B2(\ptc1_i.rptc_cntr[22] ),
- .X(_13977_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17313_ (.A(\ptc1_i.rptc_hrc[1] ),
- .Y(_13978_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17314_ (.A(\ptc1_i.rptc_hrc[4] ),
- .Y(_13979_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17315_ (.A(\ptc1_i.rptc_hrc[23] ),
- .Y(_13980_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17316_ (.A1(_13980_),
- .A2(\ptc1_i.rptc_cntr[23] ),
- .B1(\ptc1_i.rptc_hrc[28] ),
- .B2(_13705_),
- .X(_13981_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17317_ (.A1(_13978_),
- .A2(\ptc1_i.rptc_cntr[1] ),
- .B1(_13979_),
- .B2(\ptc1_i.rptc_cntr[4] ),
- .C1(_13981_),
- .X(_13982_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17318_ (.A(\ptc1_i.rptc_hrc[28] ),
- .Y(_13983_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17319_ (.A(\ptc1_i.rptc_hrc[29] ),
- .Y(_13984_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17320_ (.A(\ptc1_i.rptc_hrc[18] ),
- .Y(_13985_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17321_ (.A1(_13984_),
- .A2(\ptc1_i.rptc_cntr[29] ),
- .B1(_13985_),
- .B2(\ptc1_i.rptc_cntr[18] ),
- .X(_13986_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17322_ (.A1(\ptc1_i.rptc_hrc[31] ),
- .A2(_13708_),
- .B1(_13983_),
- .B2(\ptc1_i.rptc_cntr[28] ),
- .C1(_13986_),
- .X(_13987_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _17323_ (.A1(\ptc1_i.rptc_hrc[4] ),
- .A2(_13698_),
- .B1(_13977_),
- .C1(_13982_),
- .D1(_13987_),
- .X(_13988_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17324_ (.A(\ptc1_i.rptc_hrc[11] ),
- .Y(_13989_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17325_ (.A1(\ptc1_i.rptc_hrc[12] ),
- .A2(_13718_),
- .B1(\ptc1_i.rptc_hrc[20] ),
- .B2(_13719_),
- .X(_13990_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17326_ (.A1(_13989_),
- .A2(\ptc1_i.rptc_cntr[11] ),
- .B1(\ptc1_i.rptc_hrc[29] ),
- .B2(_13717_),
- .C1(_13990_),
- .X(_13991_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17327_ (.A(\ptc1_i.rptc_hrc[12] ),
- .Y(_13992_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17328_ (.A1(\ptc1_i.rptc_hrc[7] ),
- .A2(_13724_),
- .B1(\ptc1_i.rptc_hrc[21] ),
- .B2(_13725_),
- .X(_13993_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17329_ (.A1(_13992_),
- .A2(\ptc1_i.rptc_cntr[12] ),
- .B1(\ptc1_i.rptc_hrc[27] ),
- .B2(_13723_),
- .C1(_13993_),
- .X(_13994_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17330_ (.A(\ptc1_i.rptc_hrc[15] ),
- .Y(_13995_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17331_ (.A(\ptc1_i.rptc_hrc[20] ),
- .Y(_13996_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17332_ (.A(\ptc1_i.rptc_hrc[27] ),
- .Y(_13997_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17333_ (.A1(\ptc1_i.rptc_hrc[15] ),
- .A2(_13730_),
- .B1(_13997_),
- .B2(\ptc1_i.rptc_cntr[27] ),
- .X(_13998_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17334_ (.A1(_13995_),
- .A2(\ptc1_i.rptc_cntr[15] ),
- .B1(_13996_),
- .B2(\ptc1_i.rptc_cntr[20] ),
- .C1(_13998_),
- .X(_13999_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17335_ (.A(\ptc1_i.rptc_hrc[14] ),
- .Y(_14000_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17336_ (.A(\ptc1_i.rptc_hrc[2] ),
- .Y(_14001_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17337_ (.A1(_14000_),
- .A2(\ptc1_i.rptc_cntr[14] ),
- .B1(_14001_),
- .B2(\ptc1_i.rptc_cntr[2] ),
- .X(_14002_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17338_ (.A1(\ptc1_i.rptc_hrc[13] ),
- .A2(_13734_),
- .B1(\ptc1_i.rptc_hrc[24] ),
- .B2(_13735_),
- .C1(_14002_),
- .X(_14003_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17339_ (.A(\ptc1_i.rptc_hrc[10] ),
- .Y(_14004_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17340_ (.A(\ptc1_i.rptc_hrc[31] ),
- .Y(_14005_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17341_ (.A1(_14005_),
- .A2(\ptc1_i.rptc_cntr[31] ),
- .B1(\ptc1_i.rptc_hrc[2] ),
- .B2(_13743_),
- .X(_14006_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o221a_1 _17342_ (.A1(\ptc1_i.rptc_hrc[17] ),
- .A2(_13740_),
- .B1(_14004_),
- .B2(\ptc1_i.rptc_cntr[10] ),
- .C1(_14006_),
- .X(_14007_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_1 _17343_ (.A(_13994_),
- .B(_13999_),
- .C(_14003_),
- .D(_14007_),
- .X(_14008_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o2111a_1 _17344_ (.A1(\ptc1_i.rptc_hrc[14] ),
- .A2(_13715_),
- .B1(\ptc1_i.rptc_ctrl[0] ),
- .C1(_13991_),
- .D1(_14008_),
- .X(_14009_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and4_2 _17345_ (.A(_13957_),
- .B(_13975_),
- .C(_13988_),
- .D(_14009_),
- .X(_14010_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o211a_1 _17346_ (.A1(net419),
- .A2(_14010_),
- .B1(_13939_),
- .C1(_13749_),
- .X(_05375_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17347_ (.A(\fpu_i.fpu_op_r2[0] ),
- .Y(_14011_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17348_ (.A(\fpu_i.fpu_op_r2[2] ),
- .Y(_14012_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or3_4 _17349_ (.A(\fpu_i.fpu_op_r2[1] ),
- .B(_14011_),
- .C(_14012_),
- .X(_14013_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17350_ (.A(_14013_),
- .Y(_14014_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17351_ (.A(_14014_),
- .X(_02180_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__and2_1 _17352_ (.A(\fpu_i.opa_r1[0] ),
- .B(_14014_),
- .X(_05374_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o211a_1 _17353_ (.A1(_13533_),
- .A2(_13614_),
- .B1(_13510_),
- .C1(_13568_),
- .X(_05373_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_4 _17354_ (.A(\fpu_i.fractb_mul[4] ),
- .Y(_14015_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17355_ (.A(_14015_),
- .X(_14016_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17356_ (.A(_14016_),
- .X(_14017_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17357_ (.A(_14017_),
- .X(_14018_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17358_ (.A(_14018_),
- .X(_14019_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17359_ (.A(_14019_),
- .X(_14020_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17360_ (.A(_14020_),
- .X(_14021_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17361_ (.A(_14021_),
- .X(_14022_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17362_ (.A(_14022_),
- .X(_14023_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17363_ (.A(_14023_),
- .X(_14024_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17364_ (.A(_14024_),
- .X(_14025_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17365_ (.A(_14025_),
- .X(_14026_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17366_ (.A(_14026_),
- .X(_14027_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17367_ (.A(_14027_),
- .X(_14028_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17368_ (.A(_14028_),
- .X(_14029_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17369_ (.A(_14029_),
- .X(_14030_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17370_ (.A(\fpu_i.fracta_mul[4] ),
- .Y(_14031_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17371_ (.A(_14031_),
- .X(_14032_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17372_ (.A(_14032_),
- .X(_14033_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17373_ (.A(_14033_),
- .X(_14034_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17374_ (.A(_14034_),
- .X(_14035_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17375_ (.A(_14035_),
- .X(_02963_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17376_ (.A(\fpu_i.fractb_mul[4] ),
- .X(_14036_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17377_ (.A(_14036_),
- .X(_14037_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17378_ (.A(_14037_),
- .X(_14038_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17379_ (.A(_14038_),
- .X(_14039_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17380_ (.A(_14039_),
- .X(_14040_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17381_ (.A(_14040_),
- .X(_14041_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17382_ (.A(_14041_),
- .X(_14042_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17383_ (.A(_14042_),
- .X(_14043_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17384_ (.A(_14043_),
- .X(_14044_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17385_ (.A(_14044_),
- .X(_14045_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17386_ (.A(_14045_),
- .X(_14046_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17387_ (.A(_14046_),
- .X(_14047_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17388_ (.A(_14047_),
- .X(_14048_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17389_ (.A(_14048_),
- .X(_14049_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17390_ (.A(_14049_),
- .X(_14050_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17391_ (.A(_14050_),
- .X(_14051_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17392_ (.A(_14051_),
- .X(_14052_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17393_ (.A(_14052_),
- .X(_14053_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17394_ (.A(_14053_),
- .X(_14054_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17395_ (.A(_14054_),
- .X(_14055_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17396_ (.A(_14055_),
- .X(_14056_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17397_ (.A(_14056_),
- .X(_14057_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17398_ (.A(\fpu_i.fracta_mul[4] ),
- .X(_14058_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17399_ (.A(_14058_),
- .X(_14059_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17400_ (.A(_14059_),
- .X(_14060_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17401_ (.A1(_14030_),
- .A2(net653),
- .B1(_14057_),
- .B2(_14060_),
- .X(_14061_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_1 _17402_ (.A(\fpu_i.fractb_mul[21] ),
- .Y(_14062_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17403_ (.A(_14062_),
- .X(_14063_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17404_ (.A(_14063_),
- .X(_14064_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17405_ (.A(_14064_),
- .X(_14065_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17406_ (.A(_14065_),
- .X(_14066_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17407_ (.A(_14066_),
- .X(_14067_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17408_ (.A(_14067_),
- .X(_14068_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17409_ (.A(_14068_),
- .X(_14069_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17410_ (.A(_14069_),
- .X(_14070_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17411_ (.A(_14070_),
- .X(_14071_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17412_ (.A(_14071_),
- .X(_14072_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17413_ (.A(_14072_),
- .X(_14073_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17414_ (.A(_14073_),
- .X(_14074_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17415_ (.A(_14074_),
- .X(_14075_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17416_ (.A(\fpu_i.fracta_mul[21] ),
- .Y(_14076_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17417_ (.A(_14076_),
- .X(_14077_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17418_ (.A(_14077_),
- .X(_14078_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17419_ (.A(_14078_),
- .X(_14079_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17420_ (.A(_14079_),
- .X(_14080_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17421_ (.A(_14080_),
- .X(_02925_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17422_ (.A(\fpu_i.fractb_mul[21] ),
- .X(_14081_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17423_ (.A(_14081_),
- .X(_14082_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17424_ (.A(_14082_),
- .X(_14083_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17425_ (.A(_14083_),
- .X(_14084_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17426_ (.A(_14084_),
- .X(_14085_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17427_ (.A(_14085_),
- .X(_14086_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17428_ (.A(_14086_),
- .X(_14087_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17429_ (.A(_14087_),
- .X(_14088_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17430_ (.A(_14088_),
- .X(_14089_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17431_ (.A(_14089_),
- .X(_14090_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17432_ (.A(_14090_),
- .X(_14091_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17433_ (.A(_14091_),
- .X(_14092_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17434_ (.A(_14092_),
- .X(_14093_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17435_ (.A(_14093_),
- .X(_14094_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17436_ (.A(_14094_),
- .X(_14095_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17437_ (.A(\fpu_i.fracta_mul[21] ),
- .X(_14096_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17438_ (.A(_14096_),
- .X(_14097_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17439_ (.A(_14097_),
- .X(_14098_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17440_ (.A1(_14075_),
- .A2(net652),
- .B1(_14095_),
- .B2(_14098_),
- .X(_14099_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17441_ (.A(\fpu_i.opb_r[28] ),
- .Y(_01486_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17442_ (.A(\fpu_i.opa_r[28] ),
- .X(_14100_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17443_ (.A(_14100_),
- .Y(_01489_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_2 _17444_ (.A(\fpu_i.opb_r[28] ),
- .B(_01489_),
- .X(_14101_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21ai_4 _17445_ (.A1(_01486_),
- .A2(_14100_),
- .B1(_14101_),
- .Y(_14102_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_6 _17446_ (.A(\fpu_i.fractb_mul[2] ),
- .Y(_14103_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17447_ (.A(_14103_),
- .X(_14104_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17448_ (.A(_14104_),
- .X(_14105_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17449_ (.A(_14105_),
- .X(_14106_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17450_ (.A(_14106_),
- .X(_14107_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17451_ (.A(_14107_),
- .X(_14108_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17452_ (.A(_14108_),
- .X(_14109_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17453_ (.A(_14109_),
- .X(_14110_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17454_ (.A(_14110_),
- .X(_14111_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17455_ (.A(\fpu_i.fracta_mul[2] ),
- .Y(_14112_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17456_ (.A(_14112_),
- .X(_14113_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17457_ (.A(_14113_),
- .X(_14114_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17458_ (.A(_14114_),
- .X(_14115_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17459_ (.A(_14115_),
- .X(_14116_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17460_ (.A(_14116_),
- .X(_02967_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17461_ (.A(\fpu_i.fractb_mul[2] ),
- .X(_14117_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17462_ (.A(_14117_),
- .X(_14118_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17463_ (.A(_14118_),
- .X(_14119_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17464_ (.A(_14119_),
- .X(_14120_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17465_ (.A(_14120_),
- .X(_14121_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17466_ (.A(_14121_),
- .X(_14122_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17467_ (.A(_14122_),
- .X(_14123_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17468_ (.A(_14123_),
- .X(_14124_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17469_ (.A(_14124_),
- .X(_14125_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17470_ (.A(_14125_),
- .X(_14126_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17471_ (.A(_14126_),
- .X(_14127_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17472_ (.A(_14127_),
- .X(_14128_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17473_ (.A(_14128_),
- .X(_14129_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17474_ (.A(_14129_),
- .X(_14130_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17475_ (.A(_14130_),
- .X(_14131_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17476_ (.A(_14131_),
- .X(_14132_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17477_ (.A(_14132_),
- .X(_14133_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17478_ (.A(_14133_),
- .X(_14134_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17479_ (.A(_14134_),
- .X(_14135_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17480_ (.A(_14135_),
- .X(_14136_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17481_ (.A(_14136_),
- .X(_14137_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17482_ (.A(_14137_),
- .X(_14138_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17483_ (.A(_14138_),
- .X(_14139_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17484_ (.A(_14139_),
- .X(_14140_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17485_ (.A(_14140_),
- .X(_14141_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17486_ (.A(_14141_),
- .X(_14142_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17487_ (.A(\fpu_i.fracta_mul[2] ),
- .X(_14143_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17488_ (.A(_14143_),
- .X(_14144_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17489_ (.A(_14144_),
- .X(_14145_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17490_ (.A1(_14111_),
- .A2(net651),
- .B1(_14142_),
- .B2(_14145_),
- .X(_14146_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _17491_ (.A(_14061_),
- .B(_14099_),
- .C(_14102_),
- .D(_14146_),
- .X(_14147_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_4 _17492_ (.A(\fpu_i.fractb_mul[7] ),
- .Y(_14148_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17493_ (.A(_14148_),
- .X(_14149_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17494_ (.A(_14149_),
- .X(_14150_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17495_ (.A(_14150_),
- .X(_14151_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17496_ (.A(_14151_),
- .X(_14152_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17497_ (.A(_14152_),
- .X(_14153_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17498_ (.A(_14153_),
- .X(_14154_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17499_ (.A(_14154_),
- .X(_14155_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17500_ (.A(_14155_),
- .X(_14156_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17501_ (.A(_14156_),
- .X(_14157_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17502_ (.A(_14157_),
- .X(_14158_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17503_ (.A(_14158_),
- .X(_14159_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17504_ (.A(_14159_),
- .X(_14160_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17505_ (.A(_14160_),
- .X(_14161_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17506_ (.A(_14161_),
- .X(_14162_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17507_ (.A(\fpu_i.fracta_mul[7] ),
- .Y(_14163_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17508_ (.A(_14163_),
- .X(_14164_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17509_ (.A(_14164_),
- .X(_14165_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17510_ (.A(_14165_),
- .X(_14166_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17511_ (.A(_14166_),
- .X(_14167_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_8 _17512_ (.A(_14167_),
- .X(_02959_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17513_ (.A(\fpu_i.fractb_mul[7] ),
- .X(_14168_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17514_ (.A(_14168_),
- .X(_14169_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17515_ (.A(_14169_),
- .X(_14170_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17516_ (.A(_14170_),
- .X(_14171_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17517_ (.A(_14171_),
- .X(_14172_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17518_ (.A(_14172_),
- .X(_14173_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17519_ (.A(_14173_),
- .X(_14174_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17520_ (.A(_14174_),
- .X(_14175_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17521_ (.A(_14175_),
- .X(_14176_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17522_ (.A(_14176_),
- .X(_14177_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17523_ (.A(_14177_),
- .X(_14178_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17524_ (.A(_14178_),
- .X(_14179_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17525_ (.A(_14179_),
- .X(_14180_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17526_ (.A(_14180_),
- .X(_14181_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17527_ (.A(_14181_),
- .X(_14182_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17528_ (.A(_14182_),
- .X(_14183_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17529_ (.A(_14183_),
- .X(_14184_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17530_ (.A(_14184_),
- .X(_14185_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17531_ (.A(_14185_),
- .X(_14186_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17532_ (.A(_14186_),
- .X(_14187_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17533_ (.A(_14187_),
- .X(_14188_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17534_ (.A(\fpu_i.fracta_mul[7] ),
- .X(_14189_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17535_ (.A(_14189_),
- .X(_14190_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17536_ (.A(_14190_),
- .X(_14191_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17537_ (.A(_14191_),
- .X(_14192_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17538_ (.A1(_14162_),
- .A2(_02959_),
- .B1(_14188_),
- .B2(_14192_),
- .X(_14193_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_4 _17539_ (.A(\fpu_i.fractb_mul[1] ),
- .Y(_14194_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17540_ (.A(_14194_),
- .X(_14195_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17541_ (.A(_14195_),
- .X(_14196_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17542_ (.A(_14196_),
- .X(_14197_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17543_ (.A(_14197_),
- .X(_14198_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17544_ (.A(_14198_),
- .X(_14199_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17545_ (.A(_14199_),
- .X(_14200_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17546_ (.A(_14200_),
- .X(_14201_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17547_ (.A(_14201_),
- .X(_14202_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17548_ (.A(_14202_),
- .X(_14203_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17549_ (.A(_14203_),
- .X(_14204_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17550_ (.A(_14204_),
- .X(_14205_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17551_ (.A(\fpu_i.fracta_mul[1] ),
- .Y(_14206_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17552_ (.A(_14206_),
- .X(_14207_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17553_ (.A(_14207_),
- .X(_14208_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17554_ (.A(_14208_),
- .X(_14209_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17555_ (.A(_14209_),
- .X(_14210_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17556_ (.A(_14210_),
- .X(_14211_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17557_ (.A(_14211_),
- .X(_02969_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17558_ (.A(\fpu_i.fractb_mul[1] ),
- .X(_14212_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17559_ (.A(_14212_),
- .X(_14213_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17560_ (.A(_14213_),
- .X(_14214_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17561_ (.A(_14214_),
- .X(_14215_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17562_ (.A(_14215_),
- .X(_14216_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17563_ (.A(_14216_),
- .X(_14217_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17564_ (.A(_14217_),
- .X(_14218_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17565_ (.A(_14218_),
- .X(_14219_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17566_ (.A(_14219_),
- .X(_14220_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17567_ (.A(_14220_),
- .X(_14221_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17568_ (.A(_14221_),
- .X(_14222_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17569_ (.A(_14222_),
- .X(_14223_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17570_ (.A(_14223_),
- .X(_14224_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17571_ (.A(_14224_),
- .X(_14225_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17572_ (.A(_14225_),
- .X(_14226_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17573_ (.A(_14226_),
- .X(_14227_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17574_ (.A(\fpu_i.fracta_mul[1] ),
- .X(_14228_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17575_ (.A(_14228_),
- .X(_14229_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17576_ (.A(_14229_),
- .X(_14230_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17577_ (.A1(_14205_),
- .A2(net645),
- .B1(_14227_),
- .B2(_14230_),
- .X(_14231_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17578_ (.A(\fpu_i.fractb_mul[19] ),
- .Y(_14232_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17579_ (.A(_14232_),
- .X(_14233_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17580_ (.A(_14233_),
- .X(_14234_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17581_ (.A(_14234_),
- .X(_14235_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17582_ (.A(_14235_),
- .X(_14236_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17583_ (.A(_14236_),
- .X(_14237_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17584_ (.A(_14237_),
- .X(_14238_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17585_ (.A(_14238_),
- .X(_14239_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17586_ (.A(_14239_),
- .X(_14240_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17587_ (.A(_14240_),
- .X(_14241_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17588_ (.A(_14241_),
- .X(_14242_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17589_ (.A(_14242_),
- .X(_14243_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17590_ (.A(_14243_),
- .X(_14244_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_8 _17591_ (.A(_14244_),
- .X(_14245_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17592_ (.A(\fpu_i.fracta_mul[19] ),
- .Y(_14246_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17593_ (.A(_14246_),
- .X(_14247_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17594_ (.A(_14247_),
- .X(_14248_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17595_ (.A(_14248_),
- .X(_14249_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_8 _17596_ (.A(_14249_),
- .X(_02931_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17597_ (.A(\fpu_i.fractb_mul[19] ),
- .X(_14250_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17598_ (.A(_14250_),
- .X(_14251_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17599_ (.A(_14251_),
- .X(_14252_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17600_ (.A(_14252_),
- .X(_14253_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17601_ (.A(_14253_),
- .X(_14254_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17602_ (.A(_14254_),
- .X(_14255_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17603_ (.A(_14255_),
- .X(_14256_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17604_ (.A(_14256_),
- .X(_14257_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17605_ (.A(_14257_),
- .X(_14258_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17606_ (.A(_14258_),
- .X(_14259_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17607_ (.A(_14259_),
- .X(_14260_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17608_ (.A(_14260_),
- .X(_14261_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17609_ (.A(_14261_),
- .X(_14262_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17610_ (.A(_14262_),
- .X(_14263_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17611_ (.A(_14263_),
- .X(_14264_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17612_ (.A(\fpu_i.fracta_mul[19] ),
- .X(_14265_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17613_ (.A(_14265_),
- .X(_14266_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17614_ (.A(_14266_),
- .X(_14267_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17615_ (.A(_14267_),
- .X(_14268_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17616_ (.A1(_14245_),
- .A2(_02931_),
- .B1(_14264_),
- .B2(_14268_),
- .X(_14269_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkinvlp_2 _17617_ (.A(\fpu_i.fractb_mul[15] ),
- .Y(_14270_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17618_ (.A(_14270_),
- .X(_14271_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17619_ (.A(_14271_),
- .X(_14272_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17620_ (.A(_14272_),
- .X(_14273_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17621_ (.A(_14273_),
- .X(_14274_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17622_ (.A(_14274_),
- .X(_14275_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17623_ (.A(_14275_),
- .X(_14276_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17624_ (.A(_14276_),
- .X(_14277_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17625_ (.A(_14277_),
- .X(_14278_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17626_ (.A(_14278_),
- .X(_14279_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17627_ (.A(_14279_),
- .X(_14280_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17628_ (.A(_14280_),
- .X(_14281_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17629_ (.A(_14281_),
- .X(_14282_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17630_ (.A(_14282_),
- .X(_14283_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17631_ (.A(_14283_),
- .X(_14284_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17632_ (.A(_14284_),
- .X(_14285_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17633_ (.A(\fpu_i.fracta_mul[15] ),
- .Y(_14286_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17634_ (.A(_14286_),
- .X(_14287_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17635_ (.A(_14287_),
- .X(_14288_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17636_ (.A(_14288_),
- .X(_14289_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17637_ (.A(_14289_),
- .X(_14290_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_8 _17638_ (.A(_14290_),
- .X(_02941_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17639_ (.A(\fpu_i.fractb_mul[15] ),
- .X(_14291_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17640_ (.A(_14291_),
- .X(_14292_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17641_ (.A(_14292_),
- .X(_14293_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17642_ (.A(_14293_),
- .X(_14294_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17643_ (.A(_14294_),
- .X(_14295_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17644_ (.A(_14295_),
- .X(_14296_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17645_ (.A(_14296_),
- .X(_14297_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17646_ (.A(_14297_),
- .X(_14298_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17647_ (.A(_14298_),
- .X(_14299_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17648_ (.A(_14299_),
- .X(_14300_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17649_ (.A(_14300_),
- .X(_14301_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17650_ (.A(_14301_),
- .X(_14302_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17651_ (.A(_14302_),
- .X(_14303_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17652_ (.A(_14303_),
- .X(_14304_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17653_ (.A(_14304_),
- .X(_14305_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17654_ (.A(_14305_),
- .X(_14306_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17655_ (.A(\fpu_i.fracta_mul[15] ),
- .X(_14307_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17656_ (.A(_14307_),
- .X(_14308_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17657_ (.A(_14308_),
- .X(_14309_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17658_ (.A(_14309_),
- .X(_14310_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17659_ (.A1(_14285_),
- .A2(_02941_),
- .B1(_14306_),
- .B2(_14310_),
- .X(_14311_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _17660_ (.A(_14193_),
- .B(_14231_),
- .C(_14269_),
- .D(_14311_),
- .X(_14312_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17661_ (.A(\fpu_i.fractb_mul[9] ),
- .X(_14313_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17662_ (.A(_14313_),
- .Y(_14314_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17663_ (.A(_14314_),
- .X(_14315_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17664_ (.A(_14315_),
- .X(_14316_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17665_ (.A(_14316_),
- .X(_14317_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17666_ (.A(_14317_),
- .X(_14318_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17667_ (.A(_14318_),
- .X(_14319_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17668_ (.A(_14319_),
- .X(_14320_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17669_ (.A(_14320_),
- .X(_14321_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17670_ (.A(_14321_),
- .X(_14322_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17671_ (.A(_14322_),
- .X(_14323_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17672_ (.A(_14323_),
- .X(_14324_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17673_ (.A(_14324_),
- .X(_14325_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17674_ (.A(_14325_),
- .X(_14326_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17675_ (.A(_14326_),
- .X(_14327_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17676_ (.A(_14327_),
- .X(_14328_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17677_ (.A(_14328_),
- .X(_14329_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17678_ (.A(\fpu_i.fracta_mul[9] ),
- .Y(_14330_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17679_ (.A(_14330_),
- .X(_14331_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17680_ (.A(_14331_),
- .X(_14332_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17681_ (.A(_14332_),
- .X(_14333_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17682_ (.A(_14333_),
- .X(_02951_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17683_ (.A(_14313_),
- .X(_14334_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17684_ (.A(_14334_),
- .X(_14335_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17685_ (.A(_14335_),
- .X(_14336_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17686_ (.A(_14336_),
- .X(_14337_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17687_ (.A(_14337_),
- .X(_14338_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17688_ (.A(_14338_),
- .X(_14339_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17689_ (.A(_14339_),
- .X(_14340_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17690_ (.A(_14340_),
- .X(_14341_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17691_ (.A(_14341_),
- .X(_14342_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17692_ (.A(_14342_),
- .X(_14343_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17693_ (.A(_14343_),
- .X(_14344_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17694_ (.A(_14344_),
- .X(_14345_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17695_ (.A(_14345_),
- .X(_14346_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17696_ (.A(_14346_),
- .X(_14347_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17697_ (.A(_14347_),
- .X(_14348_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17698_ (.A(_14348_),
- .X(_14349_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17699_ (.A(_14349_),
- .X(_14350_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17700_ (.A(_14350_),
- .X(_14351_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17701_ (.A(\fpu_i.fracta_mul[9] ),
- .X(_14352_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17702_ (.A(_14352_),
- .X(_14353_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17703_ (.A(_14353_),
- .X(_14354_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17704_ (.A(_14354_),
- .X(_14355_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o22a_1 _17705_ (.A1(_14329_),
- .A2(_02951_),
- .B1(_14351_),
- .B2(_14355_),
- .X(_14356_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2b_4 _17706_ (.A(_02843_),
- .B_N(_02842_),
- .Y(\fpu_i.u1.add_d ),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17707_ (.A(\fpu_i.opa_r[29] ),
- .X(_14357_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17708_ (.A(_14357_),
- .Y(_01485_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17709_ (.A(\fpu_i.opb_r[29] ),
- .Y(_01482_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a22o_1 _17710_ (.A1(\fpu_i.opb_r[29] ),
- .A2(_01485_),
- .B1(_01482_),
- .B2(_14357_),
- .X(_14358_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17711_ (.A(\fpu_i.opb_r[30] ),
- .X(_14359_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17712_ (.A(\fpu_i.opa_r[30] ),
- .Y(_14360_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_1 _17713_ (.A(_14359_),
- .B(_14360_),
- .Y(_01551_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a21oi_1 _17714_ (.A1(_14359_),
- .A2(_14360_),
- .B1(_01551_),
- .Y(_14361_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2b_4 _17715_ (.A(_14358_),
- .B_N(_14361_),
- .X(_14362_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkinvlp_2 _17716_ (.A(\fpu_i.fractb_mul[3] ),
- .Y(_14363_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17717_ (.A(_14363_),
- .X(_14364_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17718_ (.A(_14364_),
- .X(_14365_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17719_ (.A(_14365_),
- .X(_14366_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17720_ (.A(_14366_),
- .X(_14367_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17721_ (.A(_14367_),
- .X(_14368_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17722_ (.A(_14368_),
- .X(_14369_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17723_ (.A(_14369_),
- .X(_14370_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17724_ (.A(_14370_),
- .X(_14371_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17725_ (.A(_14371_),
- .X(_14372_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17726_ (.A(_14372_),
- .X(_14373_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17727_ (.A(_14373_),
- .X(_14374_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17728_ (.A(_14374_),
- .X(_14375_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17729_ (.A(_14375_),
- .X(_14376_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17730_ (.A(_14376_),
- .X(_14377_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17731_ (.A(_14377_),
- .X(_14378_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17732_ (.A(\fpu_i.fracta_mul[3] ),
- .Y(_14379_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17733_ (.A(_14379_),
- .X(_14380_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17734_ (.A(_14380_),
- .X(_14381_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17735_ (.A(_14381_),
- .X(_14382_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17736_ (.A(_14382_),
- .X(_14383_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17737_ (.A(_14383_),
- .X(_02966_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_8 _17738_ (.A(_14371_),
- .B(_14381_),
- .Y(_14384_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a21oi_1 _17739_ (.A1(_14378_),
- .A2(net650),
- .B1(_14384_),
- .Y(_14385_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17740_ (.A(\fpu_i.fractb_mul[5] ),
- .X(_14386_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17741_ (.A(_14386_),
- .X(_14387_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17742_ (.A(_14387_),
- .X(_14388_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17743_ (.A(_14388_),
- .X(_14389_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17744_ (.A(_14389_),
- .X(_14390_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17745_ (.A(_14390_),
- .X(_14391_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17746_ (.A(_14391_),
- .X(_14392_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17747_ (.A(_14392_),
- .X(_14393_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17748_ (.A(_14393_),
- .X(_14394_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17749_ (.A(_14394_),
- .X(_14395_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17750_ (.A(_14395_),
- .X(_14396_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17751_ (.A(_14396_),
- .X(_14397_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17752_ (.A(_14397_),
- .X(_14398_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17753_ (.A(_14398_),
- .X(_14399_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17754_ (.A(_14399_),
- .X(_14400_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17755_ (.A(_14400_),
- .X(_14401_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17756_ (.A(_14401_),
- .X(_14402_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17757_ (.A(\fpu_i.fracta_mul[5] ),
- .X(_14403_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17758_ (.A(_14403_),
- .X(_14404_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17759_ (.A(_14404_),
- .X(_14405_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_1 _17760_ (.A(\fpu_i.fractb_mul[5] ),
- .Y(_14406_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17761_ (.A(_14406_),
- .X(_14407_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17762_ (.A(_14407_),
- .X(_14408_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17763_ (.A(_14408_),
- .X(_14409_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17764_ (.A(_14409_),
- .X(_14410_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17765_ (.A(_14410_),
- .X(_14411_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17766_ (.A(_14411_),
- .X(_14412_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17767_ (.A(_14412_),
- .X(_14413_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17768_ (.A(\fpu_i.fracta_mul[5] ),
- .Y(_14414_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17769_ (.A(_14414_),
- .X(_14415_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_4 _17770_ (.A(_14413_),
- .B(_14415_),
- .X(_14416_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21a_1 _17771_ (.A1(_14402_),
- .A2(_14405_),
- .B1(_14416_),
- .X(_14417_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_6 _17772_ (.A(\fpu_i.fractb_mul[20] ),
- .Y(_14418_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17773_ (.A(_14418_),
- .X(_14419_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17774_ (.A(_14419_),
- .X(_14420_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17775_ (.A(_14420_),
- .X(_14421_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17776_ (.A(_14421_),
- .X(_14422_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17777_ (.A(_14422_),
- .X(_14423_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17778_ (.A(_14423_),
- .X(_14424_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17779_ (.A(_14424_),
- .X(_14425_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17780_ (.A(_14425_),
- .X(_14426_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17781_ (.A(_14426_),
- .X(_14427_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17782_ (.A(_14427_),
- .X(_14428_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17783_ (.A(_14428_),
- .X(_14429_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17784_ (.A(_14429_),
- .X(_14430_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17785_ (.A(_14430_),
- .X(_14431_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17786_ (.A(_14431_),
- .X(_14432_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17787_ (.A(\fpu_i.fracta_mul[20] ),
- .Y(_14433_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17788_ (.A(_14433_),
- .X(_14434_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17789_ (.A(_14434_),
- .X(_14435_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17790_ (.A(_14435_),
- .X(_14436_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17791_ (.A(_14436_),
- .X(_14437_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_8 _17792_ (.A(_14437_),
- .X(_02926_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__nor2_4 _17793_ (.A(_14431_),
- .B(_14437_),
- .Y(_14438_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__a21oi_1 _17794_ (.A1(_14432_),
- .A2(_02926_),
- .B1(_14438_),
- .Y(_14439_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17795_ (.A(\fpu_i.fractb_mul[8] ),
- .X(_14440_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17796_ (.A(_14440_),
- .X(_14441_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17797_ (.A(_14441_),
- .X(_14442_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17798_ (.A(_14442_),
- .X(_14443_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17799_ (.A(_14443_),
- .X(_14444_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17800_ (.A(_14444_),
- .X(_14445_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17801_ (.A(_14445_),
- .X(_14446_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17802_ (.A(_14446_),
- .X(_14447_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17803_ (.A(_14447_),
- .X(_14448_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17804_ (.A(_14448_),
- .X(_14449_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17805_ (.A(_14449_),
- .X(_14450_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17806_ (.A(_14450_),
- .X(_14451_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_1 _17807_ (.A(_14451_),
- .X(_14452_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17808_ (.A(_14452_),
- .X(_14453_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_4 _17809_ (.A(_14453_),
- .X(_14454_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17810_ (.A(\fpu_i.fracta_mul[8] ),
- .X(_14455_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17811_ (.A(_14455_),
- .X(_14456_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17812_ (.A(_14456_),
- .X(_14457_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_6 _17813_ (.A(\fpu_i.fractb_mul[8] ),
- .Y(_14458_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17814_ (.A(_14458_),
- .X(_14459_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17815_ (.A(_14459_),
- .X(_14460_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17816_ (.A(_14460_),
- .X(_14461_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17817_ (.A(_14461_),
- .X(_14462_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17818_ (.A(_14462_),
- .X(_14463_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17819_ (.A(_14463_),
- .X(_14464_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17820_ (.A(_14464_),
- .X(_14465_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17821_ (.A(_14465_),
- .X(_14466_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17822_ (.A(_14466_),
- .X(_14467_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17823_ (.A(_14467_),
- .X(_14468_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17824_ (.A(\fpu_i.fracta_mul[8] ),
- .Y(_14469_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17825_ (.A(_14469_),
- .X(_14470_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or2_4 _17826_ (.A(_14468_),
- .B(_14470_),
- .X(_14471_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__o21a_1 _17827_ (.A1(_14454_),
- .A2(_14457_),
- .B1(_14471_),
- .X(_14472_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _17828_ (.A(_14385_),
- .B(_14417_),
- .C(_14439_),
- .D(_14472_),
- .X(_14473_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__or4_4 _17829_ (.A(_14356_),
- .B(\fpu_i.u1.add_d ),
- .C(_14362_),
- .D(_14473_),
- .X(_14474_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_1 _17830_ (.A(\fpu_i.fractb_mul[13] ),
- .Y(_14475_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17831_ (.A(_14475_),
- .X(_14476_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17832_ (.A(_14476_),
- .X(_14477_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17833_ (.A(_14477_),
- .X(_14478_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17834_ (.A(_14478_),
- .X(_14479_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17835_ (.A(_14479_),
- .X(_14480_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17836_ (.A(_14480_),
- .X(_14481_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17837_ (.A(_14481_),
- .X(_14482_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17838_ (.A(_14482_),
- .X(_14483_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17839_ (.A(_14483_),
- .X(_14484_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17840_ (.A(_14484_),
- .X(_14485_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17841_ (.A(_14485_),
- .X(_14486_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17842_ (.A(_14486_),
- .X(_14487_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17843_ (.A(_14487_),
- .X(_14488_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17844_ (.A(_14488_),
- .X(_14489_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17845_ (.A(_14489_),
- .X(_14490_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__inv_2 _17846_ (.A(\fpu_i.fracta_mul[13] ),
- .Y(_14491_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17847_ (.A(_14491_),
- .X(_14492_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17848_ (.A(_14492_),
- .X(_14493_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17849_ (.A(_14493_),
- .X(_14494_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_8 _17850_ (.A(_14494_),
- .X(_02944_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17851_ (.A(\fpu_i.fractb_mul[13] ),
- .X(_14495_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17852_ (.A(_14495_),
- .X(_14496_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17853_ (.A(_14496_),
- .X(_14497_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17854_ (.A(_14497_),
- .X(_14498_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17855_ (.A(_14498_),
- .X(_14499_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17856_ (.A(_14499_),
- .X(_14500_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17857_ (.A(_14500_),
- .X(_14501_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_4 _17858_ (.A(_14501_),
- .X(_14502_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17859_ (.A(_14502_),
- .X(_14503_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17860_ (.A(_14503_),
- .X(_14504_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17861_ (.A(_14504_),
- .X(_14505_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17862_ (.A(_14505_),
- .X(_14506_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_6 _17863_ (.A(_14506_),
- .X(_14507_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17864_ (.A(_14507_),
- .X(_14508_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17865_ (.A(_14508_),
- .X(_14509_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17866_ (.A(_14509_),
- .X(_14510_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17867_ (.A(\fpu_i.fracta_mul[13] ),
- .X(_14511_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__buf_2 _17868_ (.A(_14511_),
- .X(_14512_),
- .VGND(vssd1),
- .VNB(vssd1),
- .VPB(vccd1),
- .VPWR(vccd1));
- sky130_fd_sc_hd__clkbuf_2 _17869_ (.A(_14512_),
