update
diff --git a/checks/erase_box_user_analog_project_wrapper.gds.log b/checks/erase_box_user_analog_project_wrapper.gds.log
new file mode 100644
index 0000000..bcced0a
--- /dev/null
+++ b/checks/erase_box_user_analog_project_wrapper.gds.log
@@ -0,0 +1,85 @@
+/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/gds//user_analog_project_wrapper.gds /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_erased.gds user_analog_project_wrapper
+
+Magic 8.3 revision 182 - Compiled on Sat Jul 24 11:39:08 UTC 2021.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Using technology "minimum", version 0.0
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+Error: No style is set
+The CIF input styles are: .
+Don't know how to read GDS-II:
+Nothing in "cifinput" section of tech file.
+File user_analog_project_wrapper.mag couldn't be read
+No such file or directory
+Creating new cell
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 43.00 x 3520.00 (-43.00, 0.00 ), ( 0.00, 3520.00) 151360.00
+lambda: 43 x 3520 ( -43, 0 ), ( 0, 3520 ) 151360
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 43.00 x 3520.00 ( 2920.00, 0.00 ), ( 2963.00, 3520.00) 151360.00
+lambda: 43 x 3520 ( 2920, 0 ), ( 2963, 3520 ) 151360
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3006.00 x 38.00 (-43.00, -38.00), ( 2963.00, 0.00 ) 114228.00
+lambda: 3006 x 38 ( -43, -38 ), ( 2963, 0 ) 114228
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3006.00 x 37.00 (-43.00, 3520.00), ( 2963.00, 3557.00) 111222.00
+lambda: 3006 x 37 ( -43, 3520 ), ( 2963, 3557 ) 111222
+can't read "errorCode": no such variable
+Unrecognized layer: metal5
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+Unrecognized layer: metal4
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+Unrecognized layer: metal5
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+Unrecognized layer: metal4
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+No CIF/GDS output style set!
+I/O error in writing file /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_erased.gds.
+File may be incompletely written.
+/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_erased.gds
diff --git a/checks/erase_box_user_analog_project_wrapper_empty.gds.log b/checks/erase_box_user_analog_project_wrapper_empty.gds.log
new file mode 100644
index 0000000..48f4af1
--- /dev/null
+++ b/checks/erase_box_user_analog_project_wrapper_empty.gds.log
@@ -0,0 +1,85 @@
+/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty.gds /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty_erased.gds user_analog_project_wrapper
+
+Magic 8.3 revision 182 - Compiled on Sat Jul 24 11:39:08 UTC 2021.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Using technology "minimum", version 0.0
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+Error: No style is set
+The CIF input styles are: .
+Don't know how to read GDS-II:
+Nothing in "cifinput" section of tech file.
+File user_analog_project_wrapper.mag couldn't be read
+No such file or directory
+Creating new cell
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 43.00 x 3520.00 (-43.00, 0.00 ), ( 0.00, 3520.00) 151360.00
+lambda: 43 x 3520 ( -43, 0 ), ( 0, 3520 ) 151360
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 43.00 x 3520.00 ( 2920.00, 0.00 ), ( 2963.00, 3520.00) 151360.00
+lambda: 43 x 3520 ( 2920, 0 ), ( 2963, 3520 ) 151360
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3006.00 x 38.00 (-43.00, -38.00), ( 2963.00, 0.00 ) 114228.00
+lambda: 3006 x 38 ( -43, -38 ), ( 2963, 0 ) 114228
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3006.00 x 37.00 (-43.00, 3520.00), ( 2963.00, 3557.00) 111222.00
+lambda: 3006 x 37 ( -43, 3520 ), ( 2963, 3557 ) 111222
+can't read "errorCode": no such variable
+Unrecognized layer: metal5
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+Unrecognized layer: metal4
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+Unrecognized layer: metal5
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+Unrecognized layer: metal4
+Layer names are:
+ mag or magnet
+ f or fence
+ r or rotate
+ $
+ *
+ errors
+ labels
+ subcell
+ connect
+No CIF/GDS output style set!
+I/O error in writing file /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty_erased.gds.
+File may be incompletely written.
+/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty_erased.gds
diff --git a/checks/full_log.log b/checks/full_log.log
new file mode 100644
index 0000000..1d29f01
--- /dev/null
+++ b/checks/full_log.log
@@ -0,0 +1,37 @@
+FULL RUN LOG:
+ Executing Step 0 of 8: Extracting GDS Files
+Step 0 done without fatal errors.
+ Executing Step 1 of 8: Project License Check
+{{LICENSE COMPLIANCE PASSED}} Apache-2.0 LICENSE file was found in project root
+ SPDX COMPLIANCE Found 2 non-compliant files with the SPDX Standard. Check full log for more information
+SPDX COMPLIANCE: NON-COMPLIANT FILES PREVIEW: ['/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/README.md', '/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/mag/.magicrc']
+ Executing Step 2 of 8: YAML File Check
+ YAML file valid!
+Step 2 done without fatal errors.
+ Detected Project Type is "analog"
+ Executing Step 3 of 8: Project Compliance Checks
+b'Going into /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/caravel'
+b'Removing manifest'
+b'Fetching manifest'
+b'Running sha1sum checks'
+ Manifest Checks Passed. Caravel Version Matches.
+ Makefile Checks Passed.
+ Documentation Checks Passed.
+ Executing Step 4 of 8: XOR Consistency Checks
+ Running XOR Checks...
+ XOR Checks on GDS Failed, Reason: Either you didn't mount the docker, or you ran out of RAM. Otherwise, magic is broken and it segfaulted. Please check: /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/magic_xor.log
+TEST FAILED AT STEP 4
+ Executing Step 5 of 8: DRC Violations Checks
+ Running Magic DRC Checks...
+ DRC Checks on User Project GDS Passed!
+Step 5 done without fatal errors.
+ Executing Step 6 of 8: KLayout DRC Violations Check
+ Running Klayout DRC Checks...
+ Klayout DRC Checks on GDS Failed, Reason: Total # of DRC violations is 9 Please check /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_klayout_drc.xmlFor more details
+TEST FAILED AT STEP 6
+ Executing Klayout offgrid check.
+ Klayout offgrid Checks on User Project GDS Passed!
+Step 7 done without fatal errors.
+ Klayout metal minimum clear area density Checks on User Project GDS Passed!
+Step 7 done without fatal errors.
+ SOME Checks FAILED !!!
diff --git a/checks/klayout_drc.log b/checks/klayout_drc.log
new file mode 100644
index 0000000..38420d0
--- /dev/null
+++ b/checks/klayout_drc.log
@@ -0,0 +1,359 @@
+"_input" in: sky130A_mr.lydrc:88
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:89
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:90
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:91
+Elapsed: 0.000s
+"_input" in: sky130A_mr.lydrc:92
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:93
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:94
+Elapsed: 0.000s
+"_input" in: sky130A_mr.lydrc:95
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:96
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:97
+Elapsed: 0.000s
+"_input" in: sky130A_mr.lydrc:98
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:99
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:100
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:101
+Elapsed: 0.000s
+"_input" in: sky130A_mr.lydrc:102
+Elapsed: 0.010s
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+"_input" in: sky130A_mr.lydrc:104
+Elapsed: 0.000s
+"_input" in: sky130A_mr.lydrc:105
+Elapsed: 0.010s
+"_input" in: sky130A_mr.lydrc:106
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+"_input" in: sky130A_mr.lydrc:107
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+"_input" in: sky130A_mr.lydrc:108
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+Elapsed: 0.010s
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+Elapsed: 0.010s
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+"_output" in: sky130A_mr.lydrc:793
+Elapsed: 0.010s
+Writing report database: /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_klayout_drc.xml ..
+Total run time: 1.370s
diff --git a/checks/klayout_drc_total.txt b/checks/klayout_drc_total.txt
new file mode 100644
index 0000000..f11c82a
--- /dev/null
+++ b/checks/klayout_drc_total.txt
@@ -0,0 +1 @@
+9
\ No newline at end of file
diff --git a/checks/magic_drc.log b/checks/magic_drc.log
new file mode 100644
index 0000000..488bbba
--- /dev/null
+++ b/checks/magic_drc.log
@@ -0,0 +1,30 @@
+
+Magic 8.3 revision 182 - Compiled on Sat Jul 24 11:39:08 UTC 2021.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Could not find file '/home/lss/skywater/open_pdks/sky130/sky130A//sky130A/libs.tech/magic/sky130A.tech' in any of these directories:
+ . /build/lib/magic/sys /build/lib/magic/sys/current
+Error parsing ".magicrc": couldn't read file "/home/lss/skywater/open_pdks/sky130/sky130A//sky130A/libs.tech/magic/sky130A.tcl": no such file or directory
+Bad local startup file ".magicrc", continuing without.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/usr/local/bin/drc_checks/magic_drc_check.tcl" from command line.
+Don't know how to read GDS-II:
+Nothing in "cifinput" section of tech file.
+[INFO]: Loading user_analog_project_wrapper
+
+File user_analog_project_wrapper.mag couldn't be read
+No such file or directory
+Creating new cell
+"drc(full)" is not one of the DRC styles Magic knows.
+The current style is "default".
+The DRC styles are: default.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper.magic.drc)
+[INFO]: Saving mag view with DRC errors(/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/checks/manifest_check.log b/checks/manifest_check.log
new file mode 100644
index 0000000..13005a7
--- /dev/null
+++ b/checks/manifest_check.log
@@ -0,0 +1,47 @@
+verilog/rtl/DFFRAM.v: OK
+verilog/rtl/DFFRAMBB.v: OK
+verilog/rtl/__uprj_analog_netlists.v: OK
+verilog/rtl/__uprj_netlists.v: OK
+verilog/rtl/__user_analog_project_wrapper.v: OK
+verilog/rtl/__user_project_wrapper.v: OK
+verilog/rtl/caravan.v: OK
+verilog/rtl/caravan_netlists.v: OK
+verilog/rtl/caravel.v: OK
+verilog/rtl/caravel_clocking.v: OK
+verilog/rtl/chip_io.v: OK
+verilog/rtl/chip_io_alt.v: OK
+verilog/rtl/clock_div.v: OK
+verilog/rtl/convert_gpio_sigs.v: OK
+verilog/rtl/counter_timer_high.v: OK
+verilog/rtl/counter_timer_low.v: OK
+verilog/rtl/digital_pll.v: OK
+verilog/rtl/digital_pll_controller.v: OK
+verilog/rtl/gpio_control_block.v: OK
+verilog/rtl/gpio_wb.v: OK
+verilog/rtl/housekeeping_spi.v: OK
+verilog/rtl/la_wb.v: OK
+verilog/rtl/mem_wb.v: OK
+verilog/rtl/mgmt_core.v: OK
+verilog/rtl/mgmt_protect.v: OK
+verilog/rtl/mgmt_protect_hv.v: OK
+verilog/rtl/mgmt_soc.v: OK
+verilog/rtl/mprj2_logic_high.v: OK
+verilog/rtl/mprj_ctrl.v: OK
+verilog/rtl/mprj_io.v: OK
+verilog/rtl/mprj_logic_high.v: OK
+verilog/rtl/pads.v: OK
+verilog/rtl/picorv32.v: OK
+verilog/rtl/ring_osc2x13.v: OK
+verilog/rtl/simple_por.v: OK
+verilog/rtl/simple_spi_master.v: OK
+verilog/rtl/simpleuart.v: OK
+verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v: OK
+verilog/rtl/spimemio.v: OK
+verilog/rtl/sram_1rw1r_32_256_8_sky130.v: OK
+verilog/rtl/storage.v: OK
+verilog/rtl/storage_bridge_wb.v: OK
+verilog/rtl/sysctrl.v: OK
+verilog/rtl/wb_intercon.v: OK
+scripts/set_user_id.py: OK
+scripts/generate_fill.py: OK
+scripts/compositor.py: OK
diff --git a/checks/met_min_ca_density_check.log b/checks/met_min_ca_density_check.log
new file mode 100644
index 0000000..a137a07
--- /dev/null
+++ b/checks/met_min_ca_density_check.log
@@ -0,0 +1,6 @@
+li1_ca_density is 0.9999715325391112
+m1_ca_density is 0.9999388794729724
+m2_ca_density is 0.9997191108149128
+m3_ca_density is 0.9890867026020587
+m4_ca_density is 0.9985556218477584
+m5_ca_density is 1.0
diff --git a/checks/met_min_ca_density_check.xml b/checks/met_min_ca_density_check.xml
new file mode 100644
index 0000000..f19e6c3
--- /dev/null
+++ b/checks/met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/usr/local/bin/klayout_drc_checks/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/checks/met_min_ca_density_total.txt b/checks/met_min_ca_density_total.txt
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/checks/met_min_ca_density_total.txt
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/checks/offgrid_check.log b/checks/offgrid_check.log
new file mode 100644
index 0000000..40a2c11
--- /dev/null
+++ b/checks/offgrid_check.log
@@ -0,0 +1 @@
+{{ OFFGRID-ANGLES section }}
diff --git a/checks/offgrid_check.xml b/checks/offgrid_check.xml
new file mode 100644
index 0000000..b4d3510
--- /dev/null
+++ b/checks/offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/usr/local/bin/klayout_drc_checks/offgrid.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>x.3a : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>x.3a : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_angle</name>
+ <description>x.3a : non 45 degree angle pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_angle</name>
+ <description>x.3a : non 45 degree angle pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_angle</name>
+ <description>x.3a : non 45 degree angle hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_angle</name>
+ <description>x.3a : non 45 degree angle hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_angle</name>
+ <description>x.3a : non 45 degree angle lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_angle</name>
+ <description>x.3a : non 45 degree angle ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2 : non 90 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2c : non 45 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2 : non 90 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2c : non 45 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_angle</name>
+ <description>x.3a : non 45 degree angle tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_angle</name>
+ <description>x.2 : non 90 degree angle poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_angle</name>
+ <description>x.3a : non 45 degree angle rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_angle</name>
+ <description>x.3a : non 45 degree angle npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_angle</name>
+ <description>x.3a : non 45 degree angle nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_angle</name>
+ <description>x.3a : non 45 degree angle psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_angle</name>
+ <description>x.2 : non 90 degree angle licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_angle</name>
+ <description>x.3a : non 45 degree angle li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_angle</name>
+ <description>x.2 : non 90 degree angle mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_angle</name>
+ <description>x.3a : non 45 degree angle vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_angle</name>
+ <description>x.3a : non 45 degree angle m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_angle</name>
+ <description>x.2 : non 90 degree angle via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_angle</name>
+ <description>x.3a : non 45 degree angle m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>x.2 : non 90 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_angle</name>
+ <description>x.3a : non 45 degree angle m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>x.2 : non 90 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_angle</name>
+ <description>x.3a : non 45 degree angle nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_angle</name>
+ <description>x.3a : non 45 degree angle m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>x.2 : non 90 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_angle</name>
+ <description>x.3a : non 45 degree angle m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>x.3a : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_angle</name>
+ <description>x.2 : non 90 degree angle mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_angle</name>
+ <description>x.3a : non 45 degree angle hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_angle</name>
+ <description>x.3a : non 45 degree angle hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_angle</name>
+ <description>x.3a : non 45 degree angle vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_angle</name>
+ <description>x.3a : non 45 degree angle uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_angle</name>
+ <description>x.3a : non 45 degree angle pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>areaid_re_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on areaid.re</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/checks/offgrid_total.txt b/checks/offgrid_total.txt
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/checks/offgrid_total.txt
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/checks/spdx_compliance_report.log b/checks/spdx_compliance_report.log
new file mode 100644
index 0000000..0755382
--- /dev/null
+++ b/checks/spdx_compliance_report.log
@@ -0,0 +1,4 @@
+FULL RUN LOG:
+SPDX NON-COMPLIANT FILES
+/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/README.md
+/home/lss/Documents/AnalogNeuron/Analog-Neural-Network/mag/.magicrc
diff --git a/checks/user_analog_project_wrapper.magic.drc b/checks/user_analog_project_wrapper.magic.drc
new file mode 100644
index 0000000..829b9d5
--- /dev/null
+++ b/checks/user_analog_project_wrapper.magic.drc
@@ -0,0 +1,5 @@
+user_analog_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/checks/user_analog_project_wrapper.magic.drc.mag b/checks/user_analog_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..bc7865b
--- /dev/null
+++ b/checks/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,7 @@
+magic
+tech minimum
+magscale 1 2
+timestamp 0
+<< checkpaint >>
+rect 0 0 1 1
+<< end >>
diff --git a/checks/user_analog_project_wrapper_empty.gds b/checks/user_analog_project_wrapper_empty.gds
new file mode 100644
index 0000000..6bb65fc
--- /dev/null
+++ b/checks/user_analog_project_wrapper_empty.gds
Binary files differ
diff --git a/checks/user_analog_project_wrapper_empty_erased.gds b/checks/user_analog_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/checks/user_analog_project_wrapper_empty_erased.gds
diff --git a/checks/user_analog_project_wrapper_erased.gds b/checks/user_analog_project_wrapper_erased.gds
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/checks/user_analog_project_wrapper_erased.gds
diff --git a/checks/user_analog_project_wrapper_klayout_drc.xml b/checks/user_analog_project_wrapper_klayout_drc.xml
new file mode 100644
index 0000000..5922ce5
--- /dev/null
+++ b/checks/user_analog_project_wrapper_klayout_drc.xml
@@ -0,0 +1,340 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/usr/local/bin/drc_checks/../tech-files/sky130A_mr.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell.2</name>
+ <description>dnwell.2 : min. dnwell width : 3.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.1</name>
+ <description>nwell.1 : min. nwell width : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.2a</name>
+ <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.1</name>
+ <description>hvtp.1 : min. hvtp width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.2</name>
+ <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.1</name>
+ <description>hvtr.1 : min. hvtr width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2</name>
+ <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.2</name>
+ <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.1</name>
+ <description>ncm.1 : min. ncm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.3</name>
+ <description>difftap.3 : min. difftap spacing : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.1</name>
+ <description>tunm.1 : min. tunm width : 0.41um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.2</name>
+ <description>tunm.2 : min. tunm spacing : 0.5um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.1a</name>
+ <description>poly.1a : min. poly width : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.2</name>
+ <description>poly.2 : min. poly spacing : 0.21um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.1a</name>
+ <description>rpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.2</name>
+ <description>rpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.1</name>
+ <description>npc.1 : min. npc width : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.2</name>
+ <description>npc.2 : min. npc spacing, should be mnually merge if less : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1</name>
+ <description>licon.1 : minimum/maximum width of licon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1b/c</name>
+ <description>licon.1b/c : minimum/maximum width/length of licon inside poly resistor : 2.0/0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13</name>
+ <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.1</name>
+ <description>capm.1 : min. capm width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2a</name>
+ <description>capm.2a : min. capm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b</name>
+ <description>capm.2b : min. capm spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3</name>
+ <description>capm.3 : min. m2 enclosure of capm : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.4</name>
+ <description>capm.4 : min. capm enclosure of via2 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.5</name>
+ <description>capm.5 : min. capm spacing to via2 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.1</name>
+ <description>hvi.1 : min. hvi width : 0.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.1</name>
+ <description>hvntm.1 : min. hvntm width : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.2</name>
+ <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ <cell>
+ <name>neuron_s</name>
+ <variant/>
+ <references>
+ <ref>
+ <parent>user_analog_project_wrapper</parent>
+ <trans>m0 *1 2486.45,3372.67</trans>
+ </ref>
+ </references>
+ </cell>
+ <cell>
+ <name>aninv_</name>
+ <variant/>
+ <references>
+ <ref>
+ <parent>user_analog_project_wrapper</parent>
+ <trans>r180 *1 2472.16,3382.575</trans>
+ </ref>
+ </references>
+ </cell>
+ <cell>
+ <name>analogneuron_invopamp_re_15kfeedbck</name>
+ <variant/>
+ <references>
+ <ref>
+ <parent>user_analog_project_wrapper</parent>
+ <trans>m0 *1 2493.22,3371.5</trans>
+ </ref>
+ </references>
+ </cell>
+ <cell>
+ <name>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</name>
+ <variant/>
+ <references>
+ <ref>
+ <parent>user_analog_project_wrapper</parent>
+ <trans>m45 *1 2489.02,3371.035</trans>
+ </ref>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ <item>
+ <tags/>
+ <category>'rpm.1a'</category>
+ <cell>aninv_</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge-pair: (6.423,0.9;7.96,0.9)/(8.717,-0.12;7.18,-0.12)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (-0.095,0.46;-0.095,2.46)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (-0.095,2.46;0.095,2.46)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (0.095,2.46;0.095,0.46)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (0.095,0.46;-0.095,0.46)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (-0.095,-2.46;-0.095,-0.46)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (-0.095,-0.46;0.095,-0.46)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (0.095,-0.46;0.095,-2.46)</value>
+ </values>
+ </item>
+ <item>
+ <tags/>
+ <category>'licon.1'</category>
+ <cell>sky130_fd_pr__res_xhigh_po_0p35_NZHUVC</cell>
+ <visited>false</visited>
+ <multiplicity>1</multiplicity>
+ <image/>
+ <values>
+ <value>edge: (0.095,-2.46;-0.095,-2.46)</value>
+ </values>
+ </item>
+ </items>
+</report-database>
diff --git a/checks/xor.log b/checks/xor.log
new file mode 100644
index 0000000..5080e39
--- /dev/null
+++ b/checks/xor.log
@@ -0,0 +1,11 @@
+First Layout: /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty_erased.gds
+Second Layout: /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_erased.gds
+Design Name: xor_target
+Output GDS will be: /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper.xor.gds
+Reading /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty_erased.gds ..
+ERROR: In /usr/local/bin/xor_checks/xor.drc: Stream has unknown format: /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty_erased.gds in Layout::read
+ERROR: Stream has unknown format: /home/lss/Documents/AnalogNeuron/Analog-Neural-Network/checks/user_analog_project_wrapper_empty_erased.gds in Layout::read in MacroInterpreter::execute
+ /usr/local/bin/xor_checks/xor.drc:15:in `execute_drc'
+ :/built-in-macros/drc_interpreters.lym:18:in `instance_eval'
+ :/built-in-macros/drc_interpreters.lym:18:in `execute_drc'
+ :/built-in-macros/drc_interpreters.lym:92:in `execute'
diff --git a/gds/.magicrc b/gds/.magicrc
new file mode 100644
index 0000000..67cdbf8
--- /dev/null
+++ b/gds/.magicrc
@@ -0,0 +1,96 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch. This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+ scalegrid 1 2
+}
+
+drc off
+drc euclidean on
+
+# Allow override of PDK path from environment variable PDKPATH
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+ set PDKPATH "$::env(PDK_ROOT)/sky130A"
+}
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/sky130A.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/sky130A-BindKeys
+
+# set units to lambda grid
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+ set MAGTYPE maglef
+}
+
+ path search [concat "../$MAGTYPE" [path search]]
+
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+ addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+ addpath ${PDKPATH}/libs.ref/mag/sky130_ml_xx_hd
+} else {
+ addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+ addpath ${PDKPATH}/libs.ref/sky130_ml_xx_hd/mag
+}
+
+addpath hexdigits
+
+# add path to GDS cells
+
+# add path to IP from catalog. This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space. Defined in the PDK script.
+catch {magic::query_my_projects}
diff --git a/gds/drc_on_gds.tcl b/gds/drc_on_gds.tcl
old mode 100644
new mode 100755
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz
index 109cf8a..c8d0b36 100644
--- a/gds/user_analog_project_wrapper.gds.gz
+++ b/gds/user_analog_project_wrapper.gds.gz
Binary files differ
diff --git a/info.yaml b/info.yaml
index 6dec21d..08cf7ca 100644
--- a/info.yaml
+++ b/info.yaml
@@ -1,4 +1,4 @@
- ---
+---
project:
description: "An analog implementation of the artificial neuron used in Machine Learning"
foundry: "SkyWater"
diff --git a/mag/.magicrc b/mag/.magicrc
index c91aa27..b4d2bee 100644
--- a/mag/.magicrc
+++ b/mag/.magicrc
@@ -20,7 +20,7 @@
# Allow override of PDK path from environment variable PDKPATH
if {[catch {set PDKPATH $env(PDKPATH)}]} {
- set PDKPATH "/mnt/c/Users/LENOVO/Documents/PLL/PDK_b_latest/open_pdks/sky130/sky130A"
+ set PDKPATH "/home/lss/skywater/open_pdks/sky130/sky130A"
}
# loading technology
diff --git a/mag/aninv_.mag b/mag/aninv_.mag
index 22cb1fb..81a6519 100644
--- a/mag/aninv_.mag
+++ b/mag/aninv_.mag
@@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
-timestamp 1628080314
+timestamp 1628141510
<< poly >>
rect 1196 371 1226 429
rect 1143 367 1226 371
@@ -41,20 +41,19 @@
rect 506 340 1548 386
rect 324 140 334 208
rect 766 140 776 208
-rect 1425 153 1548 340
-rect 1425 152 1705 153
+rect 1425 173 1548 340
rect 334 20 762 140
-rect 1425 90 1798 152
-rect 974 74 1798 90
-rect 974 14 1796 74
-rect 1396 8 1796 14
-rect 1486 6 1666 8
+rect 1425 103 1546 173
+rect 1648 152 1705 153
+rect 1648 103 1798 152
+rect 1425 101 1798 103
+rect 964 1 1798 101
rect 244 -294 296 -230
rect 448 -242 458 -190
rect 776 -242 786 -190
rect 944 -340 954 -280
rect 1272 -340 1282 -280
-rect 1486 -318 1574 6
+rect 1486 -318 1574 1
rect 448 -430 458 -378
rect 776 -430 786 -378
rect 1380 -398 1574 -318
diff --git a/mag/neuron_s.mag b/mag/neuron_s.mag
index bf174bb..a66004f 100644
--- a/mag/neuron_s.mag
+++ b/mag/neuron_s.mag
@@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
-timestamp 1628105024
+timestamp 1628141510
<< metal1 >>
rect -6183 4348 -4726 4674
rect -6176 1604 -4518 1896
@@ -10,6 +10,25 @@
rect 1142 1270 1162 1736
rect 442 1210 1162 1270
rect 11910 1040 12486 1410
+rect 0 1010 436 1020
+rect 0 942 438 1010
+rect 588 1004 1070 1034
+rect 588 952 600 1004
+rect 1008 952 1070 1004
+rect 0 936 436 942
+rect 588 934 1070 952
+rect 10 702 430 740
+rect -2 616 432 702
+rect 584 686 1020 698
+rect 584 630 596 686
+rect 1008 630 1020 686
+rect 584 618 1020 630
+rect 8 364 438 370
+rect 8 294 440 364
+rect 590 354 1030 362
+rect 590 300 596 354
+rect 1014 300 1030 354
+rect 590 288 1030 300
rect -6200 -1284 -4518 -992
<< via1 >>
rect 446 1270 1142 1736
@@ -57,15 +76,15 @@
transform 1 0 1354 0 1 234
box -1354 -234 10724 2910
use aninv_ aninv__0
-timestamp 1628080314
+timestamp 1628141510
transform -1 0 -2858 0 1 3671
box -63 -721 1952 1584
use aninv_ aninv__1
-timestamp 1628080314
+timestamp 1628141510
transform -1 0 -2858 0 1 899
box -63 -721 1952 1584
use aninv_ aninv__2
-timestamp 1628080314
+timestamp 1628141510
transform -1 0 -2858 0 1 -1981
box -63 -721 1952 1584
<< labels >>
diff --git a/openlane/Makefile b/openlane/Makefile
deleted file mode 100644
index 0dbb3a1..0000000
--- a/openlane/Makefile
+++ /dev/null
@@ -1,85 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-BLOCKS = $(shell find * -maxdepth 0 -type d)
-CONFIG = $(foreach block,$(BLOCKS), ./$(block)/config.tcl)
-CLEAN = $(foreach block,$(BLOCKS), clean-$(block))
-
-OPENLANE_TAG ?= v0.15
-OPENLANE_IMAGE_NAME ?= efabless/openlane:$(OPENLANE_TAG)
-OPENLANE_BASIC_COMMAND = "cd /project/openlane && flow.tcl -design ./$* -save_path .. -save -tag $* -overwrite"
-OPENLANE_INTERACTIVE_COMMAND = "cd /project/openlane && flow.tcl -it -file ./$*/interactive.tcl"
-
-all: $(BLOCKS)
-
-$(CONFIG) :
- @echo "Missing $@. Please create a configuration for that design"
- @exit 1
-
-$(BLOCKS) : % : ./%/config.tcl FORCE
-ifeq ($(OPENLANE_ROOT),)
- @echo "Please export OPENLANE_ROOT"
- @exit 1
-endif
-ifeq ($(PDK_ROOT),)
- @echo "Please export PDK_ROOT"
- @exit 1
-endif
- @echo "###############################################"
- @sleep 1
-
- @if [ -f ./$*/interactive.tcl ]; then\
- docker run -it -v $(OPENLANE_ROOT):/openLANE_flow \
- -v $(PDK_ROOT):$(PDK_ROOT) \
- -v $(PWD)/..:/project \
- -e PDK_ROOT=$(PDK_ROOT) \
- -u $(shell id -u $(USER)):$(shell id -g $(USER)) \
- $(OPENLANE_IMAGE_NAME) sh -c $(OPENLANE_INTERACTIVE_COMMAND);\
- else\
- docker run -it -v $(OPENLANE_ROOT):/openLANE_flow \
- -v $(PDK_ROOT):$(PDK_ROOT) \
- -v $(PWD)/..:/project \
- -e PDK_ROOT=$(PDK_ROOT) \
- -u $(shell id -u $(USER)):$(shell id -g $(USER)) \
- $(OPENLANE_IMAGE_NAME) sh -c $(OPENLANE_BASIC_COMMAND);\
- fi
- mkdir -p ../signoff/$*/
- cp $*/runs/$*/OPENLANE_VERSION ../signoff/$*/
- cp $*/runs/$*/PDK_SOURCES ../signoff/$*/
- cp $*/runs/$*/reports/final_summary_report.csv ../signoff/$*/
-
-.PHONY: openlane
-openlane:
-ifeq ($(OPENLANE_ROOT),)
- @echo "Please export OPENLANE_ROOT"
- @exit 1
-endif
- git clone https://github.com/efabless/openlane.git --branch=$(OPENLANE_TAG) --depth=1 $(OPENLANE_ROOT) && \
- cd $(OPENLANE_ROOT) && \
- make openlane
-
-FORCE:
-
-clean:
- @echo "Use clean_all to clean everything :)"
-
-clean_all: $(CLEAN)
-
-$(CLEAN): clean-% :
- rm -rf runs/$*
- rm -rf ../gds/$**
- rm -rf ../mag/$**
- rm -rf ../lef/$**
diff --git a/openlane/Makefile b/openlane/Makefile
new file mode 120000
index 0000000..48e5b4a
--- /dev/null
+++ b/openlane/Makefile
@@ -0,0 +1 @@
+../caravel/openlane/Makefile
\ No newline at end of file
diff --git a/xschem/.spiceinit b/xschem/.spiceinit
deleted file mode 100644
index e6a73aa..0000000
--- a/xschem/.spiceinit
+++ /dev/null
@@ -1,5 +0,0 @@
-* ngspice initialization for sky130
-* assert BSIM compatibility mode with "nf" vs. "W"
-set ngbehavior=hsa
-* "nomodcheck" speeds up loading time
-set ng_nomodcheck
diff --git a/xschem/analog_wrapper_tb.sch b/xschem/analog_wrapper_tb.sch
deleted file mode 100644
index 736a27c..0000000
--- a/xschem/analog_wrapper_tb.sch
+++ /dev/null
@@ -1,97 +0,0 @@
-v {xschem version=2.9.9 file_version=1.2 }
-G {}
-K {}
-V {}
-S {}
-E {}
-N 300 -290 510 -290 { lab=#net1}
-N 590 -290 590 -250 { lab=#net1}
-N 300 -250 430 -250 { lab=GND}
-N 510 -250 510 -150 { lab=GND}
-N 510 -150 780 -150 { lab=GND}
-N 780 -190 780 -150 { lab=GND}
-N 690 -190 690 -150 { lab=GND}
-N 590 -190 590 -150 { lab=GND}
-N 300 -210 400 -210 { lab=#net2}
-N 480 -270 480 -210 { lab=#net2}
-N 480 -270 690 -270 { lab=#net2}
-N 690 -270 690 -250 { lab=#net2}
-N 300 10 450 10 { lab=#net3}
-N 850 -270 850 0 { lab=io_analog[4]}
-N 780 -270 850 -270 { lab=io_analog[4]}
-N 780 -270 780 -250 { lab=io_analog[4]}
-N 300 30 470 30 { lab=io_clamp_high[2:0]}
-N 300 50 410 50 { lab=GND}
-N 550 30 630 30 { lab=io_clamp_high[2:0]}
-N 630 30 630 90 { lab=io_clamp_high[2:0]}
-N 500 160 810 160 { lab=GND}
-N 810 -150 810 160 { lab=GND}
-N 780 -150 810 -150 { lab=GND}
-N 530 10 660 10 { lab=io_analog[10:0]}
-N 510 -290 590 -290 { lab=#net1}
-N 430 -250 510 -250 { lab=GND}
-N 400 -210 480 -210 { lab=#net2}
-N 470 30 550 30 { lab=io_clamp_high[2:0]}
-N 460 10 530 10 { lab=io_analog[10:0]}
-N 410 50 490 50 { lab=io_clamp_low[2:0]}
-N 490 50 490 160 { lab=GND}
-N 490 160 500 160 { lab=GND}
-N 300 -50 620 -50 { lab=io_oeb[26:0]}
-N 300 -70 480 -70 { lab=io_out[26:0]}
-N 520 -150 520 -60 { lab=io_oeb[16:15]}
-N 610 -150 610 -60 { lab=io_oeb[12:11]}
-N 850 -0 850 40 { lab=io_analog[4]}
-N 640 40 810 40 { lab=io_clamp_high[2:1]}
-N 670 0 850 -0 { lab=io_analog[4]}
-N 640 100 850 100 { lab=io_clamp_high[0]}
-N 850 40 850 100 { lab=io_analog[4]}
-N 300 -270 400 -270 { lab=#net4}
-N 300 -230 400 -230 { lab=#net5}
-N 300 -190 400 -190 { lab=#net6}
-N 300 -190 400 -190 { lab=#net6}
-N 300 -170 400 -170 { lab=#net7}
-N 290 -150 390 -150 { lab=#net8}
-N 290 -130 390 -130 { lab=#net9}
-N 290 -110 390 -110 { lab=#net10}
-N 300 -90 400 -90 { lab=#net11}
-N 300 -30 400 -30 { lab=#net12}
-N 300 -10 400 -10 { lab=#net13}
-N 300 70 400 70 { lab=#net14}
-N -60 -290 -0 -290 { lab=#net15}
-N -60 -270 0 -270 { lab=#net16}
-N -60 -250 0 -250 { lab=#net17}
-N -60 -230 0 -230 { lab=#net18}
-N -60 -210 0 -210 { lab=#net19}
-N -60 -210 0 -210 { lab=#net19}
-N -60 -190 0 -190 { lab=#net20}
-N -60 -190 0 -190 { lab=#net20}
-N -60 -170 0 -170 { lab=#net21}
-N -60 -150 0 -150 { lab=#net22}
-N -60 -130 0 -130 { lab=#net23}
-N -60 -110 0 -110 { lab=#net24}
-N -60 -90 0 -90 { lab=#net25}
-N -60 -70 0 -70 { lab=#net26}
-N -60 -50 0 -50 { lab=#net27}
-C {user_analog_project_wrapper.sym} 150 -110 0 0 {name=x1}
-C {devices/vsource.sym} 590 -220 0 0 {name=V1 value="PWL(0.0 0 400u 0 5.4m 3.3)"}
-C {devices/vsource.sym} 690 -220 0 0 {name=V2 value="PWL(0.0 0 300u 0 5.3 1.8)"}
-C {devices/vsource.sym} 780 -220 0 0 {name=V3 value="PWL(0.0 0 100u 0 5m 3.3)"}
-C {devices/bus_connect.sym} 660 10 1 1 {name=l1 lab=io_analog[4]}
-C {devices/gnd.sym} 730 -150 0 0 {name=l2 lab=GND}
-C {devices/bus_connect.sym} 630 30 1 0 {name=l3 lab=io_clamp_high[2:1]}
-C {devices/bus_connect.sym} 630 90 1 0 {name=l8 lab=io_clamp_high[0]}
-C {devices/lab_pin.sym} 570 30 0 0 {name=l11 sig_type=std_logic lab=io_clamp_high[2:0]}
-C {devices/lab_pin.sym} 570 10 0 0 {name=l12 sig_type=std_logic lab=io_analog[10:0]}
-C {devices/lab_pin.sym} 480 50 0 0 {name=l9 sig_type=std_logic lab=io_clamp_low[2:0]}
-C {devices/lab_pin.sym} 450 -50 0 0 {name=l4 sig_type=std_logic lab=io_oeb[26:0]}
-C {devices/lab_pin.sym} 450 -70 0 0 {name=l5 sig_type=std_logic lab=io_out[26:0]}
-C {devices/bus_connect.sym} 510 -50 0 0 {name=l6 lab=io_oeb[16:15]}
-C {devices/bus_connect.sym} 600 -50 0 0 {name=l7 lab=io_oeb[12:11]}
-C {devices/code_shown.sym} 920 -130 0 0 {name=s1 only_toplevel=false value=".param mc_mm_switch=0
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
-.control
-tran 10u 20m
-plot V(io_out[11]) V(io_out[12]) V(io_out[15]) V(io_out[16])
-+ V(gpio_analog[3]) V(gpio_analog[7])
-.endc"}
diff --git a/xschem/analog_wrapper_tb.spice b/xschem/analog_wrapper_tb.spice
deleted file mode 100644
index e28a311..0000000
--- a/xschem/analog_wrapper_tb.spice
+++ /dev/null
@@ -1,273 +0,0 @@
-**.subckt analog_wrapper_tb
-x1 net1 net4 GND net5 net2 net6 net7 net8 net15 net16 net17 net18 net19 net20[3] net20[2] net20[1]
-+ net20[0] net21[31] net21[30] net21[29] net21[28] net21[27] net21[26] net21[25] net21[24] net21[23] net21[22]
-+ net21[21] net21[20] net21[19] net21[18] net21[17] net21[16] net21[15] net21[14] net21[13] net21[12] net21[11]
-+ net21[10] net21[9] net21[8] net21[7] net21[6] net21[5] net21[4] net21[3] net21[2] net21[1] net21[0] net22[31]
-+ net22[30] net22[29] net22[28] net22[27] net22[26] net22[25] net22[24] net22[23] net22[22] net22[21] net22[20]
-+ net22[19] net22[18] net22[17] net22[16] net22[15] net22[14] net22[13] net22[12] net22[11] net22[10] net22[9]
-+ net22[8] net22[7] net22[6] net22[5] net22[4] net22[3] net22[2] net22[1] net22[0] net9 net10[31] net10[30]
-+ net10[29] net10[28] net10[27] net10[26] net10[25] net10[24] net10[23] net10[22] net10[21] net10[20] net10[19]
-+ net10[18] net10[17] net10[16] net10[15] net10[14] net10[13] net10[12] net10[11] net10[10] net10[9] net10[8]
-+ net10[7] net10[6] net10[5] net10[4] net10[3] net10[2] net10[1] net10[0] net23[127] net23[126] net23[125]
-+ net23[124] net23[123] net23[122] net23[121] net23[120] net23[119] net23[118] net23[117] net23[116] net23[115]
-+ net23[114] net23[113] net23[112] net23[111] net23[110] net23[109] net23[108] net23[107] net23[106] net23[105]
-+ net23[104] net23[103] net23[102] net23[101] net23[100] net23[99] net23[98] net23[97] net23[96] net23[95]
-+ net23[94] net23[93] net23[92] net23[91] net23[90] net23[89] net23[88] net23[87] net23[86] net23[85] net23[84]
-+ net23[83] net23[82] net23[81] net23[80] net23[79] net23[78] net23[77] net23[76] net23[75] net23[74] net23[73]
-+ net23[72] net23[71] net23[70] net23[69] net23[68] net23[67] net23[66] net23[65] net23[64] net23[63] net23[62]
-+ net23[61] net23[60] net23[59] net23[58] net23[57] net23[56] net23[55] net23[54] net23[53] net23[52] net23[51]
-+ net23[50] net23[49] net23[48] net23[47] net23[46] net23[45] net23[44] net23[43] net23[42] net23[41] net23[40]
-+ net23[39] net23[38] net23[37] net23[36] net23[35] net23[34] net23[33] net23[32] net23[31] net23[30] net23[29]
-+ net23[28] net23[27] net23[26] net23[25] net23[24] net23[23] net23[22] net23[21] net23[20] net23[19] net23[18]
-+ net23[17] net23[16] net23[15] net23[14] net23[13] net23[12] net23[11] net23[10] net23[9] net23[8] net23[7]
-+ net23[6] net23[5] net23[4] net23[3] net23[2] net23[1] net23[0] net11[127] net11[126] net11[125] net11[124]
-+ net11[123] net11[122] net11[121] net11[120] net11[119] net11[118] net11[117] net11[116] net11[115] net11[114]
-+ net11[113] net11[112] net11[111] net11[110] net11[109] net11[108] net11[107] net11[106] net11[105] net11[104]
-+ net11[103] net11[102] net11[101] net11[100] net11[99] net11[98] net11[97] net11[96] net11[95] net11[94]
-+ net11[93] net11[92] net11[91] net11[90] net11[89] net11[88] net11[87] net11[86] net11[85] net11[84] net11[83]
-+ net11[82] net11[81] net11[80] net11[79] net11[78] net11[77] net11[76] net11[75] net11[74] net11[73] net11[72]
-+ net11[71] net11[70] net11[69] net11[68] net11[67] net11[66] net11[65] net11[64] net11[63] net11[62] net11[61]
-+ net11[60] net11[59] net11[58] net11[57] net11[56] net11[55] net11[54] net11[53] net11[52] net11[51] net11[50]
-+ net11[49] net11[48] net11[47] net11[46] net11[45] net11[44] net11[43] net11[42] net11[41] net11[40] net11[39]
-+ net11[38] net11[37] net11[36] net11[35] net11[34] net11[33] net11[32] net11[31] net11[30] net11[29] net11[28]
-+ net11[27] net11[26] net11[25] net11[24] net11[23] net11[22] net11[21] net11[20] net11[19] net11[18] net11[17]
-+ net11[16] net11[15] net11[14] net11[13] net11[12] net11[11] net11[10] net11[9] net11[8] net11[7] net11[6]
-+ net11[5] net11[4] net11[3] net11[2] net11[1] net11[0] net24[127] net24[126] net24[125] net24[124] net24[123]
-+ net24[122] net24[121] net24[120] net24[119] net24[118] net24[117] net24[116] net24[115] net24[114] net24[113]
-+ net24[112] net24[111] net24[110] net24[109] net24[108] net24[107] net24[106] net24[105] net24[104] net24[103]
-+ net24[102] net24[101] net24[100] net24[99] net24[98] net24[97] net24[96] net24[95] net24[94] net24[93]
-+ net24[92] net24[91] net24[90] net24[89] net24[88] net24[87] net24[86] net24[85] net24[84] net24[83] net24[82]
-+ net24[81] net24[80] net24[79] net24[78] net24[77] net24[76] net24[75] net24[74] net24[73] net24[72] net24[71]
-+ net24[70] net24[69] net24[68] net24[67] net24[66] net24[65] net24[64] net24[63] net24[62] net24[61] net24[60]
-+ net24[59] net24[58] net24[57] net24[56] net24[55] net24[54] net24[53] net24[52] net24[51] net24[50] net24[49]
-+ net24[48] net24[47] net24[46] net24[45] net24[44] net24[43] net24[42] net24[41] net24[40] net24[39] net24[38]
-+ net24[37] net24[36] net24[35] net24[34] net24[33] net24[32] net24[31] net24[30] net24[29] net24[28] net24[27]
-+ net24[26] net24[25] net24[24] net24[23] net24[22] net24[21] net24[20] net24[19] net24[18] net24[17] net24[16]
-+ net24[15] net24[14] net24[13] net24[12] net24[11] net24[10] net24[9] net24[8] net24[7] net24[6] net24[5]
-+ net24[4] net24[3] net24[2] net24[1] net24[0] net25[26] net25[25] net25[24] net25[23] net25[22] net25[21]
-+ net25[20] net25[19] net25[18] net25[17] net25[16] net25[15] net25[14] net25[13] net25[12] net25[11] net25[10]
-+ net25[9] net25[8] net25[7] net25[6] net25[5] net25[4] net25[3] net25[2] net25[1] net25[0] net26[26]
-+ net26[25] net26[24] net26[23] net26[22] net26[21] net26[20] net26[19] net26[18] net26[17] net26[16] net26[15]
-+ net26[14] net26[13] net26[12] net26[11] net26[10] net26[9] net26[8] net26[7] net26[6] net26[5] net26[4]
-+ net26[3] net26[2] net26[1] net26[0] io_out[26] io_out[25] io_out[24] io_out[23] io_out[22] io_out[21]
-+ io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15] io_out[14] io_out[13] io_out[12] io_out[11]
-+ io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5] io_out[4] io_out[3] io_out[2] io_out[1] io_out[0]
-+ io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22] io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17]
-+ io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12] io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7]
-+ io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2] io_oeb[1] io_oeb[0] net12[17] net12[16] net12[15] net12[14]
-+ net12[13] net12[12] net12[11] net12[10] net12[9] net12[8] net12[7] net12[6] net12[5] net12[4] net12[3]
-+ net12[2] net12[1] net12[0] net13[17] net13[16] net13[15] net13[14] net13[13] net13[12] net13[11] net13[10]
-+ net13[9] net13[8] net13[7] net13[6] net13[5] net13[4] net13[3] net13[2] net13[1] net13[0] net3[10] net3[9]
-+ net3[8] net3[7] net3[6] net3[5] net3[4] net3[3] net3[2] net3[1] net3[0] io_clamp_high[2] io_clamp_high[1]
-+ io_clamp_high[0] GND GND GND net27 net14[2] net14[1] net14[0] user_analog_project_wrapper
-V1 net1 GND PWL(0.0 0 400u 0 5.4m 3.3)
-V2 net2 GND PWL(0.0 0 300u 0 5.3 1.8)
-V3 io_analog[4] GND PWL(0.0 0 100u 0 5m 3.3)
-**** begin user architecture code
-
-.param mc_mm_switch=0
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
-.control
-tran 10u 20m
-plot V(io_out[11]) V(io_out[12]) V(io_out[15]) V(io_out[16]) V(gpio_analog[3]) V(gpio_analog[7])
-.endc
-
-**** end user architecture code
-**.ends
-
-* expanding symbol: user_analog_project_wrapper.sym # of pins=32
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sch
-.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
-+ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
-+ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
-+ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
-+ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
-+ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
-+ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
-+ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
-+ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
-+ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
-+ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
-+ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
-+ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
-+ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
-+ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
-+ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
-+ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
-+ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
-+ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
-+ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
-+ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
-+ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
-+ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
-+ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
-+ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
-+ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
-+ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
-+ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
-+ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
-+ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
-+ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
-+ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
-+ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
-+ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
-+ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
-+ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
-+ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
-+ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
-+ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
-+ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
-+ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
-+ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
-+ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
-+ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
-+ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
-+ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
-+ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
-+ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
-+ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
-+ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
-+ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0]
-+ la_oenb[127] la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120]
-+ la_oenb[119] la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112]
-+ la_oenb[111] la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104]
-+ la_oenb[103] la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95]
-+ la_oenb[94] la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86]
-+ la_oenb[85] la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77]
-+ la_oenb[76] la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68]
-+ la_oenb[67] la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59]
-+ la_oenb[58] la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50]
-+ la_oenb[49] la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41]
-+ la_oenb[40] la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32]
-+ la_oenb[31] la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23]
-+ la_oenb[22] la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14]
-+ la_oenb[13] la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5]
-+ la_oenb[4] la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0] io_in[26] io_in[25] io_in[24] io_in[23] io_in[22]
-+ io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15] io_in[14] io_in[13] io_in[12] io_in[11]
-+ io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4] io_in[3] io_in[2] io_in[1] io_in[0]
-+ io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22] io_in_3v3[21] io_in_3v3[20] io_in_3v3[19]
-+ io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14] io_in_3v3[13] io_in_3v3[12] io_in_3v3[11]
-+ io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6] io_in_3v3[5] io_in_3v3[4] io_in_3v3[3]
-+ io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] io_out[26] io_out[25] io_out[24] io_out[23] io_out[22] io_out[21]
-+ io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15] io_out[14] io_out[13] io_out[12] io_out[11]
-+ io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5] io_out[4] io_out[3] io_out[2] io_out[1] io_out[0]
-+ io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22] io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17]
-+ io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12] io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7]
-+ io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2] io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16]
-+ gpio_analog[15] gpio_analog[14] gpio_analog[13] gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9]
-+ gpio_analog[8] gpio_analog[7] gpio_analog[6] gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2]
-+ gpio_analog[1] gpio_analog[0] gpio_noesd[17] gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13]
-+ gpio_noesd[12] gpio_noesd[11] gpio_noesd[10] gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5]
-+ gpio_noesd[4] gpio_noesd[3] gpio_noesd[2] gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8]
-+ io_analog[7] io_analog[6] io_analog[5] io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0]
-+ io_clamp_high[2] io_clamp_high[1] io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_clock2
-+ user_irq[2] user_irq[1] user_irq[0]
-*.iopin vdda1
-*.iopin vdda2
-*.iopin vssa1
-*.iopin vssa2
-*.iopin vccd1
-*.iopin vccd2
-*.iopin vssd1
-*.iopin vssd2
-*.ipin wb_clk_i
-*.ipin wb_rst_i
-*.ipin wbs_stb_i
-*.ipin wbs_cyc_i
-*.ipin wbs_we_i
-*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
-*.ipin
-*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
-*.ipin
-*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
-*.opin wbs_ack_o
-*.opin
-*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
-*.ipin
-*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
-*.opin
-*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
-*.ipin
-*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
-*.ipin
-*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
-*.ipin user_clock2
-*.opin
-*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
-*.opin
-*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
-*.iopin
-*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
-*.iopin
-*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
-*.iopin
-*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
-*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
-*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
-*.opin user_irq[2],user_irq[1],user_irq[0]
-*.ipin
-*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
-x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
-x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
-.ends
-
-
-* expanding symbol: example_por.sym # of pins=6
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
-.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
-*.iopin vdd3v3
-*.iopin vss
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-*.iopin vdd1v8
-XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
-XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
-XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=500 mult=1 m=1
-XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=150 mult=1 m=1
-XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=25 mult=2 m=2
-x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
-x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
-x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
-x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
-.ends
-
-.GLOBAL GND
-** flattened .save nodes
-.end
diff --git a/xschem/current_test.spice b/xschem/current_test.spice
deleted file mode 100644
index 8e4162d..0000000
--- a/xschem/current_test.spice
+++ /dev/null
@@ -1,86 +0,0 @@
-*---------------------------------------------------------------------------
-* SPDX-FileCopyrightText: 2020 Efabless Corporation
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* https://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*
-* SPDX-License-Identifier: Apache-2.0
-*---------------------------------------------------------------------------
-* Simple POR circuit for Caravel current mirror test
-*-------------------------------------------------------------------
-
-.param mc_mm_switch=0
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-
-* Note: 20 resistors of length 25um connected in series
-Xres1 vdda vin vss sky130_fd_pr__res_xhigh_po_0p69 l=500
-Xres2 vin vss vss sky130_fd_pr__res_xhigh_po_0p69 l=149
-
-* voltage sources at 0V for measuring current in each branch
-
-Vm1 vssm1 vss DC=0
-Vm2 vdda vddm2 DC=0
-Vm3 vdda vddm3 DC=0
-Vm4 vssm4 vss DC=0
-Vm5 vssm5 vss DC=0
-Vm6 vdda vddm6 DC=0
-Vm7 vdda vddm7 DC=0
-
-* D G S B
-Xm1 casc1 vin vssm1 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc1 mir1 casc1 casc1 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xm2 mir1 mir1 vddm2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=8
-Xm3 mir2 mir1 vddm3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc2 casc2 casc1 mir2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xm4 casc2 casc2 vssm4 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=7
-Xm5 casc3 casc2 vssm5 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc3 mir3 casc3 casc3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xm6 mir3 mir3 vddm6 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=7
-Xm7 mir4 mir3 vddm7 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc4 vcap casc3 mir4 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-
-* Check branch currents in each mirror branch.
-* 1st branch should be 240nA
-* 2nd branch should be 30nA
-* 3rd branch should be 4.3nA
-* 4th branch should be 612pA
-*
-* Result: vin sits at 0.7590 (close to 0.7575 target)
-* I(Vm1/2) = 202.80 nA
-* I(Vm3/4) = 26.10 nA (should be /8) actually /7.77
-* I(Vm5/6) = 4.58 nA (should be /7) actually /5.70
-* I(Vm7) = 0.67 nA (should be /7) actually /6.80
-
-*----------------------------
-* Testbench circuit
-*----------------------------
-Vpwr vdda vss DC=3.3
-Rgnd vss 0 0.01
-Rload vcap vss 1MEG
-*----------------------------
-
-*----------------------------
-* Testbench control
-*----------------------------
-.control
-op
-print V(vin)
-print I(Vm1)
-print I(Vm2)
-print I(Vm3)
-print I(Vm4)
-print I(Vm5)
-print I(Vm6)
-print I(Vm7)
-.endc
-
-.end
-
diff --git a/xschem/example_por.sch b/xschem/example_por.sch
deleted file mode 100644
index cf6e0c3..0000000
--- a/xschem/example_por.sch
+++ /dev/null
@@ -1,297 +0,0 @@
-v {xschem version=2.9.9 file_version=1.2 }
-G {}
-K {}
-V {}
-S {}
-E {}
-L 4 3370 -60 3390 -60 {}
-L 4 3390 -60 3390 80 {}
-L 4 3370 80 3390 80 {}
-T {Current step-down mirror} 2270 140 0 0 0.4 0.4 {}
-T {Charge accumulator} 2650 140 0 0 0.4 0.4 {}
-T {Voltage divider} 1860 140 0 0 0.4 0.4 {}
-T {Schmitt trigger} 2930 -200 0 0 0.4 0.4 {}
-T {150 / 650 * 3.3V = 0.76V} 1860 180 0 0 0.4 0.4 {}
-T {step down 8x} 2130 -430 0 0 0.4 0.4 {}
-T {step down 7x} 2330 80 0 0 0.4 0.4 {}
-T {step down 7x} 2520 -430 0 0 0.4 0.4 {}
-T {1.8V domain outputs} 3400 0 0 0 0.4 0.4 {}
-T {3.3V domain output} 3410 -140 0 0 0.4 0.4 {}
-T {392 : 1} 2270 180 0 0 0.4 0.4 {}
-T {Simple power-on-reset circuit
-calibrated to 500us nominal delay
-no temperature compensation} 1950 -570 0 0 0.6 0.6 {}
-N 2500 -310 2500 -270 { lab=#net1}
-N 2500 -210 2500 -100 { lab=#net2}
-N 2300 -40 2300 20 { lab=#net3}
-N 2300 80 2300 110 { lab=vss}
-N 2360 110 2500 110 { lab=vss}
-N 2500 80 2500 110 { lab=vss}
-N 2400 50 2460 50 { lab=#net3}
-N 2360 -400 2500 -400 { lab=vdd3v3}
-N 2500 -400 2500 -370 { lab=vdd3v3}
-N 2500 -400 2790 -400 { lab=vdd3v3}
-N 2300 -10 2370 -10 { lab=#net3}
-N 2370 -10 2370 50 { lab=#net3}
-N 2500 -290 2570 -290 { lab=#net1}
-N 2570 -340 2570 -290 { lab=#net1}
-N 2540 -340 2570 -340 { lab=#net1}
-N 2500 -190 2570 -190 { lab=#net2}
-N 2570 -240 2570 -190 { lab=#net2}
-N 2540 -240 2570 -240 { lab=#net2}
-N 2240 110 2360 110 { lab=vss}
-N 2500 110 2630 110 { lab=vss}
-N 2500 50 2630 50 { lab=vss}
-N 2110 110 2240 110 { lab=vss}
-N 1930 60 1930 110 { lab=vss}
-N 1930 -160 1930 0 { lab=#net4}
-N 1930 -400 1930 -220 { lab=vdd3v3}
-N 2110 -400 2360 -400 { lab=vdd3v3}
-N 1880 -190 1910 -190 { lab=vss}
-N 1880 -190 1880 110 { lab=vss}
-N 1880 110 1930 110 { lab=vss}
-N 1880 30 1910 30 { lab=vss}
-N 2300 -310 2300 -270 { lab=#net5}
-N 2300 -400 2300 -370 { lab=vdd3v3}
-N 2300 -140 2300 -100 { lab=#net3}
-N 2340 50 2400 50 { lab=#net3}
-N 2300 -210 2300 -140 { lab=#net3}
-N 2100 80 2100 110 { lab=vss}
-N 2100 110 2110 110 { lab=vss}
-N 2050 50 2060 50 { lab=#net4}
-N 2050 -70 2050 50 { lab=#net4}
-N 1930 -70 2050 -70 { lab=#net4}
-N 1930 -400 2110 -400 { lab=vdd3v3}
-N 2100 -400 2100 -370 { lab=vdd3v3}
-N 2100 -310 2100 -270 { lab=#net6}
-N 2100 -210 2100 20 { lab=#net7}
-N 2100 50 2300 50 { lab=vss}
-N 2200 50 2200 110 { lab=vss}
-N 2140 -240 2260 -240 { lab=#net7}
-N 2140 -340 2260 -340 { lab=#net6}
-N 2100 -290 2180 -290 { lab=#net6}
-N 2180 -340 2180 -290 { lab=#net6}
-N 2100 -180 2180 -180 { lab=#net7}
-N 2180 -240 2180 -180 { lab=#net7}
-N 1930 -240 2100 -240 { lab=vdd3v3}
-N 1930 -340 2100 -340 { lab=vdd3v3}
-N 1930 110 2100 110 { lab=vss}
-N 2300 -240 2500 -240 { lab=vdd3v3}
-N 2300 -340 2500 -340 { lab=vdd3v3}
-N 2400 -340 2400 -240 { lab=vdd3v3}
-N 2400 -400 2400 -340 { lab=vdd3v3}
-N 2570 -240 2650 -240 { lab=#net2}
-N 2570 -340 2650 -340 { lab=#net1}
-N 2690 -400 2690 -370 { lab=vdd3v3}
-N 2790 -400 2790 -340 { lab=vdd3v3}
-N 2690 -340 2790 -340 { lab=vdd3v3}
-N 2690 -240 2790 -240 { lab=vdd3v3}
-N 2790 -340 2790 -240 { lab=vdd3v3}
-N 2690 -310 2690 -270 { lab=#net8}
-N 2690 -210 2690 -150 { lab=#net9}
-N 1830 30 1880 30 { lab=vss}
-N 1810 60 1810 110 { lab=vss}
-N 1810 110 1880 110 { lab=vss}
-N 1810 -70 1810 0 { lab=vss}
-N 1810 -70 1880 -70 { lab=vss}
-N 2690 -150 2690 -70 { lab=#net9}
-N 2820 -130 2820 -70 { lab=#net9}
-N 2690 -130 2820 -130 { lab=#net9}
-N 2630 110 2820 110 { lab=vss}
-N 2820 -10 2820 110 { lab=vss}
-N 2690 -10 2690 110 { lab=vss}
-N 2820 -130 2980 -130 { lab=#net9}
-N 3060 -130 3130 -130 { lab=#net10}
-N 3090 -130 3090 60 { lab=#net10}
-N 3090 60 3130 60 { lab=#net10}
-N 3090 -40 3130 -40 { lab=#net10}
-N 3210 -130 3300 -130 { lab=porb_h}
-N 3210 -40 3300 -40 { lab=porb_l}
-N 3210 60 3300 60 { lab=por_l}
-N 2790 -400 2840 -400 { lab=vdd3v3}
-N 2820 110 2870 110 { lab=vss}
-N 2630 50 2690 50 { lab=vss}
-N 2300 -100 2300 -40 { lab=#net3}
-N 2500 -100 2500 -30 { lab=#net2}
-N 2500 -30 2500 20 { lab=#net2}
-C {sky130_fd_pr/cap_mim_m3_1.sym} 2690 -40 0 0 {name=C1 model=cap_mim_m3_1 W=30 L=30 MF=1 spiceprefix=X}
-C {sky130_fd_pr/cap_mim_m3_2.sym} 2820 -40 2 1 {name=C2 model=cap_mim_m3_2 W=30 L=30 MF=1 spiceprefix=X}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2280 -240 0 0 {name=M1
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2480 50 0 0 {name=M2
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=nfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1930 -190 0 0 {name=R1
-L=500
-model=res_xhigh_po_0p69
-spiceprefix=X
-mult=1}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2280 -340 0 0 {name=M4
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2320 50 0 1 {name=M5
-L=0.8
-W=14
-nf=7
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=nfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1930 30 0 0 {name=R2
-L=150
-model=res_xhigh_po_0p69
-spiceprefix=X
-mult=1}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2520 -240 0 1 {name=M7
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2520 -340 0 1 {name=M8
-L=0.8
-W=14
-nf=7
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2080 50 0 0 {name=M10
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=nfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2120 -240 0 1 {name=M9
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2120 -340 0 1 {name=M11
-L=0.8
-W=16
-nf=8
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2670 -340 0 0 {name=M12
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2670 -240 0 0 {name=M13
-L=0.8
-W=2
-nf=1
-mult=1
-ad="'int((nf+1)/2) * W/nf * 0.29'"
-pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
-as="'int((nf+2)/2) * W/nf * 0.29'"
-ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
-nrd="'0.29 / W'" nrs="'0.29 / W'"
-sa=0 sb=0 sd=0
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1810 30 0 1 {name=R3
-L=25
-model=res_xhigh_po_0p69
-spiceprefix=X
-mult=2}
-C {sky130_stdcells/buf_8.sym} 3170 -130 0 0 {name=x2 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__ }
-C {sky130_stdcells/buf_8.sym} 3170 -40 0 0 {name=x3 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ }
-C {sky130_stdcells/inv_8.sym} 3170 60 0 0 {name=x4 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ }
-C {sky130_stdcells/buf_1.sym} 3020 -130 0 0 {name=x5 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__schmitt }
-C {devices/iopin.sym} 2840 -400 0 0 {name=p1 lab=vdd3v3}
-C {devices/iopin.sym} 2870 110 0 0 {name=p2 lab=vss}
-C {devices/opin.sym} 3300 -130 0 0 {name=p3 lab=porb_h}
-C {devices/opin.sym} 3300 -40 0 0 {name=p4 lab=porb_l}
-C {devices/opin.sym} 3300 60 0 0 {name=p5 lab=por_l}
-C {devices/iopin.sym} 2840 -330 0 0 {name=p6 lab=vdd1v8}
diff --git a/xschem/example_por.sym b/xschem/example_por.sym
deleted file mode 100644
index e3875f5..0000000
--- a/xschem/example_por.sym
+++ /dev/null
@@ -1,33 +0,0 @@
-v {xschem version=2.9.9 file_version=1.2 }
-G {}
-K {type=subcircuit
-format="@name @pinlist @symname"
-template="name=x1"
-}
-V {}
-S {}
-E {}
-L 4 -130 -60 130 -60 {}
-L 4 -130 60 130 60 {}
-L 4 -130 -60 -130 60 {}
-L 4 130 -60 130 60 {}
-L 4 130 -30 150 -30 {}
-L 4 130 0 150 0 {}
-L 4 130 30 150 30 {}
-L 7 -30 -80 -30 -60 {}
-L 7 30 -80 30 -60 {}
-L 7 0 60 0 80 {}
-B 5 -32.5 -82.5 -27.5 -77.5 {name=vdd3v3 dir=inout }
-B 5 27.5 -82.5 32.5 -77.5 {name=vdd1v8 dir=inout }
-B 5 147.5 -32.5 152.5 -27.5 {name=porb_h dir=out }
-B 5 147.5 -2.5 152.5 2.5 {name=porb_l dir=out }
-B 5 147.5 27.5 152.5 32.5 {name=por_l dir=out }
-B 5 -2.5 77.5 2.5 82.5 {name=vss dir=inout }
-T {@symname} -47.5 -6 0 0 0.3 0.3 {}
-T {@name} -25 18 0 0 0.2 0.2 {}
-T {vdd3v3} -15 -54 0 1 0.2 0.2 {}
-T {vdd1v8} 55 -54 0 1 0.2 0.2 {}
-T {porb_h} 125 -34 0 1 0.2 0.2 {}
-T {porb_l} 125 -4 0 1 0.2 0.2 {}
-T {por_l} 125 26 0 1 0.2 0.2 {}
-T {vss} 5 46 0 1 0.2 0.2 {}
diff --git a/xschem/example_por_tb.sch b/xschem/example_por_tb.sch
deleted file mode 100644
index 664018f..0000000
--- a/xschem/example_por_tb.sch
+++ /dev/null
@@ -1,45 +0,0 @@
-v {xschem version=2.9.9 file_version=1.2 }
-G {}
-K {}
-V {}
-S {}
-E {}
-T {Testbench for simple POR} -350 -240 0 0 0.6 0.6 {}
-N -280 60 -10 60 { lab=GND}
-N -540 0 -540 60 { lab=#net1}
-N -330 0 -330 60 { lab=GND}
-N -330 -100 -330 -60 { lab=vdd3v3}
-N -330 -110 -330 -100 { lab=vdd3v3}
-N -210 -110 -40 -110 { lab=vdd3v3}
-N -40 -110 -40 -100 { lab=vdd3v3}
-N -540 -130 -540 -60 { lab=vdd1v8}
-N -280 -130 20 -130 { lab=#net2}
-N 20 -130 20 -100 { lab=#net2}
-N 140 -50 180 -50 { lab=porb_h}
-N 140 -20 180 -20 { lab=porb_l}
-N 140 10 180 10 { lab=por_l}
-N -340 -110 -330 -110 { lab=vdd3v3}
-N -500 -130 -490 -130 { lab=vdd1v8}
-N -540 -130 -500 -130 { lab=vdd1v8}
-N -560 -130 -540 -130 { lab=vdd1v8}
-N -540 60 -490 60 { lab=#net1}
-N -490 -130 -280 -130 {}
-N -490 60 -330 60 {}
-N -330 60 -280 60 {}
-N -330 -110 -210 -110 {}
-C {example_por.sym} -10 -20 0 0 {name=x1}
-C {devices/gnd.sym} -100 60 0 0 {name=l1 lab=GND}
-C {devices/vsource.sym} -330 -30 0 0 {name=V1 value="PWL(0.0 0 100u 0 5m 3.3)"}
-C {devices/vsource.sym} -540 -30 0 0 {name=V2 value="PWL(0.0 0 300u 0 5.3m 1.8)"}
-C {devices/opin.sym} -340 -110 0 1 {name=p1 lab=vdd3v3}
-C {devices/opin.sym} -560 -130 0 1 {name=p2 lab=vdd1v8}
-C {devices/opin.sym} 180 -50 0 0 {name=p3 lab=porb_h}
-C {devices/opin.sym} 180 -20 0 0 {name=p4 lab=porb_l}
-C {devices/opin.sym} 180 10 0 0 {name=p5 lab=por_l}
-C {devices/code_shown.sym} -470 140 0 0 {name=s1 only_toplevel=false value=".param mc_mm_switch=0
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice"}
-C {devices/code_shown.sym} -470 250 0 0 {name=s2 only_toplevel=false value=".control
-tran 1u 20m
-plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
-.endc"}
diff --git a/xschem/example_por_tb.spice b/xschem/example_por_tb.spice
deleted file mode 100644
index 265e666..0000000
--- a/xschem/example_por_tb.spice
+++ /dev/null
@@ -1,81 +0,0 @@
-**.subckt example_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l
-*.opin vdd3v3
-*.opin vdd1v8
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND example_por
-V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3)
-V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8)
-**** begin user architecture code
-
-.param mc_mm_switch=0
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
-
-
-.control
-tran 1u 20m
-plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
-.endc
-
-**** end user architecture code
-**.ends
-
-* expanding symbol: example_por.sym # of pins=6
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
-.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
-*.iopin vdd3v3
-*.iopin vss
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-*.iopin vdd1v8
-XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
-XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
-XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=500 mult=1 m=1
-XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=150 mult=1 m=1
-XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=25 mult=2 m=2
-x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
-x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
-x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
-x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
-.ends
-
-.GLOBAL GND
-** flattened .save nodes
-.end
diff --git a/xschem/example_por_tb.spice.orig b/xschem/example_por_tb.spice.orig
deleted file mode 100644
index 069c74d..0000000
--- a/xschem/example_por_tb.spice.orig
+++ /dev/null
@@ -1,88 +0,0 @@
-**.subckt example_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l
-.param mc_switch=0
-*.opin vdd3v3
-*.opin vdd1v8
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND example_por
-V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3)
-V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8)
-**** begin user architecture code
-
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-
-
-.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
-
-.control
-tran 1u 20m
-plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
-.endc
-
-**** end user architecture code
-**.ends
-
-* expanding symbol: example_por.sym # of pins=6
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
-.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
-*.iopin vdd3v3
-*.iopin vss
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-*.iopin vdd1v8
-XC1 net11 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
-XC2 net11 vss sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
-XM1 net5 net9 net7 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM2 net1 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR1 net6 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=500 mult=1 m=1
-XM3 net3 net5 net1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM4 net7 net8 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM5 net4 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM6 net5 net5 net4 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR2 vss net6 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=150 mult=1 m=1
-XM7 net3 net3 net2 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM8 net2 net2 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM10 net9 net6 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM9 net9 net9 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM11 net8 net8 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM12 net10 net2 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM13 net11 net3 net10 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=25 mult=2 m=2
-x2 net12 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
-x3 net12 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
-x4 net12 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
-x5 net11 vss vss vdd3v3 vdd3v3 net12 sky130_fd_sc_hvl__schmittbuf_1
-.ends
-
-.GLOBAL GND
-** flattened .save nodes
-.end
diff --git a/xschem/test.data b/xschem/test.data
deleted file mode 100644
index c9cde37..0000000
--- a/xschem/test.data
+++ /dev/null
@@ -1,101 +0,0 @@
- 7.00000000e-01 -8.93059159e-08 7.00000000e-01 7.00000000e-01
- 7.01000000e-01 -9.08452852e-08 7.01000000e-01 7.01000000e-01
- 7.02000000e-01 -9.24385447e-08 7.02000000e-01 7.02000000e-01
- 7.03000000e-01 -9.40459956e-08 7.03000000e-01 7.03000000e-01
- 7.04000000e-01 -9.56814959e-08 7.04000000e-01 7.04000000e-01
- 7.05000000e-01 -9.73455368e-08 7.05000000e-01 7.05000000e-01
- 7.06000000e-01 -9.90386085e-08 7.06000000e-01 7.06000000e-01
- 7.07000000e-01 -1.00761227e-07 7.07000000e-01 7.07000000e-01
- 7.08000000e-01 -1.02513882e-07 7.08000000e-01 7.08000000e-01
- 7.09000000e-01 -1.04297110e-07 7.09000000e-01 7.09000000e-01
- 7.10000000e-01 -1.06111443e-07 7.10000000e-01 7.10000000e-01
- 7.11000000e-01 -1.07957415e-07 7.11000000e-01 7.11000000e-01
- 7.12000000e-01 -1.09835552e-07 7.12000000e-01 7.12000000e-01
- 7.13000000e-01 -1.11746436e-07 7.13000000e-01 7.13000000e-01
- 7.14000000e-01 -1.13690603e-07 7.14000000e-01 7.14000000e-01
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- 7.16000000e-01 -1.17681129e-07 7.16000000e-01 7.16000000e-01
- 7.17000000e-01 -1.19728657e-07 7.17000000e-01 7.17000000e-01
- 7.18000000e-01 -1.21811839e-07 7.18000000e-01 7.18000000e-01
- 7.19000000e-01 -1.23931259e-07 7.19000000e-01 7.19000000e-01
- 7.20000000e-01 -1.26087554e-07 7.20000000e-01 7.20000000e-01
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- 7.24000000e-01 -1.35094165e-07 7.24000000e-01 7.24000000e-01
- 7.25000000e-01 -1.37444453e-07 7.25000000e-01 7.25000000e-01
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- 7.27000000e-01 -1.42268085e-07 7.27000000e-01 7.27000000e-01
- 7.28000000e-01 -1.44742842e-07 7.28000000e-01 7.28000000e-01
- 7.29000000e-01 -1.47260486e-07 7.29000000e-01 7.29000000e-01
- 7.30000000e-01 -1.49821761e-07 7.30000000e-01 7.30000000e-01
- 7.31000000e-01 -1.52427364e-07 7.31000000e-01 7.31000000e-01
- 7.32000000e-01 -1.55078077e-07 7.32000000e-01 7.32000000e-01
- 7.33000000e-01 -1.57774611e-07 7.33000000e-01 7.33000000e-01
- 7.34000000e-01 -1.60517775e-07 7.34000000e-01 7.34000000e-01
- 7.35000000e-01 -1.63308337e-07 7.35000000e-01 7.35000000e-01
- 7.36000000e-01 -1.66147061e-07 7.36000000e-01 7.36000000e-01
- 7.37000000e-01 -1.69034765e-07 7.37000000e-01 7.37000000e-01
- 7.38000000e-01 -1.71972266e-07 7.38000000e-01 7.38000000e-01
- 7.39000000e-01 -1.74960357e-07 7.39000000e-01 7.39000000e-01
- 7.40000000e-01 -1.77999888e-07 7.40000000e-01 7.40000000e-01
- 7.41000000e-01 -1.81091703e-07 7.41000000e-01 7.41000000e-01
- 7.42000000e-01 -1.84236664e-07 7.42000000e-01 7.42000000e-01
- 7.43000000e-01 -1.87435634e-07 7.43000000e-01 7.43000000e-01
- 7.44000000e-01 -1.90689493e-07 7.44000000e-01 7.44000000e-01
- 7.45000000e-01 -1.93999127e-07 7.45000000e-01 7.45000000e-01
- 7.46000000e-01 -1.97365464e-07 7.46000000e-01 7.46000000e-01
- 7.47000000e-01 -2.00789378e-07 7.47000000e-01 7.47000000e-01
- 7.48000000e-01 -2.04271837e-07 7.48000000e-01 7.48000000e-01
- 7.49000000e-01 -2.07813739e-07 7.49000000e-01 7.49000000e-01
- 7.50000000e-01 -2.11416073e-07 7.50000000e-01 7.50000000e-01
- 7.51000000e-01 -2.15079797e-07 7.51000000e-01 7.51000000e-01
- 7.52000000e-01 -2.18805863e-07 7.52000000e-01 7.52000000e-01
- 7.53000000e-01 -2.22595278e-07 7.53000000e-01 7.53000000e-01
- 7.54000000e-01 -2.26449036e-07 7.54000000e-01 7.54000000e-01
- 7.55000000e-01 -2.30368144e-07 7.55000000e-01 7.55000000e-01
- 7.56000000e-01 -2.34353630e-07 7.56000000e-01 7.56000000e-01
- 7.57000000e-01 -2.38406548e-07 7.57000000e-01 7.57000000e-01
- 7.58000000e-01 -2.42527913e-07 7.58000000e-01 7.58000000e-01
- 7.59000000e-01 -2.46718795e-07 7.59000000e-01 7.59000000e-01
- 7.60000000e-01 -2.50980278e-07 7.60000000e-01 7.60000000e-01
- 7.61000000e-01 -2.55313430e-07 7.61000000e-01 7.61000000e-01
- 7.62000000e-01 -2.59719344e-07 7.62000000e-01 7.62000000e-01
- 7.63000000e-01 -2.64199148e-07 7.63000000e-01 7.63000000e-01
- 7.64000000e-01 -2.68753946e-07 7.64000000e-01 7.64000000e-01
- 7.65000000e-01 -2.73384860e-07 7.65000000e-01 7.65000000e-01
- 7.66000000e-01 -2.78093044e-07 7.66000000e-01 7.66000000e-01
- 7.67000000e-01 -2.82879650e-07 7.67000000e-01 7.67000000e-01
- 7.68000000e-01 -2.87745826e-07 7.68000000e-01 7.68000000e-01
- 7.69000000e-01 -2.92692776e-07 7.69000000e-01 7.69000000e-01
- 7.70000000e-01 -2.97721660e-07 7.70000000e-01 7.70000000e-01
- 7.71000000e-01 -3.02833688e-07 7.71000000e-01 7.71000000e-01
- 7.72000000e-01 -3.08030053e-07 7.72000000e-01 7.72000000e-01
- 7.73000000e-01 -3.13311974e-07 7.73000000e-01 7.73000000e-01
- 7.74000000e-01 -3.18680710e-07 7.74000000e-01 7.74000000e-01
- 7.75000000e-01 -3.24137468e-07 7.75000000e-01 7.75000000e-01
- 7.76000000e-01 -3.29683509e-07 7.76000000e-01 7.76000000e-01
- 7.77000000e-01 -3.35320078e-07 7.77000000e-01 7.77000000e-01
- 7.78000000e-01 -3.41048451e-07 7.78000000e-01 7.78000000e-01
- 7.79000000e-01 -3.46869908e-07 7.79000000e-01 7.79000000e-01
- 7.80000000e-01 -3.52785731e-07 7.80000000e-01 7.80000000e-01
- 7.81000000e-01 -3.58797218e-07 7.81000000e-01 7.81000000e-01
- 7.82000000e-01 -3.64905663e-07 7.82000000e-01 7.82000000e-01
- 7.83000000e-01 -3.71112381e-07 7.83000000e-01 7.83000000e-01
- 7.84000000e-01 -3.77418703e-07 7.84000000e-01 7.84000000e-01
- 7.85000000e-01 -3.83825919e-07 7.85000000e-01 7.85000000e-01
- 7.86000000e-01 -3.90335390e-07 7.86000000e-01 7.86000000e-01
- 7.87000000e-01 -3.96948455e-07 7.87000000e-01 7.87000000e-01
- 7.88000000e-01 -4.03666461e-07 7.88000000e-01 7.88000000e-01
- 7.89000000e-01 -4.10490750e-07 7.89000000e-01 7.89000000e-01
- 7.90000000e-01 -4.17422681e-07 7.90000000e-01 7.90000000e-01
- 7.91000000e-01 -4.24463629e-07 7.91000000e-01 7.91000000e-01
- 7.92000000e-01 -4.31614946e-07 7.92000000e-01 7.92000000e-01
- 7.93000000e-01 -4.38878017e-07 7.93000000e-01 7.93000000e-01
- 7.94000000e-01 -4.46254218e-07 7.94000000e-01 7.94000000e-01
- 7.95000000e-01 -4.53744916e-07 7.95000000e-01 7.95000000e-01
- 7.96000000e-01 -4.61351506e-07 7.96000000e-01 7.96000000e-01
- 7.97000000e-01 -4.69075369e-07 7.97000000e-01 7.97000000e-01
- 7.98000000e-01 -4.76917893e-07 7.98000000e-01 7.98000000e-01
- 7.99000000e-01 -4.84880471e-07 7.99000000e-01 7.99000000e-01
- 8.00000000e-01 -4.92964482e-07 8.00000000e-01 8.00000000e-01
diff --git a/xschem/threshold_test_tb.spice b/xschem/threshold_test_tb.spice
deleted file mode 100644
index 9543330..0000000
--- a/xschem/threshold_test_tb.spice
+++ /dev/null
@@ -1,47 +0,0 @@
-*---------------------------------------------------------------------------
-* SPDX-FileCopyrightText: 2020 Efabless Corporation
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* https://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*
-* SPDX-License-Identifier: Apache-2.0
-*---------------------------------------------------------------------------
-* Threshold test for POR circuit
-* Determine gate voltage at which the HV NFET draws 240nA nominal
-*
-* Result: 0.7575V
-*-------------------------------------------------------------------
-
-.param mc_mm_switch=0
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-
-*----------------------------
-* Testbench circuit
-*----------------------------
-Rtest vdda mir1 1MEG
-Xm1 mir1 vin vss vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8
-
-Vgate vin vss DC=0
-Vpwr vdda vss DC=3.3
-Rgnd vss 0 0.1
-
-*----------------------------
-* Testbench control
-*----------------------------
-.control
-* DC sweep from 0.7 to 0.8V
-dc Vgate 0.7 0.8 0.001
-wrdata test.data Vpwr#branch vin
-
-.endc
-
-.end
-
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
deleted file mode 100644
index e0da610..0000000
--- a/xschem/user_analog_project_wrapper.sch
+++ /dev/null
@@ -1,70 +0,0 @@
-v {xschem version=2.9.9 file_version=1.2 }
-G {}
-K {}
-V {}
-S {}
-E {}
-N 3830 -460 3830 -390 { lab=vdda1}
-N 3730 -460 3830 -460 { lab=vdda1}
-N 3860 -230 3860 -180 { lab=vssa1}
-N 3770 -180 3860 -180 { lab=vssa1}
-N 3890 -460 3890 -390 { lab=vccd1}
-N 3890 -460 3960 -460 { lab=vccd1}
-N 3890 -130 3890 -60 { lab=vccd1}
-N 3890 -130 3950 -130 { lab=vccd1}
-N 3830 -130 3830 -60 { lab=io_analog[4]}
-N 3790 -130 3830 -130 { lab=io_analog[4]}
-N 3860 100 3860 150 { lab=vssa1}
-N 3800 150 3860 150 { lab=vssa1}
-N 4010 -10 4110 -10 { lab=gpio_analog[7]}
-N 4010 20 4110 20 { lab=io_out[15]}
-N 4010 50 4110 50 { lab=io_out[16]}
-N 4010 -340 4130 -340 { lab=gpio_analog[3]}
-N 4010 -310 4130 -310 { lab=io_out[11]}
-N 4010 -280 4130 -280 { lab=io_out[12]}
-C {example_por.sym} 3860 -310 0 0 {name=x1}
-C {example_por.sym} 3860 20 0 0 {name=x2}
-C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1}
-C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2}
-C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1}
-C {devices/iopin.sym} 3240 -380 0 0 {name=p4 lab=vssa2}
-C {devices/iopin.sym} 3240 -350 0 0 {name=p5 lab=vccd1}
-C {devices/iopin.sym} 3240 -320 0 0 {name=p6 lab=vccd2}
-C {devices/iopin.sym} 3240 -290 0 0 {name=p7 lab=vssd1}
-C {devices/iopin.sym} 3240 -260 0 0 {name=p8 lab=vssd2}
-C {devices/ipin.sym} 3290 -190 0 0 {name=p9 lab=wb_clk_i}
-C {devices/ipin.sym} 3290 -160 0 0 {name=p10 lab=wb_rst_i}
-C {devices/ipin.sym} 3290 -130 0 0 {name=p11 lab=wbs_stb_i}
-C {devices/ipin.sym} 3290 -100 0 0 {name=p12 lab=wbs_cyc_i}
-C {devices/ipin.sym} 3290 -70 0 0 {name=p13 lab=wbs_we_i}
-C {devices/ipin.sym} 3290 -40 0 0 {name=p14 lab=wbs_sel_i[3:0]}
-C {devices/ipin.sym} 3290 -10 0 0 {name=p15 lab=wbs_dat_i[31:0]}
-C {devices/ipin.sym} 3290 20 0 0 {name=p16 lab=wbs_adr_i[31:0]}
-C {devices/opin.sym} 3280 80 0 0 {name=p17 lab=wbs_ack_o}
-C {devices/opin.sym} 3280 110 0 0 {name=p18 lab=wbs_dat_o[31:0]}
-C {devices/ipin.sym} 3290 150 0 0 {name=p19 lab=la_data_in[127:0]}
-C {devices/opin.sym} 3280 180 0 0 {name=p20 lab=la_data_out[127:0]}
-C {devices/ipin.sym} 3290 260 0 0 {name=p21 lab=io_in[26:0]}
-C {devices/ipin.sym} 3290 290 0 0 {name=p22 lab=io_in_3v3[26:0]}
-C {devices/ipin.sym} 3280 570 0 0 {name=p23 lab=user_clock2}
-C {devices/opin.sym} 3280 320 0 0 {name=p24 lab=io_out[26:0]}
-C {devices/opin.sym} 3280 350 0 0 {name=p25 lab=io_oeb[26:0]}
-C {devices/iopin.sym} 3250 410 0 0 {name=p26 lab=gpio_analog[17:0]}
-C {devices/iopin.sym} 3250 440 0 0 {name=p27 lab=gpio_noesd[17:0]}
-C {devices/iopin.sym} 3250 470 0 0 {name=p29 lab=io_analog[10:0]}
-C {devices/iopin.sym} 3250 500 0 0 {name=p30 lab=io_clamp_high[2:0]}
-C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]}
-C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]}
-C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]}
-C {devices/lab_pin.sym} 3730 -460 0 0 {name=l1 sig_type=std_logic lab=vdda1}
-C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1}
-C {devices/lab_pin.sym} 3960 -460 0 1 {name=l3 sig_type=std_logic lab=vccd1}
-C {devices/lab_pin.sym} 3950 -130 0 1 {name=l4 sig_type=std_logic lab=vccd1}
-C {devices/lab_pin.sym} 3790 -130 0 0 {name=l5 sig_type=std_logic lab=io_analog[4]}
-C {devices/lab_pin.sym} 3800 150 0 0 {name=l6 sig_type=std_logic lab=vssa1}
-C {devices/lab_pin.sym} 4130 -340 0 1 {name=l7 sig_type=std_logic lab=gpio_analog[3]}
-C {devices/lab_pin.sym} 4130 -310 0 1 {name=l8 sig_type=std_logic lab=io_out[11]}
-C {devices/lab_pin.sym} 4130 -280 0 1 {name=l9 sig_type=std_logic lab=io_out[12]}
-C {devices/lab_pin.sym} 4110 -10 0 1 {name=l10 sig_type=std_logic lab=gpio_analog[7]}
-C {devices/lab_pin.sym} 4110 20 0 1 {name=l11 sig_type=std_logic lab=io_out[15]}
-C {devices/lab_pin.sym} 4110 50 0 1 {name=l12 sig_type=std_logic lab=io_out[16]}
diff --git a/xschem/user_analog_project_wrapper.spice b/xschem/user_analog_project_wrapper.spice
deleted file mode 100644
index 917d69e..0000000
--- a/xschem/user_analog_project_wrapper.spice
+++ /dev/null
@@ -1,121 +0,0 @@
-**.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa1 vccd1 vccd2 vssd1 vssd2 wb_clk_i
-*+ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
-*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
-*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0] wbs_ack_o
-*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
-*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
-*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
-*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
-*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0] user_clock2
-*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
-*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
-*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
-*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
-*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0] io_clamp_high[2],io_clamp_high[1],io_clamp_high[0] io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
-*+ user_irq[2],user_irq[1],user_irq[0]
-*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
-*.iopin vdda1
-*.iopin vdda2
-*.iopin vssa1
-*.iopin vssa1
-*.iopin vccd1
-*.iopin vccd2
-*.iopin vssd1
-*.iopin vssd2
-*.ipin wb_clk_i
-*.ipin wb_rst_i
-*.ipin wbs_stb_i
-*.ipin wbs_cyc_i
-*.ipin wbs_we_i
-*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
-*.ipin
-*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
-*.ipin
-*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
-*.opin wbs_ack_o
-*.opin
-*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
-*.ipin
-*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
-*.opin
-*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
-*.ipin
-*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
-*.ipin
-*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
-*.ipin user_clock2
-*.opin
-*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
-*.opin
-*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
-*.iopin
-*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
-*.iopin
-*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
-*.iopin
-*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
-*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
-*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
-*.opin user_irq[2],user_irq[1],user_irq[0]
-*.ipin
-*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
-x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
-x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
-**.ends
-
-* expanding symbol: example_por.sym # of pins=6
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
-.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
-*.iopin vdd3v3
-*.iopin vss
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-*.iopin vdd1v8
-XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
-XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
-XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=500 mult=1 m=1
-XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=150 mult=1 m=1
-XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=25 mult=2 m=2
-x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
-x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
-x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
-x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
-.ends
-
-** flattened .save nodes
-.end
diff --git a/xschem/user_analog_project_wrapper.sym b/xschem/user_analog_project_wrapper.sym
deleted file mode 100644
index a561ba9..0000000
--- a/xschem/user_analog_project_wrapper.sym
+++ /dev/null
@@ -1,111 +0,0 @@
-v {xschem version=2.9.9 file_version=1.2 }
-G {}
-K {type=subcircuit
-format="@name @pinlist @symname"
-template="name=x1"
-}
-V {}
-S {}
-E {}
-L 4 -130 -190 130 -190 {}
-L 4 -130 190 130 190 {}
-L 4 -130 -190 -130 190 {}
-L 4 130 -190 130 190 {}
-L 4 -150 -180 -130 -180 {}
-L 4 -150 -160 -130 -160 {}
-L 4 -150 -140 -130 -140 {}
-L 4 -150 -120 -130 -120 {}
-L 4 -150 -100 -130 -100 {}
-L 4 -150 -80 -130 -80 {}
-L 4 -150 -60 -130 -60 {}
-L 4 -150 -40 -130 -40 {}
-L 4 130 -20 150 -20 {}
-L 4 130 0 150 0 {}
-L 4 -150 -20 -130 -20 {}
-L 4 130 20 150 20 {}
-L 4 -150 0 -130 0 {}
-L 4 -150 20 -130 20 {}
-L 4 -150 40 -130 40 {}
-L 4 130 40 150 40 {}
-L 4 130 60 150 60 {}
-L 4 -150 60 -130 60 {}
-L 4 130 180 150 180 {}
-L 7 130 -180 150 -180 {}
-L 7 130 -160 150 -160 {}
-L 7 130 -140 150 -140 {}
-L 7 130 -120 150 -120 {}
-L 7 130 -100 150 -100 {}
-L 7 130 -80 150 -80 {}
-L 7 130 -60 150 -60 {}
-L 7 130 -40 150 -40 {}
-L 7 130 80 150 80 {}
-L 7 130 100 150 100 {}
-L 7 130 120 150 120 {}
-L 7 130 140 150 140 {}
-L 7 130 160 150 160 {}
-B 5 147.5 -182.5 152.5 -177.5 {name=vdda1 dir=inout }
-B 5 147.5 -162.5 152.5 -157.5 {name=vdda2 dir=inout }
-B 5 147.5 -142.5 152.5 -137.5 {name=vssa1 dir=inout }
-B 5 147.5 -122.5 152.5 -117.5 {name=vssa2 dir=inout }
-B 5 147.5 -102.5 152.5 -97.5 {name=vccd1 dir=inout }
-B 5 147.5 -82.5 152.5 -77.5 {name=vccd2 dir=inout }
-B 5 147.5 -62.5 152.5 -57.5 {name=vssd1 dir=inout }
-B 5 147.5 -42.5 152.5 -37.5 {name=vssd2 dir=inout }
-B 5 -152.5 -182.5 -147.5 -177.5 {name=wb_clk_i dir=in }
-B 5 -152.5 -162.5 -147.5 -157.5 {name=wb_rst_i dir=in }
-B 5 -152.5 -142.5 -147.5 -137.5 {name=wbs_stb_i dir=in }
-B 5 -152.5 -122.5 -147.5 -117.5 {name=wbs_cyc_i dir=in }
-B 5 -152.5 -102.5 -147.5 -97.5 {name=wbs_we_i dir=in }
-B 5 -152.5 -82.5 -147.5 -77.5 {name=wbs_sel_i[3:0] dir=in }
-B 5 -152.5 -62.5 -147.5 -57.5 {name=wbs_dat_i[31:0] dir=in }
-B 5 -152.5 -42.5 -147.5 -37.5 {name=wbs_adr_i[31:0] dir=in }
-B 5 147.5 -22.5 152.5 -17.5 {name=wbs_ack_o dir=out }
-B 5 147.5 -2.5 152.5 2.5 {name=wbs_dat_o[31:0] dir=out }
-B 5 -152.5 -22.5 -147.5 -17.5 {name=la_data_in[127:0] dir=in }
-B 5 147.5 17.5 152.5 22.5 {name=la_data_out[127:0] dir=out }
-B 5 -152.5 -2.5 -147.5 2.5 {name=la_oenb[127:0] dir=in }
-B 5 -152.5 17.5 -147.5 22.5 {name=io_in[26:0] dir=in }
-B 5 -152.5 37.5 -147.5 42.5 {name=io_in_3v3[26:0] dir=in }
-B 5 147.5 37.5 152.5 42.5 {name=io_out[26:0] dir=out }
-B 5 147.5 57.5 152.5 62.5 {name=io_oeb[26:0] dir=out }
-B 5 147.5 77.5 152.5 82.5 {name=gpio_analog[17:0] dir=inout }
-B 5 147.5 97.5 152.5 102.5 {name=gpio_noesd[17:0] dir=inout }
-B 5 147.5 117.5 152.5 122.5 {name=io_analog[10:0] dir=inout }
-B 5 147.5 137.5 152.5 142.5 {name=io_clamp_high[2:0] dir=inout }
-B 5 147.5 157.5 152.5 162.5 {name=io_clamp_low[2:0] dir=inout }
-B 5 -152.5 57.5 -147.5 62.5 {name=user_clock2 dir=in }
-B 5 147.5 177.5 152.5 182.5 {name=user_irq[2:0] dir=out }
-T {@symname} -119.5 114 0 0 0.3 0.3 {}
-T {@name} 135 -202 0 0 0.2 0.2 {}
-T {vdda1} 125 -184 0 1 0.2 0.2 {}
-T {vdda2} 125 -164 0 1 0.2 0.2 {}
-T {vssa1} 125 -144 0 1 0.2 0.2 {}
-T {vssa2} 125 -124 0 1 0.2 0.2 {}
-T {vccd1} 125 -104 0 1 0.2 0.2 {}
-T {vccd2} 125 -84 0 1 0.2 0.2 {}
-T {vssd1} 125 -64 0 1 0.2 0.2 {}
-T {vssd2} 125 -44 0 1 0.2 0.2 {}
-T {wb_clk_i} -125 -184 0 0 0.2 0.2 {}
-T {wb_rst_i} -125 -164 0 0 0.2 0.2 {}
-T {wbs_stb_i} -125 -144 0 0 0.2 0.2 {}
-T {wbs_cyc_i} -125 -124 0 0 0.2 0.2 {}
-T {wbs_we_i} -125 -104 0 0 0.2 0.2 {}
-T {wbs_sel_i[3:0]} -125 -84 0 0 0.2 0.2 {}
-T {wbs_dat_i[31:0]} -125 -64 0 0 0.2 0.2 {}
-T {wbs_adr_i[31:0]} -125 -44 0 0 0.2 0.2 {}
-T {wbs_ack_o} 125 -24 0 1 0.2 0.2 {}
-T {wbs_dat_o[31:0]} 125 -4 0 1 0.2 0.2 {}
-T {la_data_in[127:0]} -125 -24 0 0 0.2 0.2 {}
-T {la_data_out[127:0]} 125 16 0 1 0.2 0.2 {}
-T {la_oenb[127:0]} -125 -4 0 0 0.2 0.2 {}
-T {io_in[26:0]} -125 16 0 0 0.2 0.2 {}
-T {io_in_3v3[26:0]} -125 36 0 0 0.2 0.2 {}
-T {io_out[26:0]} 125 36 0 1 0.2 0.2 {}
-T {io_oeb[26:0]} 125 56 0 1 0.2 0.2 {}
-T {gpio_analog[17:0]} 125 76 0 1 0.2 0.2 {}
-T {gpio_noesd[17:0]} 125 96 0 1 0.2 0.2 {}
-T {io_analog[10:0]} 125 116 0 1 0.2 0.2 {}
-T {io_clamp_high[2:0]} 125 136 0 1 0.2 0.2 {}
-T {io_clamp_low[2:0]} 125 156 0 1 0.2 0.2 {}
-T {user_clock2} -125 56 0 0 0.2 0.2 {}
-T {user_irq[2:0]} 125 176 0 1 0.2 0.2 {}
diff --git a/xschem/xschemrc b/xschem/xschemrc
deleted file mode 100644
index 98fead5..0000000
--- a/xschem/xschemrc
+++ /dev/null
@@ -1,273 +0,0 @@
-#### xschemrc system configuration file
-
-#### values may be overridden by user's ~/.xschem/xschemrc configuration file
-#### or by project-local ./xschemrc
-
-###########################################################################
-#### XSCHEM INSTALLATION DIRECTORY: XSCHEM_SHAREDIR
-###########################################################################
-#### Normally there is no reason to set this variable if using standard
-#### installation. Location of files is set at compile time but may be overridden
-#### with following line:
-# set XSCHEM_SHAREDIR $env(HOME)/share/xschem
-
-###########################################################################
-#### XSCHEM SYSTEM-WIDE DESIGN LIBRARY PATHS: XSCHEM_LIBRARY_PATH
-###########################################################################
-#### If unset xschem starts with XSCHEM_LIBRARY_PATH set to the default, typically:
-# /home/schippes/.xschem/xschem_library
-# /home/schippes/share/xschem/xschem_library/devices
-# /home/schippes/share/doc/xschem/examples
-# /home/schippes/share/doc/xschem/ngspice
-# /home/schippes/share/doc/xschem/logic
-# /home/schippes/share/doc/xschem/xschem_simulator
-# /home/schippes/share/doc/xschem/binto7seg
-# /home/schippes/share/doc/xschem/pcb
-# /home/schippes/share/doc/xschem/rom8k
-
-#### Flush any previous definition
-set XSCHEM_LIBRARY_PATH {}
-#### include devices/*.sym
-append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library
-#### include skywater libraries. Here i use [pwd]. This works if i start xschem from here.
-append XSCHEM_LIBRARY_PATH :$env(PWD)
-append XSCHEM_LIBRARY_PATH :/usr/share/pdk/sky130A/libs.tech/xschem
-#### add ~/.xschem/xschem_library (USER_CONF_DIR is normally ~/.xschem)
-append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library
-
-###########################################################################
-#### SET CUSTOM COLORS FOR XSCHEM LIBRARIES MATCHING CERTAIN PATTERNS
-###########################################################################
-#### each line contains a dircolor(pattern) followed by a color
-#### color can be an ordinary name (grey, brown, blue) or a hex code {#77aaff}
-#### hex code must be enclosed in braces
-array unset dircolor
-set dircolor(sky130_fd_pr$) blue
-set dircolor(sky130_tests$) blue
-set dircolor(xschem_sky130$) blue
-set dircolor(xschem_library$) red
-set dircolor(devices$) red
-
-###########################################################################
-#### WINDOW TO OPEN ON STARTUP: XSCHEM_START_WINDOW
-###########################################################################
-#### Start without a design if no filename given on command line:
-#### To avoid absolute paths, use a path that is relative to one of the
-#### XSCHEM_LIBRARY_PATH directories. Default: empty
-set XSCHEM_START_WINDOW {sky130_tests/top.sch}
-
-###########################################################################
-#### DIRECTORY WHERE SIMULATIONS, NETLIST AND SIMULATOR OUTPUTS ARE PLACED
-###########################################################################
-#### If unset $USER_CONF_DIR/simulations is assumed (normally ~/.xschem/simulations)
-# set netlist_dir $env(HOME)/.xschem/simulations
-set netlist_dir .
-
-###########################################################################
-#### CHANGE DEFAULT [] WITH SOME OTHER CHARACTERS FOR BUSSED SIGNALS
-#### IN SPICE NETLISTS (EXAMPLE: DATA[7] --> DATA<7>)
-###########################################################################
-#### default: empty (use xschem default, [ ])
-# set bus_replacement_char {<>}
-#### for XSPICE: replace square brackets as the are used for XSPICE vector nodes.
-# set bus_replacement_char {__}
-
-###########################################################################
-#### SOME DEFAULT BEHAVIOR
-###########################################################################
-#### Allowed values: spice, verilog, vhdl, tedax, default: spice
-# set netlist_type spice
-
-#### Some netlisting options (these are the defaults)
-# set hspice_netlist 1
-# set verilog_2001 1
-
-#### to use a fixed line with set change_lw to 0 and set some value to line_width
-#### these are the defaults
-# set line_width 0
-# set change_lw 1
-
-#### allow color postscript and svg exports. Default: 1, enable color
-# set color_ps 1
-
-#### initial size of xschem window you can specify also position with (wxh+x+y)
-#### this is the default:
-# set initial_geometry {900x600}
-
-#### if set to 0, when zooming out allow the viewport do drift toward the mouse position,
-#### allowing to move away by zooming / unzooming with mouse wheel
-#### default setting: 0
-# set unzoom_nodrift 0
-
-#### if set to 1 allow to place multiple components with same name.
-#### Warning: this is normally not allowed in any simulation netlist.
-#### default: 0, do not allow place multiple elements with same name (refdes)
-# set disable_unique_names 0
-
-#### if set to 1 continue drawing lines / wires after click
-#### default: 0
-# set persistent_command 1
-
-#### if set to 1 automatically join/trim wires while editing
-#### this may slow down on rally big designs. Can be disabled via menu
-#### default: 0
-# set autotrim_wires 0
-
-#### set widget scaling (mainly for font display), this is useful on 4K displays
-#### default: unset (tk uses its default) > 1.0 ==> bigger
-# set tk_scaling 1.7
-
-#### disable some symbol layers. Default: none, all layers are visible.
-# set enable_layer(5) 0 ;# example to disable pin red boxes
-
-#### enable to scale grid point size as done with lines at close zoom, default: 0
-# set big_grid_points 0
-
-###########################################################################
-#### EXPORT FORMAT TRANSLATORS, PNG AND PDF
-###########################################################################
-#### command to translate xpm to png; (assumes command takes source
-#### and dest file as arguments, example: gm convert plot.xpm plot.png)
-#### default: {gm convert}
-# set to_png {gm convert}
-
-#### command to translate ps to pdf; (assumes command takes source
-#### and dest file as arguments, example: ps2pdf plot.ps plot.pdf)
-#### default: ps2pdf
-# set to_pdf ps2pdf
-
-###########################################################################
-#### CUSTOM GRID / SNAP VALUE SETTINGS
-###########################################################################
-#### Warning: changing these values will likely break compatibility
-#### with existing symbol libraries. Defaults: grid 20, snap 10.
-# set grid 20
-# set snap 10
-
-###########################################################################
-#### CUSTOM COLORS MAY BE DEFINED HERE
-###########################################################################
-# set cadlayers 22
-# set light_colors {
-# "#ffffff" "#0044ee" "#aaaaaa" "#222222" "#229900"
-# "#bb2200" "#00ccee" "#ff0000" "#888800" "#00aaaa"
-# "#880088" "#00ff00" "#0000cc" "#666600" "#557755"
-# "#aa2222" "#7ccc40" "#00ffcc" "#ce0097" "#d2d46b"
-# "#ef6158" "#fdb200" }
-
-# set dark_colors {
-# "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00"
-# "#bb2200" "#00ccee" "#ff0000" "#ffff00" "#ffffff"
-# "#ff00ff" "#00ff00" "#0000cc" "#aaaa00" "#aaccaa"
-# "#ff7777" "#bfff81" "#00ffcc" "#ce0097" "#d2d46b"
-# "#ef6158" "#fdb200" }
-
-###########################################################################
-#### CAIRO STUFF
-###########################################################################
-#### Scale all fonts by this number
-# set cairo_font_scale 1.0
-
-#### default for following two is 0.85 (xscale) and 0.88 (yscale) to
-#### match cairo font spacing
-# set nocairo_font_xscale 1.0
-#### set nocairo_font_yscale 1.0
-
-#### Scale line spacing by this number
-# set cairo_font_line_spacing 1.0
-
-#### Specify a font
-# set cairo_font_name {Sans-Serif}
-# set svg_font_name {Sans-Serif}
-
-#### Lift up text by some zoom-corrected pixels for
-#### better compatibility wrt no cairo version.
-#### Useful values in the range [-1, 3]
-# set cairo_vert_correct 0
-# set nocairo_vert_correct 0
-
-###########################################################################
-#### KEYBINDINGS
-###########################################################################
-#### General format for specifying a replacement for a keybind
-#### Replace Ctrl-d with Escape (so you wont kill the program)
-# set replace_key(Control-d) Escape
-
-#### swap w and W keybinds; Always specify Shift for capital letters
-# set replace_key(Shift-W) w
-# set replace_key(w) Shift-W
-
-###########################################################################
-#### TERMINAL
-###########################################################################
-#### default for linux: xterm
-# set terminal {xterm -geometry 100x35 -fn 9x15 -bg black -fg white -cr white -ms white }
-#### lxterminal is not OK since it will not inherit env vars:
-#### In order to reduce memory usage and increase the performance, all instances
-#### of the lxterminal are sharing a single process. LXTerminal is part of LXDE
-
-###########################################################################
-#### EDITOR
-###########################################################################
-#### editor must not detach from launching shell (-f mandatory for gvim)
-#### default for linux: gvim -f
-# set editor {gvim -f -geometry 90x28}
-# set editor { xterm -geometry 100x40 -e nano }
-# set editor { xterm -geometry 100x40 -e pico }
-
-#### For Windows
-# set editor {notepad.exe}
-
-###########################################################################
-#### SHOW ERC INFO WINDOW (erc errors, warnings etc)
-###########################################################################
-#### default: 0 (can be enabled by menu)
-# set show_infowindow 0
-
-###########################################################################
-#### CONFIGURE COMPUTER FARM JOB REDIRECTORS FOR SIMULATIONS
-###########################################################################
-#### RTDA NC
-# set computerfarm {nc run -Il}
-#### LSF BSUB
-# set computerfarm {bsub -Is}
-
-###########################################################################
-#### TCP CONNECTION WITH GAW
-###########################################################################
-#### set gaw address for socket connection: {host port}
-#### default: set to localhost, port 2020
-# set gaw_tcp_address {localhost 2020}
-
-###########################################################################
-#### XSCHEM LISTEN TO TCP PORT
-###########################################################################
-#### set xschem listening port; default: not enabled
-# set xschem_listen_port 2021
-
-###########################################################################
-#### UTILE SPICE STIMULI DESCRIPTION LANGUAGE AND TRANSLATOR
-###########################################################################
-#### default paths are set as shown here:
-# set utile_gui_path ${XSCHEM_SHAREDIR}/utile/utile3
-# set utile_cmd_path ${XSCHEM_SHAREDIR}/utile/utile
-
-###########################################################################
-#### TCL FILES TO LOAD AT STARTUP
-###########################################################################
-#### list of tcl files to preload.
-# lappend tcl_files ${XSCHEM_SHAREDIR}/change_index.tcl
-lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl
-lappend tcl_files /usr/share/pdk/sky130A/libs.tech/xschem/scripts/sky130_models.tcl
-###########################################################################
-#### XSCHEM TOOLBAR
-###########################################################################
-#### default: not enabled.
-# set toolbar_visible 1
-# set toolbar_horiz 1
-
-###########################################################################
-#### SKYWATER PDK SPECIFIC VARIABLES
-###########################################################################
-set SKYWATER_MODELS ~/skywater-pdk/libraries/sky130_fd_pr_ngspice/latest
-set SKYWATER_STDCELLS ~/skywater-pdk/libraries/sky130_fd_sc_hd/latest
