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foss-eda-tools / third_party / shuttle / sky130 / mpw-002 / slot-001 / 260fe514076c5feb61b4eaf66e6616677b662749 / verilog
  1. e02abe8 final gds & signoff results by Jeff DiCorpo · 3 years, 3 months ago
  2. 9f51f8f final gds & signoff results by Jeff DiCorpo · 3 years, 3 months ago
  3. eb62028 final gds & signoff results by Jeff DiCorpo · 3 years, 8 months ago
  4. c8b6da3 use delay 2 synth strategy by Pu Wang · 3 years, 9 months ago
  5. 3953c76 add readme and set time period 17ns by Pu Wang · 3 years, 9 months ago
  6. e0eab35 sdram state counter fix by Pu Wang · 3 years, 9 months ago
  7. 69d308d dma sdram by Pu Wang · 3 years, 9 months ago
  8. 6fe7e07 mem depth 256 by Pu Wang · 3 years, 9 months ago
  9. c5ffe37 axi-dma initial commit by Pu Wang · 3 years, 10 months ago
  10. a2ff3b4 [DATA] Update views by manarabdelaty · 3 years, 11 months ago
  11. ef957a6 Updated the documentation to reflect the changes made to the source by Tim Edwards · 3 years, 11 months ago
  12. c89cfac Update to coincide with the most recent commit to the caravel by Tim Edwards · 3 years, 11 months ago
  13. 401a14d Fix syntax error by manarabdelaty · 3 years, 11 months ago
  14. 694bfd3 Added the 3 user IRQ lines to the project wrapper and zeroed them by Tim Edwards · 3 years, 11 months ago
  15. 609ec98 [DATA] Update views by manarabdelaty · 3 years, 11 months ago
  16. 340cc4a Update full chip simulation to run from root by manarabdelaty · 3 years, 11 months ago
  17. 4bbff2e Update README.md by Manar · 3 years, 11 months ago
  18. b41301c Added top level makefile by manarabdelaty · 3 years, 11 months ago
  19. 22f3cd0 Submodule caravel-lite by manarabdelaty · 3 years, 11 months ago
  20. c0f458a Update DV Makefile by manarabdelaty · 3 years, 11 months ago
  21. eac56e8 Rename CARAVEL_MASTER -> CARAVEL_ROOT by manarabdelaty · 4 years ago
  22. 191408b Add SPDX header by manarabdelaty · 4 years ago
  23. 8dbabc1 Update DV Makefiles by manarabdelaty · 4 years ago
  24. 8e8bf63 Update la_test2 Makefile by manarabdelaty · 4 years ago
  25. 496112a Add CARAVEL_PATH for the testbenches by manarabdelaty · 4 years ago
  26. f989c64 Corrected the user_project_wrapper verilog to have the correct by Tim Edwards · 4 years ago
  27. a7929f3 Added mprj_stimulus test by manarabdelaty · 4 years ago
  28. d184bf6 Update wb_port dv makefile by manarabdelaty · 4 years ago
  29. 3e3151b [DATA] update views to reflect rtl change by manarabdelaty · 4 years ago
  30. a63e2e6 Makefile and RTL updates to run GL sim by manarabdelaty · 4 years ago
  31. 10b3a10 Update README.md by Manar · 4 years ago
  32. fa36b99 Merge branch 'main' of https://github.com/efabless/caravel_project_example into main by manarabdelaty · 4 years ago
  33. 69bd326 Updated DV tests by manarabdelaty · 4 years ago
  34. 548e5a7 [DATA] Adjust user_proj_example/config.tcl by Ahmed Ghazy · 4 years ago
  35. d4ec2f0 Example of a full run of user_project_wrapper by Ahmed Ghazy · 4 years ago