tree: 8c6f1eb6f8a4585433bd9efdf71d89f631815641 [path history] [tgz]
  1. def/
  2. docs/
  3. gds/
  4. lef/
  5. macros/
  6. mag/
  7. maglef/
  8. ngspice/
  9. OpenFPGA_task/
  10. openlane/
  11. qflow/
  12. scripts/
  13. signoff/
  14. spi/
  15. utils/
  16. verilog/
  17. info.yaml
  18. LICENSE
  19. Makefile
  20. Makefile.master
  21. manifest
  22. mpw-one-b.md
  23. README.md
  24. source_commit_hash.txt
README.md

Caravel-QLSOFA-HD

Highlights

  • Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
  • Designed with Skywater130nm PDK with HD standard cell library + and Custom Transmission Gate Cells
  • Base K4 architecture from VPR with 60 vertical and horizontal channels
  • Soft adder implementation
  • Designed using commercial PnR tool

Contribution

NOTE

  • This repository is created for The eFabless Open MPW shuttle program submission
  • The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel