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foss-eda-tools/third_party/shuttle/sky130/mpw-001/slot-039/bc2e15e5771662533c6ea9638e016cddc1310abf
commit
bc2e15e5771662533c6ea9638e016cddc1310abf
[log] [tgz]
author
Ganesh Gore <goreganesh007@gmail.com>
Wed Jan 20 11:19:13 2021 -0700
committer
Ganesh Gore <goreganesh007@gmail.com>
Wed Jan 20 11:19:13 2021 -0700
tree
d87d2dc8c8c0d3fe83abfda22885eb5237238fb2
parent
071773bb9a82e305753454321f9fa11d3c24bb23 [diff]
Updated project name in info.yaml
1 file changed
tree: d87d2dc8c8c0d3fe83abfda22885eb5237238fb2
  1. checks/
  2. def/
  3. doc/
  4. gds/
  5. lef/
  6. macros/
  7. mag/
  8. maglef/
  9. ngspice/
  10. OpenFPGA_task/
  11. openlane/
  12. qflow/
  13. scripts/
  14. spi/
  15. utils/
  16. verilog/
  17. info.yaml
  18. LICENSE
  19. Makefile
  20. mpw-one-b.md
  21. README.md
  22. source_commit_hash.txt
README.md

Caravel-QLSOFA-HD

Highlights

  • Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
  • Designed with Skywater130nm PDK with HD standard cell library + and Custom Transmission Gate Cells
  • Base K4 architecture from VPR with 60 vertical and horizontal channels
  • Soft adder implementation
  • Designed using commercial PnR tool

Contribution

NOTE

  • This repository is created for The eFabless Open MPW shuttle program submission
  • The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel