blob: 7aaa6ce2d2e33f914fb5c087f96fa0959cf60af9 [file] [log] [blame]
---
project:
description: "Analog & RF designs"
foundry: "SkyWater"
git_url: "https://github.com/affanabbasi/G_Skywater130nm_1stTO.git"
organization: "Self"
organization_url: "https://www.linkedin.com/in/affanabbasi/"
owner: "Affan Abbasi"
process: "SKY130"
project_name: "Analog_RF_MPW"
tags:
- "Open MPW"
- "Test Harness"
category: "Test Harness"
top_level_netlist: "verilog/rtl/caravel.v"
user_level_netlist: "verilog/gl/user_project_wrapper.v"
version: "1.00"
cover_image: "doc/BlockDiagram.png"