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foss-eda-tools/third_party/shuttle/sky130/mpw-001/slot-036/eb79cec8336bc05b75681b76ab13ed39e5355a76^!/.
commit
eb79cec8336bc05b75681b76ab13ed39e5355a76
[log]
author
Jeff DiCorpo <jeffdi@efabless.com>
Fri Jun 11 08:53:04 2021 -0700
committer
Jeff DiCorpo <jeffdi@efabless.com>
Fri Jun 11 08:53:04 2021 -0700
tree
92454db603d5415ac78429ec3999de4bafcc6c8c
parent
87de6cfcebfd94b7f104bb791be6a33ea0194ba6 [diff]
caravel_fix

diff --git a/gds/caravel_00010024.gds.gz b/gds/caravel_00010024.gds.gz
index 0e0cf62..c16c480 100644
--- a/gds/caravel_00010024.gds.gz
+++ b/gds/caravel_00010024.gds.gz
Binary files differ

diff --git a/gds/caravel_00010024_b.gds.gz b/gds/caravel_00010024_b.gds.gz
new file mode 100644
index 0000000..dca4e8a
--- /dev/null
+++ b/gds/caravel_00010024_b.gds.gz
Binary files differ

diff --git a/signoff/caravel_fix b/signoff/caravel_fix
new file mode 100644
index 0000000..2174e5b
--- /dev/null
+++ b/signoff/caravel_fix

@@ -0,0 +1 @@
+4c2cca7fa739cdcf45e9270b3053e048848c05b8  ./gds/caravel_00010024_b.gds

diff --git a/signoff/caravel_fix_xor.out b/signoff/caravel_fix_xor.out
new file mode 100644
index 0000000..2acce76
--- /dev/null
+++ b/signoff/caravel_fix_xor.out

@@ -0,0 +1,673 @@
+First Layout: ./gds/caravel_00010024.gds
+Second Layout: ./gds/caravel_00010024_b.gds
+Design Name: caravel_00010024
+Output GDS will be: ./gds/caravel_00010024_fix_xor.gds
+Reading ./gds/caravel_00010024.gds ..
+Reading ./gds/caravel_00010024_b.gds ..
+--- Running XOR for 105/52 ---
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+Elapsed: 0.010s
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+"_output" in: xor.drc:41
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+--- Running XOR for 107/24 ---
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+"^" in: xor.drc:38
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+"_output" in: xor.drc:41
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+--- Running XOR for 11/0 ---
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+--- Running XOR for 112/4 ---
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+--- Running XOR for 122/16 ---
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+--- Running XOR for 125/20 ---
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+--- Running XOR for 20/0 ---
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+Elapsed: 0.030s
+XOR differences: 0
+"_output" in: xor.drc:41
+Elapsed: 0.000s
+--- Running XOR for 66/15 ---
+"_input" in: xor.drc:38
+Elapsed: 0.010s
+"_input" in: xor.drc:38
+Elapsed: 0.000s
+"^" in: xor.drc:38
+Elapsed: 5.160s
+XOR differences: 0
+"_output" in: xor.drc:41
+Elapsed: 0.010s
+--- Running XOR for 66/16 ---
+"_input" in: xor.drc:38
+Elapsed: 0.000s
+"_input" in: xor.drc:38
+Elapsed: 0.010s
+"^" in: xor.drc:38
+Elapsed: 0.210s
+XOR differences: 0
+"_output" in: xor.drc:41
+Elapsed: 0.000s
+--- Running XOR for 66/20 ---
+"_input" in: xor.drc:38
+Elapsed: 0.000s
+"_input" in: xor.drc:38
+Elapsed: 0.000s
+"^" in: xor.drc:38
+Elapsed: 293.270s
+XOR differences: 0
+"_output" in: xor.drc:41
+Elapsed: 0.010s
+--- Running XOR for 66/44 ---
+"_input" in: xor.drc:38
+Elapsed: 0.010s
+"_input" in: xor.drc:38
+Elapsed: 0.000s
+"^" in: xor.drc:38
+/usr/bin/xvfb-run: line 181: 26383 Killed                  DISPLAY=:$SERVERNUM XAUTHORITY=$AUTHFILE "$@" 2>&1

diff --git a/signoff/run_metal_fix.out b/signoff/run_metal_fix.out
new file mode 100644
index 0000000..9b172a2
--- /dev/null
+++ b/signoff/run_metal_fix.out

@@ -0,0 +1,65 @@
+Finding the prefix used for caravel subcells in the user GDS.
+User prefix is 0k_
+Replacing cell caravel in the user GDS file.
+Reading GDS file for alternate cell caravel
+Cell caravel found at position 235669746
+Cell caravel ends at position 247680056
+Reading GDS file for original source ./gds/caravel_00010024.gds
+Cell caravel found at position 2683887882
+Cell caravel ends at position 2695897734
+Cell caravel checksum is 12009824
+Info:  Structure caravel matches checksum 12009824
+Info:  Structure caravel at 2683887882 to 2695897734 will be replaced by alternate data.
+Prefixing caravel subcells in the user GDS
+Running:  /usr/share/pdk/bin/change_gds_string.py user_id_textblock 0k_user_id_textblock copyright_block 0k_copyright_block open_source 0k_open_source storage 0k_storage sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped 0k_sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped user_id_programming 0k_user_id_programming simple_por 0k_simple_por gpio_control_block 0k_gpio_control_block mgmt_core 0k_mgmt_core mgmt_protect 0k_mgmt_protect chip_io 0k_chip_io user_project_wrapper 0k_user_project_wrapper ./gds/caravel_00010024_b.gds -debug -verbatim
+Original data length = 2695898456
+Replaced b'open_source\x00' with b'0k_open_source'
+Replaced b'user_id_textblock\x00' with b'0k_user_id_textblock'
+Replaced b'copyright_block\x00' with b'0k_copyright_block'
+Replaced b'storage\x00' with b'0k_storage'
+Replaced b'sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped' with b'0k_sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped\x00'
+Replaced b'user_id_programming\x00' with b'0k_user_id_programming'
+Replaced b'simple_por' with b'0k_simple_por\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'mgmt_core\x00' with b'0k_mgmt_core'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'mgmt_protect' with b'0k_mgmt_protect\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'0k_gpio_control_block\x00'
+Replaced b'chip_io\x00' with b'0k_chip_io'
+Replaced b'user_project_wrapper' with b'0k_user_project_wrapper\x00'
+Finished.