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Ahmed Ghazya612abc2020-12-14 21:00:57 +02001VERSION 5.7 ;
2 NOWIREEXTENSIONATPIN ON ;
3 DIVIDERCHAR "/" ;
4 BUSBITCHARS "[]" ;
5MACRO mprj2_logic_high
6 CLASS BLOCK ;
7 FOREIGN mprj2_logic_high ;
8 ORIGIN 0.000 0.000 ;
9 SIZE 120.000 BY 15.000 ;
10 PIN HI
11 DIRECTION OUTPUT TRISTATE ;
12 USE SIGNAL ;
13 PORT
14 LAYER met3 ;
15 RECT 0.000 7.520 4.000 8.120 ;
16 END
17 END HI
18 PIN vccd2
19 DIRECTION INOUT ;
20 USE POWER ;
21 PORT
22 LAYER met2 ;
23 RECT 89.850 2.480 90.150 11.120 ;
24 END
25 END vccd2
26 PIN vccd2
27 DIRECTION INOUT ;
28 USE POWER ;
29 PORT
30 LAYER met2 ;
31 RECT 9.850 2.480 10.150 11.120 ;
32 END
33 END vccd2
34 PIN vccd2
35 DIRECTION INOUT ;
36 USE POWER ;
37 PORT
38 LAYER met3 ;
39 RECT 0.000 3.330 119.600 3.630 ;
40 END
41 END vccd2
42 PIN vssd2
43 DIRECTION INOUT ;
44 USE GROUND ;
45 PORT
46 LAYER met2 ;
47 RECT 49.850 2.480 50.150 11.120 ;
48 END
49 END vssd2
50 PIN vssd2
51 DIRECTION INOUT ;
52 USE GROUND ;
53 PORT
54 LAYER met3 ;
55 RECT 0.000 8.730 119.600 9.030 ;
56 END
57 END vssd2
58 OBS
59 LAYER li1 ;
60 RECT 0.000 2.635 119.600 10.965 ;
61 LAYER met1 ;
62 RECT 0.000 2.480 119.600 11.120 ;
63 LAYER met2 ;
64 RECT 5.150 6.470 5.430 8.005 ;
65 LAYER met3 ;
66 RECT 4.400 7.120 90.165 8.330 ;
67 RECT 4.000 4.030 90.165 7.120 ;
68 END
69END mprj2_logic_high
70END LIBRARY
71