| ,design,design_name,config,runtime,DIEAREA_mm^2,CellPer_mm^2,(Cell/mm^2)/Core_Util,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY |
| 0,/ef/openfpga/openlane/input/user_project_wrapper/,user_project_wrapper,user_project_wrapper,0h16m28s,10.2784,17.7070361145704,35.4140722291407,0,1199.88,182,0,0,0,0,0,0,0,22,0,-1,352880,3012,0,0,0,-0.72,0,0,0,0,-18.15,0,352828215,0,3.85,1.73,0.7,0,0,156,774,156,774,0,0,0,182,0,0,0,0,0,0,0,0,-1,-1,-1,4694,37810,0,42504,100,10,10,2,5,50,1,153.6,153.18,0.1,0,sky130_fd_sc_hd,8,4 |
| 0,/ef/openfpga/openlane/input/cbx_1__0_,cbx_1__0_,cbx_1__0_,0h4m30s,0.0086,30232.5581395349,60465.1162790698,62,415.62,260,0,0,0,0,0,0,0,0,0,36,12134,2218,0,0,0,0,0,0,0,0,0,0,10500250,0,33.16,27.4,2.4,0.46,0,223,323,214,314,0,0,0,260,0,0,0,0,0,0,0,0,-1,-1,-1,46,75,0,121,100,10,10,2,5,50,1,153.6,153.18,0.7,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/cbx_1__1_,cbx_1__1_,cbx_1__1_,0h4m14s,0.0086,34534.8837209302,69069.7674418605,76,434.65,297,0,0,0,0,0,0,0,0,0,0,12806,2795,0,0,0,0,0,0,0,0,0,0,8804572,0,35.65,29.73,4.6,0,0,272,348,256,332,0,0,0,297,0,0,0,0,0,0,0,0,-1,-1,-1,46,75,0,121,100,10,10,2,5,50,1,153.6,153.18,0.898,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/cbx_1__2_,cbx_1__2_,cbx_1__2_,0h3m53s,0.0086,35581.3953488372,71162.7906976744,79,436.08,306,0,0,0,0,0,0,0,0,0,2,12515,2775,0,0,0,0,0,0,0,0,0,0,8518196,0,36.35,30.02,2.21,0,0,277,353,260,336,0,0,0,306,0,0,0,0,0,0,0,0,-1,-1,-1,46,75,0,121,100,10,10,2,5,50,1,153.6,153.18,0.861,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/cby_1__1_,cby_1__1_,cby_1__1_,0h5m6s,0.0086,34186.0465116279,68372.0930232558,74,420.06,294,0,0,0,0,0,0,0,0,0,0,11900,2584,0,0,0,0,0,0,0,0,0,0,8515795,0,30.17,30.69,3.75,0,0,267,343,251,327,0,0,0,294,0,0,0,0,0,0,0,0,-1,-1,-1,56,75,0,131,100,10,10,2,5,50,1,153.6,153.18,0.8,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/cby_2__1_,cby_2__1_,cby_2__1_,0h4m11s,0.0086,35465.1162790698,70930.2325581395,78,432.68,305,0,0,0,0,0,0,0,0,0,2,11990,2737,0,0,0,0,0,0,0,0,0,0,8462486,0,34.15,29.6,1.02,0,0,274,350,257,333,0,0,0,305,0,0,0,0,0,0,0,0,-1,-1,-1,56,75,0,131,100,10,10,2,5,50,1,153.6,153.18,0.75,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/grid_clb,grid_clb,grid_clb,0h6m13s,0.015129,36750.6114085531,73501.2228171062,71,440.34,556,0,0,0,0,0,0,0,0,0,0,13658,3883,-0.57,-0.74,-0.57,-1.15,-0.69,-6.08,-8.13,-6.08,-13.41,-5.46,8351823,0,23.65,19.41,0,0,0,598,598,566,566,0,0,0,556,0,0,0,0,0,0,0,0,-1,-1,-1,74,136,0,210,93.5453695042095,10.69,10,2,6,50,1,153.6,153.18,0.86,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/sb_0__0_,sb_0__0_,sb_0__0_,0h2m37s,0.013225,15500.9451795841,31001.8903591682,27,402.57,205,0,0,0,0,0,0,0,0,0,0,8203,1418,0,0,0,0,0,0,0,0,0,0,7056439,0,14.43,11.67,0,0,0,181,257,157,233,0,0,0,205,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,200,5,5,2,6,50,1,153.6,153.18,0.4,0,sky130_fd_sc_hd,2,4 |
| 0,/ef/openfpga/openlane/input/sb_0__1_,sb_0__1_,sb_0__1_,0h4m17s,0.013225,27069.9432892249,54139.8865784499,50,432.22,358,0,0,0,0,0,0,0,0,0,0,17147,3064,0,0,0,0,0,0,0,0,0,0,11493513,0,28.77,26.83,1.25,0,0,316,430,283,397,0,0,0,358,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,100,10,10,2,5,50,1,153.6,153.18,0.7,0,sky130_fd_sc_hd,2,4 |
| 0,/ef/openfpga/openlane/input/sb_0__2_,sb_0__2_,sb_0__2_,0h3m48s,0.013225,15576.5595463138,31153.1190926276,27,413.93,206,0,0,0,0,0,0,0,0,0,0,8503,1498,0,0,0,0,0,0,0,0,0,0,6832822,0,13.74,13.76,1.78,0,0,183,259,159,235,0,0,0,206,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,200,5,5,2,6,50,1,153.6,153.18,0.6,0,sky130_fd_sc_hd,2,4 |
| 0,/ef/openfpga/openlane/input/sb_1__0_,sb_1__0_,sb_1__0_,0h4m16s,0.013225,29187.145557656,58374.2911153119,54,424.84,386,0,0,0,0,0,0,0,0,0,0,17120,3223,-0.08,-0.25,-0.08,-0.62,-0.22,-0.7,-1.5,-0.7,-2.98,-1.07,13773035,0,29.59,24.49,4.16,0,0,364,478,336,450,0,0,0,386,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,191.570881226054,5.22,5,2,6,50,1,153.6,153.18,0.7,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/sb_1__1_,sb_1__1_,sb_1__1_,0h4m51s,0.013225,43705.1039697543,87410.2079395085,83,454.43,578,0,0,0,0,0,0,0,0,0,0,26112,5477,0,0,0,0,0,0,0,0,0,0,20071629,0,42.24,41.1,9.82,0.36,0,547,699,519,671,0,0,0,578,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,100,10,10,2,5,50,1,153.6,153.18,0.8,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/sb_1__2_,sb_1__2_,sb_1__2_,0h2m54s,0.013225,28960.3024574669,57920.6049149338,54,428.22,383,0,0,0,0,0,0,0,0,0,0,16094,3157,0,0,0,0,0,0,0,0,0,0,13450067,0,28.15,26.34,0.85,0,0,358,472,330,444,0,0,0,383,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,100,10,10,2,5,50,1,153.6,153.18,0.5,0,sky130_fd_sc_hd,2,4 |
| 0,/ef/openfpga/openlane/input/sb_2__0_,sb_2__0_,sb_2__0_,0h3m7s,0.013225,21550.0945179584,43100.1890359168,39,415.18,285,0,0,0,0,0,0,0,0,0,0,10548,2014,0,0,0,0,0,0,0,0,0,0,8398483,0,17.63,15.99,0.36,0,0,269,345,235,311,0,0,0,285,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,100,10,10,2,5,50,1,153.6,153.18,0.6,0,sky130_fd_sc_hd,2,4 |
| 0,/ef/openfpga/openlane/input/sb_2__1_,sb_2__1_,sb_2__1_,0h4m40s,0.013225,31304.347826087,62608.6956521739,59,441.45,414,0,0,0,0,0,0,0,0,0,0,15928,3326,0,0,0,0,0,0,0,0,0,0,13087912,0,26.14,25.54,0.73,0,0,388,502,355,469,0,0,0,414,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,100,10,10,2,5,50,1,153.6,153.18,0.7,0,sky130_fd_sc_hd,0,4 |
| 0,/ef/openfpga/openlane/input/sb_2__2_,sb_2__2_,sb_2__2_,0h3m21s,0.013225,22003.7807183365,44007.561436673,40,401.5,291,0,0,0,0,0,0,0,0,0,0,9951,2042,0,0,0,0,0,0,0,0,0,0,7913032,0,17,15.51,0.81,0,0,276,352,241,317,0,0,0,291,0,0,0,0,0,0,0,0,-1,-1,-1,68,126,0,194,100,10,10,2,5,50,1,153.6,153.18,0.6,0,sky130_fd_sc_hd,2,4 |
| 0,/ef/openfpga/openlane/input/tie_array,tie_array,tie_array,0h0m40s,0.0042,1904.7619047619,3809.52380952381,1,385.35,8,0,0,0,0,0,0,0,0,0,0,140,16,0,0,0,0,0,0,0,0,0,0,165299,0,0.49,0.17,0,0,0,1,8,1,8,0,0,0,8,0,0,0,0,0,0,0,0,-1,-1,-1,34,28,0,62,100,10,10,2,5,50,1,153.6,153.18,0.1,0,sky130_fd_sc_hd,8,3 |
