| /* Generated by Yosys 0.9+3621 (git sha1 84e9fa7, gcc 8.3.1 -fPIC -Os) */ |
| |
| module cbx_1__2_(IO_ISOL_N, SC_IN_BOT, SC_IN_TOP, SC_OUT_BOT, SC_OUT_TOP, bottom_grid_pin_0_, bottom_grid_pin_10_, bottom_grid_pin_11_, bottom_grid_pin_12_, bottom_grid_pin_13_, bottom_grid_pin_14_, bottom_grid_pin_15_, bottom_grid_pin_1_, bottom_grid_pin_2_, bottom_grid_pin_3_, bottom_grid_pin_4_, bottom_grid_pin_5_, bottom_grid_pin_6_, bottom_grid_pin_7_, bottom_grid_pin_8_, bottom_grid_pin_9_, bottom_width_0_height_0__pin_0_, bottom_width_0_height_0__pin_1_lower, bottom_width_0_height_0__pin_1_upper, ccff_head, ccff_tail, gfpga_pad_EMBEDDED_IO_HD_SOC_DIR, gfpga_pad_EMBEDDED_IO_HD_SOC_IN, gfpga_pad_EMBEDDED_IO_HD_SOC_OUT, prog_clk_0_S_in, prog_clk_0_W_out, top_grid_pin_0_, VPWR, VGND, chanx_left_in, chanx_left_out, chanx_right_in, chanx_right_out); |
| input IO_ISOL_N; |
| input SC_IN_BOT; |
| input SC_IN_TOP; |
| output SC_OUT_BOT; |
| output SC_OUT_TOP; |
| input VGND; |
| input VPWR; |
| wire _00_; |
| wire _01_; |
| wire _02_; |
| wire _03_; |
| wire _04_; |
| wire _05_; |
| wire _06_; |
| wire _07_; |
| wire _08_; |
| wire _09_; |
| wire _10_; |
| wire _11_; |
| wire _12_; |
| wire _13_; |
| wire _14_; |
| wire _15_; |
| wire _16_; |
| output bottom_grid_pin_0_; |
| output bottom_grid_pin_10_; |
| output bottom_grid_pin_11_; |
| output bottom_grid_pin_12_; |
| output bottom_grid_pin_13_; |
| output bottom_grid_pin_14_; |
| output bottom_grid_pin_15_; |
| output bottom_grid_pin_1_; |
| output bottom_grid_pin_2_; |
| output bottom_grid_pin_3_; |
| output bottom_grid_pin_4_; |
| output bottom_grid_pin_5_; |
| output bottom_grid_pin_6_; |
| output bottom_grid_pin_7_; |
| output bottom_grid_pin_8_; |
| output bottom_grid_pin_9_; |
| input bottom_width_0_height_0__pin_0_; |
| output bottom_width_0_height_0__pin_1_lower; |
| output bottom_width_0_height_0__pin_1_upper; |
| input ccff_head; |
| output ccff_tail; |
| input [19:0] chanx_left_in; |
| output [19:0] chanx_left_out; |
| input [19:0] chanx_right_in; |
| output [19:0] chanx_right_out; |
| wire \clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| output gfpga_pad_EMBEDDED_IO_HD_SOC_DIR; |
| input gfpga_pad_EMBEDDED_IO_HD_SOC_IN; |
| output gfpga_pad_EMBEDDED_IO_HD_SOC_OUT; |
| wire \logical_tile_io_mode_io__0.ccff_head ; |
| wire \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.SOC_DIR_N ; |
| wire \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ; |
| wire \mem_bottom_ipin_0.ccff_tail ; |
| wire \mem_bottom_ipin_0.mem_out[0] ; |
| wire \mem_bottom_ipin_0.mem_out[1] ; |
| wire \mem_bottom_ipin_0.mem_out[2] ; |
| wire \mem_top_ipin_0.ccff_tail ; |
| wire \mem_top_ipin_0.mem_out[0] ; |
| wire \mem_top_ipin_0.mem_out[1] ; |
| wire \mem_top_ipin_0.mem_out[2] ; |
| wire \mem_top_ipin_1.ccff_tail ; |
| wire \mem_top_ipin_1.mem_out[0] ; |
| wire \mem_top_ipin_1.mem_out[1] ; |
| wire \mem_top_ipin_1.mem_out[2] ; |
| wire \mem_top_ipin_10.ccff_head ; |
| wire \mem_top_ipin_10.ccff_tail ; |
| wire \mem_top_ipin_10.mem_out[0] ; |
| wire \mem_top_ipin_10.mem_out[1] ; |
| wire \mem_top_ipin_10.mem_out[2] ; |
| wire \mem_top_ipin_11.ccff_tail ; |
| wire \mem_top_ipin_11.mem_out[0] ; |
| wire \mem_top_ipin_11.mem_out[1] ; |
| wire \mem_top_ipin_11.mem_out[2] ; |
| wire \mem_top_ipin_12.ccff_tail ; |
| wire \mem_top_ipin_12.mem_out[0] ; |
| wire \mem_top_ipin_12.mem_out[1] ; |
| wire \mem_top_ipin_12.mem_out[2] ; |
| wire \mem_top_ipin_13.ccff_tail ; |
| wire \mem_top_ipin_13.mem_out[0] ; |
| wire \mem_top_ipin_13.mem_out[1] ; |
| wire \mem_top_ipin_13.mem_out[2] ; |
| wire \mem_top_ipin_14.ccff_tail ; |
| wire \mem_top_ipin_14.mem_out[0] ; |
| wire \mem_top_ipin_14.mem_out[1] ; |
| wire \mem_top_ipin_14.mem_out[2] ; |
| wire \mem_top_ipin_15.mem_out[0] ; |
| wire \mem_top_ipin_15.mem_out[1] ; |
| wire \mem_top_ipin_15.mem_out[2] ; |
| wire \mem_top_ipin_2.ccff_tail ; |
| wire \mem_top_ipin_2.mem_out[0] ; |
| wire \mem_top_ipin_2.mem_out[1] ; |
| wire \mem_top_ipin_2.mem_out[2] ; |
| wire \mem_top_ipin_3.ccff_tail ; |
| wire \mem_top_ipin_3.mem_out[0] ; |
| wire \mem_top_ipin_3.mem_out[1] ; |
| wire \mem_top_ipin_3.mem_out[2] ; |
| wire \mem_top_ipin_4.ccff_tail ; |
| wire \mem_top_ipin_4.mem_out[0] ; |
| wire \mem_top_ipin_4.mem_out[1] ; |
| wire \mem_top_ipin_4.mem_out[2] ; |
| wire \mem_top_ipin_5.ccff_tail ; |
| wire \mem_top_ipin_5.mem_out[0] ; |
| wire \mem_top_ipin_5.mem_out[1] ; |
| wire \mem_top_ipin_5.mem_out[2] ; |
| wire \mem_top_ipin_6.ccff_tail ; |
| wire \mem_top_ipin_6.mem_out[0] ; |
| wire \mem_top_ipin_6.mem_out[1] ; |
| wire \mem_top_ipin_6.mem_out[2] ; |
| wire \mem_top_ipin_7.ccff_tail ; |
| wire \mem_top_ipin_7.mem_out[0] ; |
| wire \mem_top_ipin_7.mem_out[1] ; |
| wire \mem_top_ipin_7.mem_out[2] ; |
| wire \mem_top_ipin_8.ccff_tail ; |
| wire \mem_top_ipin_8.mem_out[0] ; |
| wire \mem_top_ipin_8.mem_out[1] ; |
| wire \mem_top_ipin_8.mem_out[2] ; |
| wire \mem_top_ipin_9.mem_out[0] ; |
| wire \mem_top_ipin_9.mem_out[1] ; |
| wire \mem_top_ipin_9.mem_out[2] ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_7_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_8_X ; |
| wire \mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_9_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_0_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_1_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_2_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_3_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_4_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_5_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_6_X ; |
| wire \mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_7_X ; |
| input prog_clk_0_S_in; |
| output prog_clk_0_W_out; |
| output top_grid_pin_0_; |
| sky130_fd_sc_hd__fill_2 FILLER_0_108 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_11 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_0_119 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_0_123 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_134 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_142 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_0_150 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_0_154 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_162 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_170 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_0_176 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_184 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_0_187 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_19 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_0_27 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_0_32 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_45 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_0_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_69 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_80 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_0_91 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_0_94 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_0_98 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_10_105 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_10_109 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_126 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_10_137 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_10_150 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_17 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_170 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_181 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_10_187 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_10_28 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_41 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_6 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_70 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_81 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_10_86 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_10_91 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_11_107 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_11_117 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_11_132 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_11_152 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_11_160 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_11_179 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_11_188 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_11_19 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_11_23 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_11_33 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_11_55 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_11_66 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_11_85 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_12_120 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_12_138 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_12_149 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_12_163 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_12_17 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_12_187 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_12_29 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_12_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_12_48 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_12_66 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_12_7 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_12_84 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_13_108 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_120 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_132 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_13_137 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_13_159 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_13_180 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_13_184 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_27 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_13_33 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_13_46 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_13_62 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_74 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_85 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_9 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_13_90 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_14_109 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_14_117 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_127 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_14_138 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_151 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_154 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_14_159 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_14_179 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_14_185 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_14_189 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_19 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_25 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_14_30 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_14_32 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_14_36 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_46 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_57 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_68 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_79 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_14_90 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_15_10 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_109 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_120 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_15_123 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_133 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_151 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_169 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_15_180 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_15_184 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_15_22 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_15_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_35 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_15_46 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_62 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_15_83 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_15_94 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_16_102 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_16_106 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_11 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_123 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_141 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_16_146 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_16_152 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_170 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_16_181 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_16_189 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_29 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_16_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_16_48 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_68 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_16_7 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_79 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_16_90 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_17_11 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_17_111 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_17_118 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_17_132 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_17_138 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_17_148 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_17_159 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_17_170 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_17_181 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_17_184 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_17_22 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_17_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_17_50 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_17_58 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_17_71 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_17_76 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_17_82 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_17_99 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_18_100 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_18_117 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_18_145 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_18_151 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_18_163 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_18_18 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_18_183 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_18_189 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_18_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_18_30 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_18_48 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_18_54 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_18_67 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_18_89 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_18_96 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_19_111 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_19_119 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_19_123 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_19_140 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_19_148 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_19_15 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_19_166 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_19_170 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_19_180 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_19_184 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_19_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_19_39 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_19_47 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_19_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_19_62 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_19_79 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_19_98 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_107 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_1_118 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_1_132 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_1_136 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_146 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_154 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_1_162 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_169 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_175 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_181 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_188 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_20 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_31 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_42 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_53 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_71 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_1_82 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_1_86 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_9 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_1_96 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_103 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_20_114 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_129 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_140 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_20_15 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_151 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_20_154 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_20_158 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_162 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_173 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_20_184 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_20_27 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_20_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_20_32 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_45 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_20_56 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_20_76 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_20_87 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_20_91 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_20_93 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_21_109 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_21_120 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_21_123 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_21_140 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_21_148 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_21_15 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_21_158 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_21_173 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_21_179 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_21_188 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_21_27 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_21_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_21_35 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_21_45 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_21_56 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_21_60 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_21_71 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_21_83 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_21_94 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_103 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_22_114 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_122 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_22_125 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_142 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_22_15 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_153 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_22_156 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_172 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_22_183 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_22_187 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_22_27 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_22_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_22_32 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_22_40 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_22_52 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_60 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_22_63 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_80 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_22_91 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_10 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_118 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_136 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_2_147 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_15 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_2_160 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_168 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_174 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_180 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_2_186 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_2_26 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_2_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_2_30 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_2_32 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_2_42 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_2_46 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_63 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_2_81 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_2_89 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_2_99 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_3_108 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_3_119 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_3_123 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_3_133 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_3_151 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_3_162 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_3_174 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_3_181 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_3_188 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_3_24 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_3_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_3_42 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_3_55 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_3_7 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_3_71 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_3_89 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_102 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_113 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_4_124 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_136 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_147 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_4_152 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_4_163 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_6 FILLER_4_175 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_18 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_4_181 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_4_186 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_29 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_48 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_7 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_4_70 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_82 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_4_90 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_104 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_115 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_120 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_139 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_157 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_5_168 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_5_176 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_181 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_188 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_19 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_5_25 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_38 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_49 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_5_57 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_71 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_82 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_5_93 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_114 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_120 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_6_138 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_151 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_163 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_6_168 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_180 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_6_186 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_21 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_6_27 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_41 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_46 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_64 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_6_70 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_90 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_6_96 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_10 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_103 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_109 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_120 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_123 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_134 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_152 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_7_16 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_12 FILLER_7_163 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_7_175 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_188 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_7_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_35 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_53 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_7_78 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_7_84 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_110 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_12 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_121 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_132 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_8_143 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_151 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_163 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_8 FILLER_8_174 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_8_186 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_23 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_29 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_41 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_8_47 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_62 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_8_80 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_8_88 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_8_93 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_116 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_9_121 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_126 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_137 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_9_148 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_9_152 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_162 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_173 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_9_178 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_1 FILLER_9_182 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_188 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_22 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_9_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_36 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_9_47 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_59 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__fill_2 FILLER_9_71 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 FILLER_9_77 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_4 FILLER_9_96 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_0 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_1 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_10 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_100 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_101 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_102 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_103 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_104 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_105 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_106 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_107 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_108 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_109 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_11 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_110 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_111 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_112 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_113 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_114 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_115 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_116 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_117 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_118 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_119 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_12 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_120 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_13 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_14 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_15 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_16 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_17 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_18 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_19 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_2 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_20 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_21 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_22 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_23 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_24 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_25 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_26 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_27 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_28 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_29 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_3 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_30 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_31 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_32 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_33 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_34 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_35 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_36 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_37 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_38 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_39 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_4 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_40 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_41 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_42 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_43 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_44 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_45 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_46 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_47 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_48 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_49 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_5 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_50 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_51 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_52 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_53 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_54 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_55 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_56 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_57 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_58 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_59 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_6 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_60 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_61 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_62 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_63 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_64 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_65 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_66 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_67 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_68 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_69 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_7 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_70 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_71 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_72 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_73 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_74 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_75 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_76 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_77 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_78 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_79 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_8 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_80 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_81 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_82 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_83 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_84 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_85 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_86 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_87 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_88 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_89 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__decap_3 PHY_9 ( |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_90 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_91 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_92 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_93 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_94 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_95 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_96 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_97 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_98 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_99 ( |
| .VGND(VGND), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _17_ ( |
| .HI(_16_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _18_ ( |
| .HI(_00_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _19_ ( |
| .HI(_01_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _20_ ( |
| .HI(_02_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _21_ ( |
| .HI(_03_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _22_ ( |
| .HI(_04_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _23_ ( |
| .HI(_05_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _24_ ( |
| .HI(_06_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _25_ ( |
| .HI(_07_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _26_ ( |
| .HI(_08_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _27_ ( |
| .HI(_09_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _28_ ( |
| .HI(_10_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _29_ ( |
| .HI(_11_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _30_ ( |
| .HI(_12_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _31_ ( |
| .HI(_13_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _32_ ( |
| .HI(_14_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__conb_1 _33_ ( |
| .HI(_15_), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__buf_2 _34_ ( |
| .A(SC_IN_TOP), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(SC_OUT_BOT) |
| ); |
| sky130_fd_sc_hd__buf_2 _35_ ( |
| .A(SC_IN_BOT), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(SC_OUT_TOP) |
| ); |
| sky130_fd_sc_hd__buf_2 _36_ ( |
| .A(bottom_width_0_height_0__pin_1_lower), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_width_0_height_0__pin_1_upper) |
| ); |
| sky130_fd_sc_hd__buf_2 _37_ ( |
| .A(chanx_right_in[19]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[19]) |
| ); |
| sky130_fd_sc_hd__buf_2 _38_ ( |
| .A(chanx_right_in[18]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[18]) |
| ); |
| sky130_fd_sc_hd__buf_2 _39_ ( |
| .A(chanx_right_in[17]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[17]) |
| ); |
| sky130_fd_sc_hd__buf_2 _40_ ( |
| .A(chanx_right_in[16]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[16]) |
| ); |
| sky130_fd_sc_hd__buf_2 _41_ ( |
| .A(chanx_right_in[15]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[15]) |
| ); |
| sky130_fd_sc_hd__buf_2 _42_ ( |
| .A(chanx_right_in[14]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[14]) |
| ); |
| sky130_fd_sc_hd__buf_2 _43_ ( |
| .A(chanx_right_in[13]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[13]) |
| ); |
| sky130_fd_sc_hd__buf_2 _44_ ( |
| .A(chanx_right_in[12]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[12]) |
| ); |
| sky130_fd_sc_hd__buf_2 _45_ ( |
| .A(chanx_right_in[11]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[11]) |
| ); |
| sky130_fd_sc_hd__buf_2 _46_ ( |
| .A(chanx_right_in[10]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[10]) |
| ); |
| sky130_fd_sc_hd__buf_2 _47_ ( |
| .A(chanx_right_in[9]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[9]) |
| ); |
| sky130_fd_sc_hd__buf_2 _48_ ( |
| .A(chanx_right_in[8]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[8]) |
| ); |
| sky130_fd_sc_hd__buf_2 _49_ ( |
| .A(chanx_right_in[7]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[7]) |
| ); |
| sky130_fd_sc_hd__buf_2 _50_ ( |
| .A(chanx_right_in[6]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[6]) |
| ); |
| sky130_fd_sc_hd__buf_2 _51_ ( |
| .A(chanx_right_in[5]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[5]) |
| ); |
| sky130_fd_sc_hd__buf_2 _52_ ( |
| .A(chanx_right_in[4]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[4]) |
| ); |
| sky130_fd_sc_hd__buf_2 _53_ ( |
| .A(chanx_right_in[3]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[3]) |
| ); |
| sky130_fd_sc_hd__buf_2 _54_ ( |
| .A(chanx_right_in[2]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[2]) |
| ); |
| sky130_fd_sc_hd__buf_2 _55_ ( |
| .A(chanx_right_in[1]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[1]) |
| ); |
| sky130_fd_sc_hd__buf_2 _56_ ( |
| .A(chanx_right_in[0]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_left_out[0]) |
| ); |
| sky130_fd_sc_hd__buf_2 _57_ ( |
| .A(chanx_left_in[19]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[19]) |
| ); |
| sky130_fd_sc_hd__buf_2 _58_ ( |
| .A(chanx_left_in[18]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[18]) |
| ); |
| sky130_fd_sc_hd__buf_2 _59_ ( |
| .A(chanx_left_in[17]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[17]) |
| ); |
| sky130_fd_sc_hd__buf_2 _60_ ( |
| .A(chanx_left_in[16]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[16]) |
| ); |
| sky130_fd_sc_hd__buf_2 _61_ ( |
| .A(chanx_left_in[15]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[15]) |
| ); |
| sky130_fd_sc_hd__buf_2 _62_ ( |
| .A(chanx_left_in[14]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[14]) |
| ); |
| sky130_fd_sc_hd__buf_2 _63_ ( |
| .A(chanx_left_in[13]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[13]) |
| ); |
| sky130_fd_sc_hd__buf_2 _64_ ( |
| .A(chanx_left_in[12]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[12]) |
| ); |
| sky130_fd_sc_hd__buf_2 _65_ ( |
| .A(chanx_left_in[11]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[11]) |
| ); |
| sky130_fd_sc_hd__buf_2 _66_ ( |
| .A(chanx_left_in[10]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[10]) |
| ); |
| sky130_fd_sc_hd__buf_2 _67_ ( |
| .A(chanx_left_in[9]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[9]) |
| ); |
| sky130_fd_sc_hd__buf_2 _68_ ( |
| .A(chanx_left_in[8]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[8]) |
| ); |
| sky130_fd_sc_hd__buf_2 _69_ ( |
| .A(chanx_left_in[7]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[7]) |
| ); |
| sky130_fd_sc_hd__buf_2 _70_ ( |
| .A(chanx_left_in[6]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[6]) |
| ); |
| sky130_fd_sc_hd__buf_2 _71_ ( |
| .A(chanx_left_in[5]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[5]) |
| ); |
| sky130_fd_sc_hd__buf_2 _72_ ( |
| .A(chanx_left_in[4]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[4]) |
| ); |
| sky130_fd_sc_hd__buf_2 _73_ ( |
| .A(chanx_left_in[3]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[3]) |
| ); |
| sky130_fd_sc_hd__buf_2 _74_ ( |
| .A(chanx_left_in[2]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[2]) |
| ); |
| sky130_fd_sc_hd__buf_2 _75_ ( |
| .A(chanx_left_in[1]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[1]) |
| ); |
| sky130_fd_sc_hd__buf_2 _76_ ( |
| .A(chanx_left_in[0]), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(chanx_right_out[0]) |
| ); |
| sky130_fd_sc_hd__clkbuf_16 \clkbuf_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ( |
| .A(\clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__inv_1 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.INV_SOC_DIR ( |
| .A(gfpga_pad_EMBEDDED_IO_HD_SOC_DIR), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .Y(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.SOC_DIR_N ) |
| ); |
| sky130_fd_sc_hd__ebufn_4 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.IN_PROTECT_GATE ( |
| .A(gfpga_pad_EMBEDDED_IO_HD_SOC_IN), |
| .TE_B(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.SOC_DIR_N ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .Z(bottom_width_0_height_0__pin_1_lower) |
| ); |
| sky130_fd_sc_hd__or2b_4 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.ISOL_EN_GATE ( |
| .A(ccff_tail), |
| .B_N(IO_ISOL_N), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(gfpga_pad_EMBEDDED_IO_HD_SOC_DIR) |
| ); |
| sky130_fd_sc_hd__ebufn_4 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.OUT_PROTECT_GATE ( |
| .A(bottom_width_0_height_0__pin_0_), |
| .TE_B(gfpga_pad_EMBEDDED_IO_HD_SOC_DIR), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .Z(gfpga_pad_EMBEDDED_IO_HD_SOC_OUT) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\logical_tile_io_mode_io__0.ccff_head ), |
| .Q(ccff_tail), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_bottom_ipin_0.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(ccff_head), |
| .Q(\mem_bottom_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_bottom_ipin_0.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_bottom_ipin_0.mem_out[0] ), |
| .Q(\mem_bottom_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_bottom_ipin_0.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_bottom_ipin_0.mem_out[1] ), |
| .Q(\mem_bottom_ipin_0.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_bottom_ipin_0.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_bottom_ipin_0.mem_out[2] ), |
| .Q(\mem_bottom_ipin_0.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_0.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_bottom_ipin_0.ccff_tail ), |
| .Q(\mem_top_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_0.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_0.mem_out[0] ), |
| .Q(\mem_top_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_0.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_0.mem_out[1] ), |
| .Q(\mem_top_ipin_0.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_0.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_0.mem_out[2] ), |
| .Q(\mem_top_ipin_0.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_1.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_0.ccff_tail ), |
| .Q(\mem_top_ipin_1.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_1.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_1.mem_out[0] ), |
| .Q(\mem_top_ipin_1.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_1.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_1.mem_out[1] ), |
| .Q(\mem_top_ipin_1.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_1.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_1.mem_out[2] ), |
| .Q(\mem_top_ipin_1.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_10.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_10.ccff_head ), |
| .Q(\mem_top_ipin_10.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_10.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_10.mem_out[0] ), |
| .Q(\mem_top_ipin_10.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_10.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_10.mem_out[1] ), |
| .Q(\mem_top_ipin_10.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_10.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_10.mem_out[2] ), |
| .Q(\mem_top_ipin_10.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_11.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_10.ccff_tail ), |
| .Q(\mem_top_ipin_11.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_11.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_11.mem_out[0] ), |
| .Q(\mem_top_ipin_11.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_11.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_11.mem_out[1] ), |
| .Q(\mem_top_ipin_11.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_11.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_11.mem_out[2] ), |
| .Q(\mem_top_ipin_11.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_12.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_11.ccff_tail ), |
| .Q(\mem_top_ipin_12.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_12.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_12.mem_out[0] ), |
| .Q(\mem_top_ipin_12.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_12.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_12.mem_out[1] ), |
| .Q(\mem_top_ipin_12.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_12.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_12.mem_out[2] ), |
| .Q(\mem_top_ipin_12.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_13.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_12.ccff_tail ), |
| .Q(\mem_top_ipin_13.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_13.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_13.mem_out[0] ), |
| .Q(\mem_top_ipin_13.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_13.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_13.mem_out[1] ), |
| .Q(\mem_top_ipin_13.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_13.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_13.mem_out[2] ), |
| .Q(\mem_top_ipin_13.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_14.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_13.ccff_tail ), |
| .Q(\mem_top_ipin_14.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_14.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_14.mem_out[0] ), |
| .Q(\mem_top_ipin_14.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_14.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_14.mem_out[1] ), |
| .Q(\mem_top_ipin_14.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_14.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_14.mem_out[2] ), |
| .Q(\mem_top_ipin_14.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_15.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_14.ccff_tail ), |
| .Q(\mem_top_ipin_15.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_15.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_15.mem_out[0] ), |
| .Q(\mem_top_ipin_15.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_15.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_15.mem_out[1] ), |
| .Q(\mem_top_ipin_15.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_15.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_15.mem_out[2] ), |
| .Q(\logical_tile_io_mode_io__0.ccff_head ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_2.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_1.ccff_tail ), |
| .Q(\mem_top_ipin_2.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_2.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_2.mem_out[0] ), |
| .Q(\mem_top_ipin_2.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_2.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_2.mem_out[1] ), |
| .Q(\mem_top_ipin_2.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_2.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_2.mem_out[2] ), |
| .Q(\mem_top_ipin_2.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_3.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_2.ccff_tail ), |
| .Q(\mem_top_ipin_3.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_3.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_3.mem_out[0] ), |
| .Q(\mem_top_ipin_3.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_3.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_3.mem_out[1] ), |
| .Q(\mem_top_ipin_3.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_3.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_3.mem_out[2] ), |
| .Q(\mem_top_ipin_3.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_4.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_3.ccff_tail ), |
| .Q(\mem_top_ipin_4.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_4.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_4.mem_out[0] ), |
| .Q(\mem_top_ipin_4.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_4.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_4.mem_out[1] ), |
| .Q(\mem_top_ipin_4.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_4.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_4.mem_out[2] ), |
| .Q(\mem_top_ipin_4.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_5.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_4.ccff_tail ), |
| .Q(\mem_top_ipin_5.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_5.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_5.mem_out[0] ), |
| .Q(\mem_top_ipin_5.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_5.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_5.mem_out[1] ), |
| .Q(\mem_top_ipin_5.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_5.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_5.mem_out[2] ), |
| .Q(\mem_top_ipin_5.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_6.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_5.ccff_tail ), |
| .Q(\mem_top_ipin_6.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_6.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_6.mem_out[0] ), |
| .Q(\mem_top_ipin_6.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_6.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_6.mem_out[1] ), |
| .Q(\mem_top_ipin_6.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_6.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_6.mem_out[2] ), |
| .Q(\mem_top_ipin_6.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_7.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_6.ccff_tail ), |
| .Q(\mem_top_ipin_7.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_7.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_7.mem_out[0] ), |
| .Q(\mem_top_ipin_7.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_7.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_7.mem_out[1] ), |
| .Q(\mem_top_ipin_7.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_7.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_7.mem_out[2] ), |
| .Q(\mem_top_ipin_7.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_8.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_7.ccff_tail ), |
| .Q(\mem_top_ipin_8.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_8.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_8.mem_out[0] ), |
| .Q(\mem_top_ipin_8.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_8.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_8.mem_out[1] ), |
| .Q(\mem_top_ipin_8.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_8.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_8.mem_out[2] ), |
| .Q(\mem_top_ipin_8.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_9.sky130_fd_sc_hd__dfxtp_1_0_ ( |
| .CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_8.ccff_tail ), |
| .Q(\mem_top_ipin_9.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_9.sky130_fd_sc_hd__dfxtp_1_1_ ( |
| .CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_9.mem_out[0] ), |
| .Q(\mem_top_ipin_9.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_9.sky130_fd_sc_hd__dfxtp_1_2_ ( |
| .CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_9.mem_out[1] ), |
| .Q(\mem_top_ipin_9.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__dfxtp_1 \mem_top_ipin_9.sky130_fd_sc_hd__dfxtp_1_3_ ( |
| .CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ), |
| .D(\mem_top_ipin_9.mem_out[2] ), |
| .Q(\mem_top_ipin_10.ccff_head ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_bottom_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l1_in_1_ ( |
| .A0(chanx_right_in[2]), |
| .A1(chanx_left_in[2]), |
| .S(\mem_bottom_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l1_in_2_ ( |
| .A0(chanx_right_in[4]), |
| .A1(chanx_left_in[4]), |
| .S(\mem_bottom_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l2_in_0_ ( |
| .A0(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_bottom_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l2_in_1_ ( |
| .A0(chanx_left_in[10]), |
| .A1(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_bottom_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l2_in_2_ ( |
| .A0(chanx_left_in[16]), |
| .A1(chanx_right_in[10]), |
| .S(\mem_bottom_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l2_in_3_ ( |
| .A0(_04_), |
| .A1(chanx_right_in[16]), |
| .S(\mem_bottom_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l3_in_0_ ( |
| .A0(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_bottom_ipin_0.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l3_in_1_ ( |
| .A0(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_bottom_ipin_0.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_bottom_ipin_0.mux_l4_in_0_ ( |
| .A0(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_bottom_ipin_0.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_bottom_ipin_0.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_bottom_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(top_grid_pin_0_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l1_in_1_ ( |
| .A0(chanx_right_in[3]), |
| .A1(chanx_left_in[3]), |
| .S(\mem_top_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l1_in_2_ ( |
| .A0(chanx_right_in[5]), |
| .A1(chanx_left_in[5]), |
| .S(\mem_top_ipin_0.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l2_in_1_ ( |
| .A0(chanx_left_in[11]), |
| .A1(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l2_in_2_ ( |
| .A0(chanx_left_in[17]), |
| .A1(chanx_right_in[11]), |
| .S(\mem_top_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l2_in_3_ ( |
| .A0(_05_), |
| .A1(chanx_right_in[17]), |
| .S(\mem_top_ipin_0.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_0.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_0.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_0.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_top_ipin_0.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_0.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_0_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_1.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l2_in_0_ ( |
| .A0(chanx_left_in[2]), |
| .A1(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_1.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l2_in_1_ ( |
| .A0(chanx_left_in[6]), |
| .A1(chanx_right_in[2]), |
| .S(\mem_top_ipin_1.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l2_in_2_ ( |
| .A0(chanx_left_in[14]), |
| .A1(chanx_right_in[6]), |
| .S(\mem_top_ipin_1.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l2_in_3_ ( |
| .A0(_06_), |
| .A1(chanx_right_in[14]), |
| .S(\mem_top_ipin_1.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_1.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_1.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_1.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_1.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_1.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_1.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_1_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_10.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l2_in_0_ ( |
| .A0(chanx_left_in[3]), |
| .A1(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_10.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l2_in_1_ ( |
| .A0(chanx_left_in[7]), |
| .A1(chanx_right_in[3]), |
| .S(\mem_top_ipin_10.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l2_in_2_ ( |
| .A0(chanx_left_in[15]), |
| .A1(chanx_right_in[7]), |
| .S(\mem_top_ipin_10.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l2_in_3_ ( |
| .A0(_07_), |
| .A1(chanx_right_in[15]), |
| .S(\mem_top_ipin_10.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_10.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_10.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_10.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_10.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_10.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_10.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_10_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_11.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l1_in_1_ ( |
| .A0(chanx_right_in[2]), |
| .A1(chanx_left_in[2]), |
| .S(\mem_top_ipin_11.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l1_in_2_ ( |
| .A0(chanx_right_in[6]), |
| .A1(chanx_left_in[6]), |
| .S(\mem_top_ipin_11.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_11.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l2_in_1_ ( |
| .A0(chanx_left_in[12]), |
| .A1(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_11.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l2_in_2_ ( |
| .A0(chanx_left_in[16]), |
| .A1(chanx_right_in[12]), |
| .S(\mem_top_ipin_11.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l2_in_3_ ( |
| .A0(_08_), |
| .A1(chanx_right_in[16]), |
| .S(\mem_top_ipin_11.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_11.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_11.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_11.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_top_ipin_11.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_11.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_11.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_11_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_12.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l1_in_1_ ( |
| .A0(chanx_right_in[3]), |
| .A1(chanx_left_in[3]), |
| .S(\mem_top_ipin_12.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l1_in_2_ ( |
| .A0(chanx_right_in[7]), |
| .A1(chanx_left_in[7]), |
| .S(\mem_top_ipin_12.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_12.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l2_in_1_ ( |
| .A0(chanx_left_in[13]), |
| .A1(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_12.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l2_in_2_ ( |
| .A0(chanx_left_in[17]), |
| .A1(chanx_right_in[13]), |
| .S(\mem_top_ipin_12.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l2_in_3_ ( |
| .A0(_09_), |
| .A1(chanx_right_in[17]), |
| .S(\mem_top_ipin_12.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_12.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_12.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_12.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_top_ipin_12.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_12.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_12.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_12_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_13.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l2_in_0_ ( |
| .A0(chanx_left_in[2]), |
| .A1(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_13.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l2_in_1_ ( |
| .A0(chanx_left_in[10]), |
| .A1(chanx_right_in[2]), |
| .S(\mem_top_ipin_13.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l2_in_2_ ( |
| .A0(chanx_left_in[18]), |
| .A1(chanx_right_in[10]), |
| .S(\mem_top_ipin_13.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l2_in_3_ ( |
| .A0(_10_), |
| .A1(chanx_right_in[18]), |
| .S(\mem_top_ipin_13.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_13.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_13.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_13.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_13.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_13.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_13.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_13_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_14.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l2_in_0_ ( |
| .A0(chanx_left_in[3]), |
| .A1(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_14.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l2_in_1_ ( |
| .A0(chanx_left_in[11]), |
| .A1(chanx_right_in[3]), |
| .S(\mem_top_ipin_14.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l2_in_2_ ( |
| .A0(chanx_left_in[19]), |
| .A1(chanx_right_in[11]), |
| .S(\mem_top_ipin_14.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l2_in_3_ ( |
| .A0(_11_), |
| .A1(chanx_right_in[19]), |
| .S(\mem_top_ipin_14.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_14.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_14.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_14.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_14.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_14.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_14.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_14_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_15.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l1_in_1_ ( |
| .A0(chanx_right_in[2]), |
| .A1(chanx_left_in[2]), |
| .S(\mem_top_ipin_15.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l1_in_2_ ( |
| .A0(chanx_right_in[4]), |
| .A1(chanx_left_in[4]), |
| .S(\mem_top_ipin_15.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_15.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l2_in_1_ ( |
| .A0(chanx_left_in[10]), |
| .A1(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_15.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l2_in_2_ ( |
| .A0(chanx_left_in[16]), |
| .A1(chanx_right_in[10]), |
| .S(\mem_top_ipin_15.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l2_in_3_ ( |
| .A0(_12_), |
| .A1(chanx_right_in[16]), |
| .S(\mem_top_ipin_15.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_15.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_15.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_15.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\logical_tile_io_mode_io__0.ccff_head ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_15.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_15.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_15_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_2.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l2_in_0_ ( |
| .A0(chanx_left_in[3]), |
| .A1(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_2.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l2_in_1_ ( |
| .A0(chanx_left_in[7]), |
| .A1(chanx_right_in[3]), |
| .S(\mem_top_ipin_2.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l2_in_2_ ( |
| .A0(chanx_left_in[15]), |
| .A1(chanx_right_in[7]), |
| .S(\mem_top_ipin_2.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l2_in_3_ ( |
| .A0(_13_), |
| .A1(chanx_right_in[15]), |
| .S(\mem_top_ipin_2.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_2.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_2.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_2.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_2.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_2.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_2.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_2_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_3.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l1_in_1_ ( |
| .A0(chanx_right_in[2]), |
| .A1(chanx_left_in[2]), |
| .S(\mem_top_ipin_3.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l1_in_2_ ( |
| .A0(chanx_right_in[4]), |
| .A1(chanx_left_in[4]), |
| .S(\mem_top_ipin_3.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_3.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l2_in_1_ ( |
| .A0(chanx_left_in[8]), |
| .A1(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_3.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l2_in_2_ ( |
| .A0(chanx_left_in[14]), |
| .A1(chanx_right_in[8]), |
| .S(\mem_top_ipin_3.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l2_in_3_ ( |
| .A0(_14_), |
| .A1(chanx_right_in[14]), |
| .S(\mem_top_ipin_3.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_3.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_3.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_3.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_top_ipin_3.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_3.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_3.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_3_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_4.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l1_in_1_ ( |
| .A0(chanx_right_in[3]), |
| .A1(chanx_left_in[3]), |
| .S(\mem_top_ipin_4.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l1_in_2_ ( |
| .A0(chanx_right_in[5]), |
| .A1(chanx_left_in[5]), |
| .S(\mem_top_ipin_4.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_4.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l2_in_1_ ( |
| .A0(chanx_left_in[9]), |
| .A1(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_4.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l2_in_2_ ( |
| .A0(chanx_left_in[15]), |
| .A1(chanx_right_in[9]), |
| .S(\mem_top_ipin_4.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l2_in_3_ ( |
| .A0(_15_), |
| .A1(chanx_right_in[15]), |
| .S(\mem_top_ipin_4.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_4.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_4.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_4.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_top_ipin_4.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_4.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_4.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_4_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_5.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l2_in_0_ ( |
| .A0(chanx_left_in[2]), |
| .A1(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_5.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l2_in_1_ ( |
| .A0(chanx_left_in[10]), |
| .A1(chanx_right_in[2]), |
| .S(\mem_top_ipin_5.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l2_in_2_ ( |
| .A0(chanx_left_in[18]), |
| .A1(chanx_right_in[10]), |
| .S(\mem_top_ipin_5.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l2_in_3_ ( |
| .A0(_16_), |
| .A1(chanx_right_in[18]), |
| .S(\mem_top_ipin_5.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_5.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_5.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_5.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_5.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_5.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_5.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_5_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_6.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l2_in_0_ ( |
| .A0(chanx_left_in[3]), |
| .A1(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_6.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l2_in_1_ ( |
| .A0(chanx_left_in[11]), |
| .A1(chanx_right_in[3]), |
| .S(\mem_top_ipin_6.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l2_in_2_ ( |
| .A0(chanx_left_in[19]), |
| .A1(chanx_right_in[11]), |
| .S(\mem_top_ipin_6.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l2_in_3_ ( |
| .A0(_00_), |
| .A1(chanx_right_in[19]), |
| .S(\mem_top_ipin_6.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_6.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_6.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_6.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_6.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_6.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_6.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_6_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_7.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l1_in_1_ ( |
| .A0(chanx_right_in[2]), |
| .A1(chanx_left_in[2]), |
| .S(\mem_top_ipin_7.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l1_in_2_ ( |
| .A0(chanx_right_in[8]), |
| .A1(chanx_left_in[8]), |
| .S(\mem_top_ipin_7.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_7.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l2_in_1_ ( |
| .A0(chanx_left_in[12]), |
| .A1(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_7.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l2_in_2_ ( |
| .A0(chanx_left_in[18]), |
| .A1(chanx_right_in[12]), |
| .S(\mem_top_ipin_7.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l2_in_3_ ( |
| .A0(_01_), |
| .A1(chanx_right_in[18]), |
| .S(\mem_top_ipin_7.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_7.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_7.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_7.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_top_ipin_7.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_7.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_7.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_7_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l1_in_0_ ( |
| .A0(chanx_right_in[1]), |
| .A1(chanx_left_in[1]), |
| .S(\mem_top_ipin_8.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l1_in_1_ ( |
| .A0(chanx_right_in[3]), |
| .A1(chanx_left_in[3]), |
| .S(\mem_top_ipin_8.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l1_in_2_ ( |
| .A0(chanx_right_in[9]), |
| .A1(chanx_left_in[9]), |
| .S(\mem_top_ipin_8.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l2_in_0_ ( |
| .A0(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_1_X ), |
| .A1(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_8.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l2_in_1_ ( |
| .A0(chanx_left_in[13]), |
| .A1(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_2_X ), |
| .S(\mem_top_ipin_8.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l2_in_2_ ( |
| .A0(chanx_left_in[19]), |
| .A1(chanx_right_in[13]), |
| .S(\mem_top_ipin_8.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l2_in_3_ ( |
| .A0(_02_), |
| .A1(chanx_right_in[19]), |
| .S(\mem_top_ipin_8.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_8.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_8.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_8_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_8.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_8_X ), |
| .A1(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_7_X ), |
| .S(\mem_top_ipin_8.ccff_tail ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_9_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_8.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_8.sky130_fd_sc_hd__mux2_1_9_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_8_) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l1_in_0_ ( |
| .A0(chanx_right_in[0]), |
| .A1(chanx_left_in[0]), |
| .S(\mem_top_ipin_9.mem_out[0] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_0_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l2_in_0_ ( |
| .A0(chanx_left_in[2]), |
| .A1(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_0_X ), |
| .S(\mem_top_ipin_9.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_1_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l2_in_1_ ( |
| .A0(chanx_left_in[6]), |
| .A1(chanx_right_in[2]), |
| .S(\mem_top_ipin_9.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_2_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l2_in_2_ ( |
| .A0(chanx_left_in[14]), |
| .A1(chanx_right_in[6]), |
| .S(\mem_top_ipin_9.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_3_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l2_in_3_ ( |
| .A0(_03_), |
| .A1(chanx_right_in[14]), |
| .S(\mem_top_ipin_9.mem_out[1] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_4_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l3_in_0_ ( |
| .A0(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_2_X ), |
| .A1(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_1_X ), |
| .S(\mem_top_ipin_9.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_5_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l3_in_1_ ( |
| .A0(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_4_X ), |
| .A1(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_3_X ), |
| .S(\mem_top_ipin_9.mem_out[2] ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_6_X ) |
| ); |
| sky130_fd_sc_hd__mux2_1 \mux_top_ipin_9.mux_l4_in_0_ ( |
| .A0(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_6_X ), |
| .A1(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_5_X ), |
| .S(\mem_top_ipin_10.ccff_head ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_7_X ) |
| ); |
| sky130_fd_sc_hd__buf_4 \mux_top_ipin_9.sky130_fd_sc_hd__buf_4_0_ ( |
| .A(\mux_top_ipin_9.sky130_fd_sc_hd__mux2_1_7_X ), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(bottom_grid_pin_9_) |
| ); |
| sky130_fd_sc_hd__buf_8 prog_clk_0_FTB00 ( |
| .A(prog_clk_0_S_in), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ) |
| ); |
| sky130_fd_sc_hd__buf_4 prog_clk_0_W_FTB01 ( |
| .A(prog_clk_0_S_in), |
| .VGND(VGND), |
| .VNB(VGND), |
| .VPB(VPWR), |
| .VPWR(VPWR), |
| .X(prog_clk_0_W_out) |
| ); |
| endmodule |