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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-030 / 53ba2391592bc54fdee71e7e20d624213756d176 / . / verilog / gl / user_project / gl / cby_2__1_.v
blob: a8cba94d9a0f8d244c8cbd4aa02f59c38323b957 [file] [log] [blame]
/* Generated by Yosys 0.9+3621 (git sha1 84e9fa7, gcc 8.3.1 -fPIC -Os) */
module cby_2__1_(IO_ISOL_N, ccff_head, ccff_tail, gfpga_pad_EMBEDDED_IO_HD_SOC_DIR, gfpga_pad_EMBEDDED_IO_HD_SOC_IN, gfpga_pad_EMBEDDED_IO_HD_SOC_OUT, left_grid_pin_16_, left_grid_pin_17_, left_grid_pin_18_, left_grid_pin_19_, left_grid_pin_20_, left_grid_pin_21_, left_grid_pin_22_, left_grid_pin_23_, left_grid_pin_24_, left_grid_pin_25_, left_grid_pin_26_, left_grid_pin_27_, left_grid_pin_28_, left_grid_pin_29_, left_grid_pin_30_, left_grid_pin_31_, left_width_0_height_0__pin_0_, left_width_0_height_0__pin_1_lower, left_width_0_height_0__pin_1_upper, prog_clk_0_N_out, prog_clk_0_S_out, prog_clk_0_W_in, right_grid_pin_0_, VPWR, VGND, chany_bottom_in, chany_bottom_out, chany_top_in, chany_top_out);
input IO_ISOL_N;
input VGND;
input VPWR;
wire _00_;
wire _01_;
wire _02_;
wire _03_;
wire _04_;
wire _05_;
wire _06_;
wire _07_;
wire _08_;
wire _09_;
wire _10_;
wire _11_;
wire _12_;
wire _13_;
wire _14_;
wire _15_;
wire _16_;
input ccff_head;
output ccff_tail;
input [19:0] chany_bottom_in;
output [19:0] chany_bottom_out;
input [19:0] chany_top_in;
output [19:0] chany_top_out;
wire \clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
output gfpga_pad_EMBEDDED_IO_HD_SOC_DIR;
input gfpga_pad_EMBEDDED_IO_HD_SOC_IN;
output gfpga_pad_EMBEDDED_IO_HD_SOC_OUT;
output left_grid_pin_16_;
output left_grid_pin_17_;
output left_grid_pin_18_;
output left_grid_pin_19_;
output left_grid_pin_20_;
output left_grid_pin_21_;
output left_grid_pin_22_;
output left_grid_pin_23_;
output left_grid_pin_24_;
output left_grid_pin_25_;
output left_grid_pin_26_;
output left_grid_pin_27_;
output left_grid_pin_28_;
output left_grid_pin_29_;
output left_grid_pin_30_;
output left_grid_pin_31_;
input left_width_0_height_0__pin_0_;
output left_width_0_height_0__pin_1_lower;
output left_width_0_height_0__pin_1_upper;
wire \logical_tile_io_mode_io__0.ccff_head ;
wire \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.SOC_DIR_N ;
wire \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ;
wire \mem_left_ipin_0.ccff_tail ;
wire \mem_left_ipin_0.mem_out[0] ;
wire \mem_left_ipin_0.mem_out[1] ;
wire \mem_left_ipin_0.mem_out[2] ;
wire \mem_right_ipin_0.ccff_tail ;
wire \mem_right_ipin_0.mem_out[0] ;
wire \mem_right_ipin_0.mem_out[1] ;
wire \mem_right_ipin_0.mem_out[2] ;
wire \mem_right_ipin_1.ccff_tail ;
wire \mem_right_ipin_1.mem_out[0] ;
wire \mem_right_ipin_1.mem_out[1] ;
wire \mem_right_ipin_1.mem_out[2] ;
wire \mem_right_ipin_10.ccff_head ;
wire \mem_right_ipin_10.ccff_tail ;
wire \mem_right_ipin_10.mem_out[0] ;
wire \mem_right_ipin_10.mem_out[1] ;
wire \mem_right_ipin_10.mem_out[2] ;
wire \mem_right_ipin_11.ccff_tail ;
wire \mem_right_ipin_11.mem_out[0] ;
wire \mem_right_ipin_11.mem_out[1] ;
wire \mem_right_ipin_11.mem_out[2] ;
wire \mem_right_ipin_12.ccff_tail ;
wire \mem_right_ipin_12.mem_out[0] ;
wire \mem_right_ipin_12.mem_out[1] ;
wire \mem_right_ipin_12.mem_out[2] ;
wire \mem_right_ipin_13.ccff_tail ;
wire \mem_right_ipin_13.mem_out[0] ;
wire \mem_right_ipin_13.mem_out[1] ;
wire \mem_right_ipin_13.mem_out[2] ;
wire \mem_right_ipin_14.ccff_tail ;
wire \mem_right_ipin_14.mem_out[0] ;
wire \mem_right_ipin_14.mem_out[1] ;
wire \mem_right_ipin_14.mem_out[2] ;
wire \mem_right_ipin_15.mem_out[0] ;
wire \mem_right_ipin_15.mem_out[1] ;
wire \mem_right_ipin_15.mem_out[2] ;
wire \mem_right_ipin_2.ccff_tail ;
wire \mem_right_ipin_2.mem_out[0] ;
wire \mem_right_ipin_2.mem_out[1] ;
wire \mem_right_ipin_2.mem_out[2] ;
wire \mem_right_ipin_3.ccff_tail ;
wire \mem_right_ipin_3.mem_out[0] ;
wire \mem_right_ipin_3.mem_out[1] ;
wire \mem_right_ipin_3.mem_out[2] ;
wire \mem_right_ipin_4.ccff_tail ;
wire \mem_right_ipin_4.mem_out[0] ;
wire \mem_right_ipin_4.mem_out[1] ;
wire \mem_right_ipin_4.mem_out[2] ;
wire \mem_right_ipin_5.ccff_tail ;
wire \mem_right_ipin_5.mem_out[0] ;
wire \mem_right_ipin_5.mem_out[1] ;
wire \mem_right_ipin_5.mem_out[2] ;
wire \mem_right_ipin_6.ccff_tail ;
wire \mem_right_ipin_6.mem_out[0] ;
wire \mem_right_ipin_6.mem_out[1] ;
wire \mem_right_ipin_6.mem_out[2] ;
wire \mem_right_ipin_7.ccff_tail ;
wire \mem_right_ipin_7.mem_out[0] ;
wire \mem_right_ipin_7.mem_out[1] ;
wire \mem_right_ipin_7.mem_out[2] ;
wire \mem_right_ipin_8.ccff_tail ;
wire \mem_right_ipin_8.mem_out[0] ;
wire \mem_right_ipin_8.mem_out[1] ;
wire \mem_right_ipin_8.mem_out[2] ;
wire \mem_right_ipin_9.mem_out[0] ;
wire \mem_right_ipin_9.mem_out[1] ;
wire \mem_right_ipin_9.mem_out[2] ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_7_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_8_X ;
wire \mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_9_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_0_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_1_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_2_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_3_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_4_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_5_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_6_X ;
wire \mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_7_X ;
output prog_clk_0_N_out;
output prog_clk_0_S_out;
input prog_clk_0_W_in;
output right_grid_pin_0_;
sky130_fd_sc_hd__diode_2 ANTENNA__34__A (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__35__A (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__36__A (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__37__A (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__38__A (
.DIODE(chany_top_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__39__A (
.DIODE(chany_top_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__40__A (
.DIODE(chany_top_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__41__A (
.DIODE(chany_top_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__42__A (
.DIODE(chany_top_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__43__A (
.DIODE(chany_top_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__44__A (
.DIODE(chany_top_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__45__A (
.DIODE(chany_top_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__46__A (
.DIODE(chany_top_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__47__A (
.DIODE(chany_top_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__48__A (
.DIODE(chany_top_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__49__A (
.DIODE(chany_top_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__50__A (
.DIODE(chany_top_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__51__A (
.DIODE(chany_top_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__52__A (
.DIODE(chany_top_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__53__A (
.DIODE(chany_top_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__54__A (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__55__A (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__56__A (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__57__A (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__58__A (
.DIODE(chany_bottom_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__59__A (
.DIODE(chany_bottom_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__60__A (
.DIODE(chany_bottom_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__61__A (
.DIODE(chany_bottom_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__62__A (
.DIODE(chany_bottom_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__63__A (
.DIODE(chany_bottom_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__64__A (
.DIODE(chany_bottom_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__65__A (
.DIODE(chany_bottom_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__66__A (
.DIODE(chany_bottom_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__67__A (
.DIODE(chany_bottom_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__68__A (
.DIODE(chany_bottom_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__69__A (
.DIODE(chany_bottom_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__70__A (
.DIODE(chany_bottom_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__71__A (
.DIODE(chany_bottom_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__72__A (
.DIODE(chany_bottom_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__73__A (
.DIODE(chany_bottom_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA__74__A (
.DIODE(left_width_0_height_0__pin_1_lower),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.IN_PROTECT_GATE_A (
.DIODE(gfpga_pad_EMBEDDED_IO_HD_SOC_IN),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.ISOL_EN_GATE_B_N (
.DIODE(IO_ISOL_N),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.OUT_PROTECT_GATE_A (
.DIODE(left_width_0_height_0__pin_0_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mem_left_ipin_0.sky130_fd_sc_hd__dfxtp_1_0__D (
.DIODE(ccff_head),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l1_in_1__A0 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l1_in_2__A0 (
.DIODE(chany_top_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l2_in_2__A1 (
.DIODE(chany_top_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_left_ipin_0.mux_l2_in_3__A1 (
.DIODE(chany_top_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l1_in_1__A0 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l1_in_2__A0 (
.DIODE(chany_top_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l2_in_2__A1 (
.DIODE(chany_top_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_0.mux_l2_in_3__A1 (
.DIODE(chany_top_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l2_in_1__A1 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l2_in_2__A1 (
.DIODE(chany_top_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_1.mux_l2_in_3__A1 (
.DIODE(chany_top_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l2_in_1__A1 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l2_in_2__A1 (
.DIODE(chany_top_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_10.mux_l2_in_3__A1 (
.DIODE(chany_top_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l1_in_1__A0 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l1_in_2__A0 (
.DIODE(chany_top_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l2_in_2__A1 (
.DIODE(chany_top_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_11.mux_l2_in_3__A1 (
.DIODE(chany_top_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l1_in_1__A0 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l1_in_2__A0 (
.DIODE(chany_top_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l2_in_2__A1 (
.DIODE(chany_top_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_12.mux_l2_in_3__A1 (
.DIODE(chany_top_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l2_in_1__A1 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l2_in_2__A1 (
.DIODE(chany_top_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_13.mux_l2_in_3__A1 (
.DIODE(chany_top_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l2_in_1__A1 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l2_in_2__A1 (
.DIODE(chany_top_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_14.mux_l2_in_3__A1 (
.DIODE(chany_top_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l1_in_1__A0 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l1_in_2__A0 (
.DIODE(chany_top_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l2_in_2__A1 (
.DIODE(chany_top_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_15.mux_l2_in_3__A1 (
.DIODE(chany_top_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l2_in_1__A1 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l2_in_2__A1 (
.DIODE(chany_top_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_2.mux_l2_in_3__A1 (
.DIODE(chany_top_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l1_in_1__A0 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l1_in_2__A0 (
.DIODE(chany_top_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l2_in_2__A1 (
.DIODE(chany_top_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_3.mux_l2_in_3__A1 (
.DIODE(chany_top_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l1_in_1__A0 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l1_in_2__A0 (
.DIODE(chany_top_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l2_in_2__A1 (
.DIODE(chany_top_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_4.mux_l2_in_3__A1 (
.DIODE(chany_top_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l2_in_1__A1 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l2_in_2__A1 (
.DIODE(chany_top_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_5.mux_l2_in_3__A1 (
.DIODE(chany_top_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l2_in_1__A1 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l2_in_2__A1 (
.DIODE(chany_top_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_6.mux_l2_in_3__A1 (
.DIODE(chany_top_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l1_in_1__A0 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l1_in_2__A0 (
.DIODE(chany_top_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l2_in_2__A1 (
.DIODE(chany_top_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_7.mux_l2_in_3__A1 (
.DIODE(chany_top_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l1_in_0__A0 (
.DIODE(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l1_in_1__A0 (
.DIODE(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l1_in_1__A1 (
.DIODE(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l1_in_2__A0 (
.DIODE(chany_top_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l1_in_2__A1 (
.DIODE(chany_bottom_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l2_in_2__A1 (
.DIODE(chany_top_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_8.mux_l2_in_3__A1 (
.DIODE(chany_top_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l1_in_0__A0 (
.DIODE(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l1_in_0__A1 (
.DIODE(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l2_in_0__A0 (
.DIODE(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l2_in_1__A0 (
.DIODE(chany_bottom_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l2_in_1__A1 (
.DIODE(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l2_in_2__A0 (
.DIODE(chany_bottom_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l2_in_2__A1 (
.DIODE(chany_top_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 \ANTENNA_mux_right_ipin_9.mux_l2_in_3__A1 (
.DIODE(chany_top_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA_prog_clk_0_FTB00_A (
.DIODE(prog_clk_0_W_in),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA_prog_clk_0_N_FTB01_A (
.DIODE(prog_clk_0_W_in),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__diode_2 ANTENNA_prog_clk_0_S_FTB01_A (
.DIODE(prog_clk_0_W_in),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_0_123 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_0_146 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_0_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_0_156 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_0_28 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_0_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_0_83 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_0_9 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_0_98 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_10_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_10_117 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_10_133 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_10_145 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_10_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_10_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_10_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_10_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_10_36 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_10_71 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_10_93 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_11_112 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_11_127 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_11_145 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_11_157 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_11_16 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_11_22 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_11_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_11_78 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_11_93 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_12_144 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_12_15 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_12_152 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_12_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_12_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_12_27 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_12_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_12_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_13_110 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_13_141 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_13_146 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_13_15 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_13_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_13_19 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_13_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_13_36 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_13_45 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_13_49 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_13_56 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_13_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_13_62 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_13_74 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_13_94 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_14_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_14_105 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_14_111 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_14_128 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_14_134 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_14_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_14_29 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_14_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_14_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_14_38 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_14_42 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_14_91 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_14_93 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_15_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_15_123 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_15_145 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_15_157 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_15_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_15_50 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_15_62 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_15_91 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_15_94 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_16_113 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_16_131 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_16_143 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_16_151 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_16_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_16_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_16_19 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_16_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_16_48 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_16_52 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_16_71 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_16_9 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_16_97 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_17_117 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_17_121 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_17_136 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_17_148 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_17_156 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_17_19 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_17_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_17_77 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_17_81 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_17_91 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_18_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_18_127 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_18_140 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_18_152 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_18_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_18_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_18_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_18_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_18_39 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_18_88 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_18_93 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_19_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_19_119 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_19_136 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_19_148 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_19_157 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_19_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_19_39 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_19_45 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_19_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_19_80 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_1_112 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_1_128 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_1_145 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_1_157 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_1_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_20_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_20_113 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_20_137 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_20_149 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_20_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_20_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_20_18 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_20_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_20_30 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_20_36 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_20_42 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_20_53 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_20_59 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_20_62 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_20_90 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_20_96 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_21_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_21_107 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_21_115 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_21_123 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_21_149 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_21_153 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_21_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_21_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_21_78 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_21_95 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_22_125 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_22_139 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_22_156 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_22_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_22_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_22_78 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_23_118 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_23_141 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_23_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_23_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_23_52 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_23_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_23_64 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_23_69 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_24_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_24_124 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_24_156 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_24_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_24_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_24_44 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_24_61 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_24_65 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_24_91 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_25_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_25_134 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_25_16 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_25_20 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_25_29 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_25_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_25_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_25_38 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_25_43 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_25_47 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_25_51 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_25_78 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_26_124 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_26_152 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_26_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_26_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_26_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_26_30 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_26_36 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_26_67 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_27_11 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_27_115 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_27_123 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_27_141 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_27_156 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_27_19 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_27_24 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_27_28 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_27_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_27_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_27_44 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_27_52 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_27_55 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_27_61 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_27_73 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_27_80 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_27_90 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_27_96 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_2_11 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_2_139 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_2_147 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_2_151 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_2_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_2_16 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_2_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_2_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_2_91 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_3_136 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_3_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_3_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_3_38 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_3_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_3_62 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_3_90 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_116 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_4_133 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_4_157 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_16 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_30 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_4_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_36 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_42 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_4_49 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_91 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_4_95 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_5_121 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_5_15 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_5_155 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_5_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_5_43 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_5_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_5_62 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_5_95 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_6_105 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_6_117 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_6_129 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_6_141 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_6_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_6_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_6_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_6_30 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_6_48 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_6_52 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_6_91 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_6_97 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_7_112 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_7_118 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_7_123 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_7_135 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_7_147 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_7_19 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_7_39 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_7_43 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_7_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_7_68 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_7_76 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_7_97 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_8_111 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_8_139 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_8_151 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_8_154 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_8_158 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_8_21 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_8_29 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_8_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_8_62 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_8_79 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_8_87 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_9_121 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_12 FILLER_9_136 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_8 FILLER_9_148 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 FILLER_9_156 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_6 FILLER_9_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_2 FILLER_9_41 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_4 FILLER_9_45 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__fill_1 FILLER_9_60 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_0 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_1 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_10 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_100 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_101 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_102 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_103 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_104 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_105 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_106 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_107 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_108 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_109 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_11 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_110 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_111 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_112 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_113 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_114 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_115 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_116 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_117 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_118 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_119 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_12 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_120 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_121 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_122 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_123 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_124 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_125 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_126 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_127 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_128 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_129 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_13 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_130 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_14 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_15 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_16 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_17 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_18 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_19 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_2 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_20 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_21 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_22 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_23 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_24 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_25 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_26 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_27 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_28 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_29 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_3 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_30 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_31 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_32 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_33 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_34 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_35 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_36 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_37 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_38 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_39 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_4 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_40 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_41 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_42 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_43 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_44 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_45 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_46 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_47 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_48 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_49 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_5 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_50 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_51 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_52 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_53 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_54 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_55 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_56 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_57 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_58 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_59 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_6 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_60 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_61 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_62 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_63 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_64 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_65 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_66 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_67 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_68 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_69 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_7 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_70 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_71 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_72 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_73 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_74 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_75 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_76 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_77 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_78 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_79 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_8 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_80 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_81 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_82 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_83 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_84 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_85 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_86 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_87 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_88 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_89 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__decap_3 PHY_9 (
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_90 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_91 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_92 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_93 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_94 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_95 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_96 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_97 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_98 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_99 (
.VGND(VGND),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _17_ (
.HI(_16_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _18_ (
.HI(_00_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _19_ (
.HI(_01_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _20_ (
.HI(_02_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _21_ (
.HI(_03_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _22_ (
.HI(_04_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _23_ (
.HI(_05_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _24_ (
.HI(_06_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _25_ (
.HI(_07_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _26_ (
.HI(_08_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _27_ (
.HI(_09_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _28_ (
.HI(_10_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _29_ (
.HI(_11_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _30_ (
.HI(_12_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _31_ (
.HI(_13_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _32_ (
.HI(_14_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__conb_1 _33_ (
.HI(_15_),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__buf_2 _34_ (
.A(chany_top_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[0])
);
sky130_fd_sc_hd__buf_2 _35_ (
.A(chany_top_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[1])
);
sky130_fd_sc_hd__buf_2 _36_ (
.A(chany_top_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[2])
);
sky130_fd_sc_hd__buf_2 _37_ (
.A(chany_top_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[3])
);
sky130_fd_sc_hd__buf_2 _38_ (
.A(chany_top_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[4])
);
sky130_fd_sc_hd__buf_2 _39_ (
.A(chany_top_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[5])
);
sky130_fd_sc_hd__buf_2 _40_ (
.A(chany_top_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[6])
);
sky130_fd_sc_hd__buf_2 _41_ (
.A(chany_top_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[7])
);
sky130_fd_sc_hd__buf_2 _42_ (
.A(chany_top_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[8])
);
sky130_fd_sc_hd__buf_2 _43_ (
.A(chany_top_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[9])
);
sky130_fd_sc_hd__buf_2 _44_ (
.A(chany_top_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[10])
);
sky130_fd_sc_hd__buf_2 _45_ (
.A(chany_top_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[11])
);
sky130_fd_sc_hd__buf_2 _46_ (
.A(chany_top_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[12])
);
sky130_fd_sc_hd__buf_2 _47_ (
.A(chany_top_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[13])
);
sky130_fd_sc_hd__buf_2 _48_ (
.A(chany_top_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[14])
);
sky130_fd_sc_hd__buf_2 _49_ (
.A(chany_top_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[15])
);
sky130_fd_sc_hd__buf_2 _50_ (
.A(chany_top_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[16])
);
sky130_fd_sc_hd__buf_2 _51_ (
.A(chany_top_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[17])
);
sky130_fd_sc_hd__buf_2 _52_ (
.A(chany_top_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[18])
);
sky130_fd_sc_hd__buf_2 _53_ (
.A(chany_top_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_bottom_out[19])
);
sky130_fd_sc_hd__buf_2 _54_ (
.A(chany_bottom_in[0]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[0])
);
sky130_fd_sc_hd__buf_2 _55_ (
.A(chany_bottom_in[1]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[1])
);
sky130_fd_sc_hd__buf_2 _56_ (
.A(chany_bottom_in[2]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[2])
);
sky130_fd_sc_hd__buf_2 _57_ (
.A(chany_bottom_in[3]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[3])
);
sky130_fd_sc_hd__buf_2 _58_ (
.A(chany_bottom_in[4]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[4])
);
sky130_fd_sc_hd__buf_2 _59_ (
.A(chany_bottom_in[5]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[5])
);
sky130_fd_sc_hd__buf_2 _60_ (
.A(chany_bottom_in[6]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[6])
);
sky130_fd_sc_hd__buf_2 _61_ (
.A(chany_bottom_in[7]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[7])
);
sky130_fd_sc_hd__buf_2 _62_ (
.A(chany_bottom_in[8]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[8])
);
sky130_fd_sc_hd__buf_2 _63_ (
.A(chany_bottom_in[9]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[9])
);
sky130_fd_sc_hd__buf_2 _64_ (
.A(chany_bottom_in[10]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[10])
);
sky130_fd_sc_hd__buf_2 _65_ (
.A(chany_bottom_in[11]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[11])
);
sky130_fd_sc_hd__buf_2 _66_ (
.A(chany_bottom_in[12]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[12])
);
sky130_fd_sc_hd__buf_2 _67_ (
.A(chany_bottom_in[13]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[13])
);
sky130_fd_sc_hd__buf_2 _68_ (
.A(chany_bottom_in[14]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[14])
);
sky130_fd_sc_hd__buf_2 _69_ (
.A(chany_bottom_in[15]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[15])
);
sky130_fd_sc_hd__buf_2 _70_ (
.A(chany_bottom_in[16]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[16])
);
sky130_fd_sc_hd__buf_2 _71_ (
.A(chany_bottom_in[17]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[17])
);
sky130_fd_sc_hd__buf_2 _72_ (
.A(chany_bottom_in[18]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[18])
);
sky130_fd_sc_hd__buf_2 _73_ (
.A(chany_bottom_in[19]),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(chany_top_out[19])
);
sky130_fd_sc_hd__buf_2 _74_ (
.A(left_width_0_height_0__pin_1_lower),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_width_0_height_0__pin_1_upper)
);
sky130_fd_sc_hd__clkbuf_16 \clkbuf_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_1_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_1_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__clkbuf_1 \clkbuf_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk (
.A(\clknet_2_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__inv_1 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.INV_SOC_DIR (
.A(gfpga_pad_EMBEDDED_IO_HD_SOC_DIR),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.Y(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.SOC_DIR_N )
);
sky130_fd_sc_hd__ebufn_4 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.IN_PROTECT_GATE (
.A(gfpga_pad_EMBEDDED_IO_HD_SOC_IN),
.TE_B(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.SOC_DIR_N ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.Z(left_width_0_height_0__pin_1_lower)
);
sky130_fd_sc_hd__or2b_4 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.ISOL_EN_GATE (
.A(ccff_tail),
.B_N(IO_ISOL_N),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(gfpga_pad_EMBEDDED_IO_HD_SOC_DIR)
);
sky130_fd_sc_hd__ebufn_4 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_0_.OUT_PROTECT_GATE (
.A(left_width_0_height_0__pin_0_),
.TE_B(gfpga_pad_EMBEDDED_IO_HD_SOC_DIR),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.Z(gfpga_pad_EMBEDDED_IO_HD_SOC_OUT)
);
sky130_fd_sc_hd__dfxtp_1 \logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\logical_tile_io_mode_io__0.ccff_head ),
.Q(ccff_tail),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_left_ipin_0.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(ccff_head),
.Q(\mem_left_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_left_ipin_0.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_left_ipin_0.mem_out[0] ),
.Q(\mem_left_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_left_ipin_0.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_left_ipin_0.mem_out[1] ),
.Q(\mem_left_ipin_0.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_left_ipin_0.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_left_ipin_0.mem_out[2] ),
.Q(\mem_left_ipin_0.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_0.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_left_ipin_0.ccff_tail ),
.Q(\mem_right_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_0.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_0.mem_out[0] ),
.Q(\mem_right_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_0.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_0.mem_out[1] ),
.Q(\mem_right_ipin_0.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_0.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_0.mem_out[2] ),
.Q(\mem_right_ipin_0.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_1.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_0.ccff_tail ),
.Q(\mem_right_ipin_1.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_1.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_1.mem_out[0] ),
.Q(\mem_right_ipin_1.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_1.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_1.mem_out[1] ),
.Q(\mem_right_ipin_1.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_1.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_1.mem_out[2] ),
.Q(\mem_right_ipin_1.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_10.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_10.ccff_head ),
.Q(\mem_right_ipin_10.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_10.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_10.mem_out[0] ),
.Q(\mem_right_ipin_10.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_10.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_10.mem_out[1] ),
.Q(\mem_right_ipin_10.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_10.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_10.mem_out[2] ),
.Q(\mem_right_ipin_10.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_11.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_10.ccff_tail ),
.Q(\mem_right_ipin_11.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_11.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_11.mem_out[0] ),
.Q(\mem_right_ipin_11.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_11.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_11.mem_out[1] ),
.Q(\mem_right_ipin_11.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_11.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_11.mem_out[2] ),
.Q(\mem_right_ipin_11.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_12.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_11.ccff_tail ),
.Q(\mem_right_ipin_12.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_12.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_12.mem_out[0] ),
.Q(\mem_right_ipin_12.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_12.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_12.mem_out[1] ),
.Q(\mem_right_ipin_12.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_12.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_12.mem_out[2] ),
.Q(\mem_right_ipin_12.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_13.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_12.ccff_tail ),
.Q(\mem_right_ipin_13.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_13.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_13.mem_out[0] ),
.Q(\mem_right_ipin_13.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_13.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_13.mem_out[1] ),
.Q(\mem_right_ipin_13.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_13.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_13.mem_out[2] ),
.Q(\mem_right_ipin_13.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_14.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_5_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_13.ccff_tail ),
.Q(\mem_right_ipin_14.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_14.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_14.mem_out[0] ),
.Q(\mem_right_ipin_14.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_14.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_14.mem_out[1] ),
.Q(\mem_right_ipin_14.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_14.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_14.mem_out[2] ),
.Q(\mem_right_ipin_14.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_15.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_14.ccff_tail ),
.Q(\mem_right_ipin_15.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_15.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_15.mem_out[0] ),
.Q(\mem_right_ipin_15.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_15.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_15.mem_out[1] ),
.Q(\mem_right_ipin_15.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_15.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_7_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_15.mem_out[2] ),
.Q(\logical_tile_io_mode_io__0.ccff_head ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_2.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_1.ccff_tail ),
.Q(\mem_right_ipin_2.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_2.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_2.mem_out[0] ),
.Q(\mem_right_ipin_2.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_2.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_2.mem_out[1] ),
.Q(\mem_right_ipin_2.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_2.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_2.mem_out[2] ),
.Q(\mem_right_ipin_2.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_3.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_2.ccff_tail ),
.Q(\mem_right_ipin_3.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_3.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_3.mem_out[0] ),
.Q(\mem_right_ipin_3.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_3.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_3.mem_out[1] ),
.Q(\mem_right_ipin_3.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_3.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_0_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_3.mem_out[2] ),
.Q(\mem_right_ipin_3.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_4.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_3.ccff_tail ),
.Q(\mem_right_ipin_4.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_4.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_4.mem_out[0] ),
.Q(\mem_right_ipin_4.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_4.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_4.mem_out[1] ),
.Q(\mem_right_ipin_4.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_4.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_4.mem_out[2] ),
.Q(\mem_right_ipin_4.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_5.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_4.ccff_tail ),
.Q(\mem_right_ipin_5.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_5.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_1_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_5.mem_out[0] ),
.Q(\mem_right_ipin_5.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_5.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_5.mem_out[1] ),
.Q(\mem_right_ipin_5.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_5.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_5.mem_out[2] ),
.Q(\mem_right_ipin_5.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_6.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_2_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_5.ccff_tail ),
.Q(\mem_right_ipin_6.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_6.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_6.mem_out[0] ),
.Q(\mem_right_ipin_6.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_6.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_6.mem_out[1] ),
.Q(\mem_right_ipin_6.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_6.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_6.mem_out[2] ),
.Q(\mem_right_ipin_6.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_7.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_6.ccff_tail ),
.Q(\mem_right_ipin_7.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_7.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_3_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_7.mem_out[0] ),
.Q(\mem_right_ipin_7.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_7.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_7.mem_out[1] ),
.Q(\mem_right_ipin_7.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_7.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_7.mem_out[2] ),
.Q(\mem_right_ipin_7.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_8.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_7.ccff_tail ),
.Q(\mem_right_ipin_8.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_8.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_8.mem_out[0] ),
.Q(\mem_right_ipin_8.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_8.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_6_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_8.mem_out[1] ),
.Q(\mem_right_ipin_8.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_8.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_8.mem_out[2] ),
.Q(\mem_right_ipin_8.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_9.sky130_fd_sc_hd__dfxtp_1_0_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_8.ccff_tail ),
.Q(\mem_right_ipin_9.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_9.sky130_fd_sc_hd__dfxtp_1_1_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_9.mem_out[0] ),
.Q(\mem_right_ipin_9.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_9.sky130_fd_sc_hd__dfxtp_1_2_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_9.mem_out[1] ),
.Q(\mem_right_ipin_9.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__dfxtp_1 \mem_right_ipin_9.sky130_fd_sc_hd__dfxtp_1_3_ (
.CLK(\clknet_3_4_0_logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk ),
.D(\mem_right_ipin_9.mem_out[2] ),
.Q(\mem_right_ipin_10.ccff_head ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR)
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_left_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l1_in_1_ (
.A0(chany_top_in[2]),
.A1(chany_bottom_in[2]),
.S(\mem_left_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l1_in_2_ (
.A0(chany_top_in[4]),
.A1(chany_bottom_in[4]),
.S(\mem_left_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l2_in_0_ (
.A0(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_left_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l2_in_1_ (
.A0(chany_bottom_in[10]),
.A1(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_left_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l2_in_2_ (
.A0(chany_bottom_in[16]),
.A1(chany_top_in[10]),
.S(\mem_left_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l2_in_3_ (
.A0(_04_),
.A1(chany_top_in[16]),
.S(\mem_left_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l3_in_0_ (
.A0(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_left_ipin_0.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l3_in_1_ (
.A0(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_left_ipin_0.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_left_ipin_0.mux_l4_in_0_ (
.A0(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_left_ipin_0.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_left_ipin_0.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_left_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(right_grid_pin_0_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l1_in_1_ (
.A0(chany_top_in[3]),
.A1(chany_bottom_in[3]),
.S(\mem_right_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l1_in_2_ (
.A0(chany_top_in[5]),
.A1(chany_bottom_in[5]),
.S(\mem_right_ipin_0.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l2_in_0_ (
.A0(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l2_in_1_ (
.A0(chany_bottom_in[11]),
.A1(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l2_in_2_ (
.A0(chany_bottom_in[17]),
.A1(chany_top_in[11]),
.S(\mem_right_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l2_in_3_ (
.A0(_05_),
.A1(chany_top_in[17]),
.S(\mem_right_ipin_0.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l3_in_0_ (
.A0(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_0.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l3_in_1_ (
.A0(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_0.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_0.mux_l4_in_0_ (
.A0(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_right_ipin_0.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_0.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_0.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_16_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_1.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l2_in_0_ (
.A0(chany_bottom_in[2]),
.A1(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_1.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l2_in_1_ (
.A0(chany_bottom_in[6]),
.A1(chany_top_in[2]),
.S(\mem_right_ipin_1.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l2_in_2_ (
.A0(chany_bottom_in[14]),
.A1(chany_top_in[6]),
.S(\mem_right_ipin_1.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l2_in_3_ (
.A0(_06_),
.A1(chany_top_in[14]),
.S(\mem_right_ipin_1.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l3_in_0_ (
.A0(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_1.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l3_in_1_ (
.A0(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_1.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_1.mux_l4_in_0_ (
.A0(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_1.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_1.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_1.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_17_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_10.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l2_in_0_ (
.A0(chany_bottom_in[3]),
.A1(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_10.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l2_in_1_ (
.A0(chany_bottom_in[7]),
.A1(chany_top_in[3]),
.S(\mem_right_ipin_10.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l2_in_2_ (
.A0(chany_bottom_in[15]),
.A1(chany_top_in[7]),
.S(\mem_right_ipin_10.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l2_in_3_ (
.A0(_07_),
.A1(chany_top_in[15]),
.S(\mem_right_ipin_10.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l3_in_0_ (
.A0(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_10.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l3_in_1_ (
.A0(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_10.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_10.mux_l4_in_0_ (
.A0(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_10.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_10.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_10.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_26_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_11.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l1_in_1_ (
.A0(chany_top_in[2]),
.A1(chany_bottom_in[2]),
.S(\mem_right_ipin_11.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l1_in_2_ (
.A0(chany_top_in[6]),
.A1(chany_bottom_in[6]),
.S(\mem_right_ipin_11.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l2_in_0_ (
.A0(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_11.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l2_in_1_ (
.A0(chany_bottom_in[12]),
.A1(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_11.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l2_in_2_ (
.A0(chany_bottom_in[16]),
.A1(chany_top_in[12]),
.S(\mem_right_ipin_11.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l2_in_3_ (
.A0(_08_),
.A1(chany_top_in[16]),
.S(\mem_right_ipin_11.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l3_in_0_ (
.A0(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_11.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l3_in_1_ (
.A0(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_11.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_11.mux_l4_in_0_ (
.A0(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_right_ipin_11.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_11.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_11.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_27_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_12.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l1_in_1_ (
.A0(chany_top_in[3]),
.A1(chany_bottom_in[3]),
.S(\mem_right_ipin_12.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l1_in_2_ (
.A0(chany_top_in[7]),
.A1(chany_bottom_in[7]),
.S(\mem_right_ipin_12.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l2_in_0_ (
.A0(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_12.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l2_in_1_ (
.A0(chany_bottom_in[13]),
.A1(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_12.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l2_in_2_ (
.A0(chany_bottom_in[17]),
.A1(chany_top_in[13]),
.S(\mem_right_ipin_12.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l2_in_3_ (
.A0(_09_),
.A1(chany_top_in[17]),
.S(\mem_right_ipin_12.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l3_in_0_ (
.A0(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_12.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l3_in_1_ (
.A0(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_12.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_12.mux_l4_in_0_ (
.A0(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_right_ipin_12.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_12.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_12.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_28_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_13.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l2_in_0_ (
.A0(chany_bottom_in[2]),
.A1(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_13.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l2_in_1_ (
.A0(chany_bottom_in[10]),
.A1(chany_top_in[2]),
.S(\mem_right_ipin_13.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l2_in_2_ (
.A0(chany_bottom_in[18]),
.A1(chany_top_in[10]),
.S(\mem_right_ipin_13.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l2_in_3_ (
.A0(_10_),
.A1(chany_top_in[18]),
.S(\mem_right_ipin_13.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l3_in_0_ (
.A0(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_13.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l3_in_1_ (
.A0(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_13.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_13.mux_l4_in_0_ (
.A0(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_13.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_13.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_13.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_29_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_14.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l2_in_0_ (
.A0(chany_bottom_in[3]),
.A1(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_14.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l2_in_1_ (
.A0(chany_bottom_in[11]),
.A1(chany_top_in[3]),
.S(\mem_right_ipin_14.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l2_in_2_ (
.A0(chany_bottom_in[19]),
.A1(chany_top_in[11]),
.S(\mem_right_ipin_14.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l2_in_3_ (
.A0(_11_),
.A1(chany_top_in[19]),
.S(\mem_right_ipin_14.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l3_in_0_ (
.A0(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_14.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l3_in_1_ (
.A0(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_14.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_14.mux_l4_in_0_ (
.A0(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_14.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_14.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_14.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_30_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_15.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l1_in_1_ (
.A0(chany_top_in[2]),
.A1(chany_bottom_in[2]),
.S(\mem_right_ipin_15.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l1_in_2_ (
.A0(chany_top_in[4]),
.A1(chany_bottom_in[4]),
.S(\mem_right_ipin_15.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l2_in_0_ (
.A0(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_15.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l2_in_1_ (
.A0(chany_bottom_in[10]),
.A1(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_15.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l2_in_2_ (
.A0(chany_bottom_in[16]),
.A1(chany_top_in[10]),
.S(\mem_right_ipin_15.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l2_in_3_ (
.A0(_12_),
.A1(chany_top_in[16]),
.S(\mem_right_ipin_15.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l3_in_0_ (
.A0(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_15.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l3_in_1_ (
.A0(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_15.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_15.mux_l4_in_0_ (
.A0(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\logical_tile_io_mode_io__0.ccff_head ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_15.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_15.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_31_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_2.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l2_in_0_ (
.A0(chany_bottom_in[3]),
.A1(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_2.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l2_in_1_ (
.A0(chany_bottom_in[7]),
.A1(chany_top_in[3]),
.S(\mem_right_ipin_2.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l2_in_2_ (
.A0(chany_bottom_in[15]),
.A1(chany_top_in[7]),
.S(\mem_right_ipin_2.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l2_in_3_ (
.A0(_13_),
.A1(chany_top_in[15]),
.S(\mem_right_ipin_2.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l3_in_0_ (
.A0(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_2.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l3_in_1_ (
.A0(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_2.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_2.mux_l4_in_0_ (
.A0(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_2.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_2.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_2.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_18_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_3.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l1_in_1_ (
.A0(chany_top_in[2]),
.A1(chany_bottom_in[2]),
.S(\mem_right_ipin_3.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l1_in_2_ (
.A0(chany_top_in[4]),
.A1(chany_bottom_in[4]),
.S(\mem_right_ipin_3.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l2_in_0_ (
.A0(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_3.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l2_in_1_ (
.A0(chany_bottom_in[8]),
.A1(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_3.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l2_in_2_ (
.A0(chany_bottom_in[14]),
.A1(chany_top_in[8]),
.S(\mem_right_ipin_3.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l2_in_3_ (
.A0(_14_),
.A1(chany_top_in[14]),
.S(\mem_right_ipin_3.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l3_in_0_ (
.A0(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_3.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l3_in_1_ (
.A0(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_3.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_3.mux_l4_in_0_ (
.A0(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_right_ipin_3.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_3.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_3.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_19_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_4.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l1_in_1_ (
.A0(chany_top_in[3]),
.A1(chany_bottom_in[3]),
.S(\mem_right_ipin_4.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l1_in_2_ (
.A0(chany_top_in[5]),
.A1(chany_bottom_in[5]),
.S(\mem_right_ipin_4.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l2_in_0_ (
.A0(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_4.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l2_in_1_ (
.A0(chany_bottom_in[9]),
.A1(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_4.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l2_in_2_ (
.A0(chany_bottom_in[15]),
.A1(chany_top_in[9]),
.S(\mem_right_ipin_4.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l2_in_3_ (
.A0(_15_),
.A1(chany_top_in[15]),
.S(\mem_right_ipin_4.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l3_in_0_ (
.A0(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_4.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l3_in_1_ (
.A0(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_4.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_4.mux_l4_in_0_ (
.A0(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_right_ipin_4.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_4.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_4.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_20_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_5.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l2_in_0_ (
.A0(chany_bottom_in[2]),
.A1(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_5.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l2_in_1_ (
.A0(chany_bottom_in[10]),
.A1(chany_top_in[2]),
.S(\mem_right_ipin_5.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l2_in_2_ (
.A0(chany_bottom_in[18]),
.A1(chany_top_in[10]),
.S(\mem_right_ipin_5.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l2_in_3_ (
.A0(_16_),
.A1(chany_top_in[18]),
.S(\mem_right_ipin_5.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l3_in_0_ (
.A0(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_5.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l3_in_1_ (
.A0(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_5.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_5.mux_l4_in_0_ (
.A0(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_5.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_5.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_5.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_21_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_6.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l2_in_0_ (
.A0(chany_bottom_in[3]),
.A1(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_6.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l2_in_1_ (
.A0(chany_bottom_in[11]),
.A1(chany_top_in[3]),
.S(\mem_right_ipin_6.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l2_in_2_ (
.A0(chany_bottom_in[19]),
.A1(chany_top_in[11]),
.S(\mem_right_ipin_6.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l2_in_3_ (
.A0(_00_),
.A1(chany_top_in[19]),
.S(\mem_right_ipin_6.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l3_in_0_ (
.A0(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_6.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l3_in_1_ (
.A0(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_6.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_6.mux_l4_in_0_ (
.A0(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_6.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_6.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_6.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_22_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_7.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l1_in_1_ (
.A0(chany_top_in[2]),
.A1(chany_bottom_in[2]),
.S(\mem_right_ipin_7.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l1_in_2_ (
.A0(chany_top_in[8]),
.A1(chany_bottom_in[8]),
.S(\mem_right_ipin_7.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l2_in_0_ (
.A0(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_7.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l2_in_1_ (
.A0(chany_bottom_in[12]),
.A1(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_7.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l2_in_2_ (
.A0(chany_bottom_in[18]),
.A1(chany_top_in[12]),
.S(\mem_right_ipin_7.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l2_in_3_ (
.A0(_01_),
.A1(chany_top_in[18]),
.S(\mem_right_ipin_7.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l3_in_0_ (
.A0(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_7.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l3_in_1_ (
.A0(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_7.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_7.mux_l4_in_0_ (
.A0(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_right_ipin_7.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_7.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_7.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_23_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l1_in_0_ (
.A0(chany_top_in[1]),
.A1(chany_bottom_in[1]),
.S(\mem_right_ipin_8.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l1_in_1_ (
.A0(chany_top_in[3]),
.A1(chany_bottom_in[3]),
.S(\mem_right_ipin_8.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l1_in_2_ (
.A0(chany_top_in[9]),
.A1(chany_bottom_in[9]),
.S(\mem_right_ipin_8.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l2_in_0_ (
.A0(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_1_X ),
.A1(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_8.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l2_in_1_ (
.A0(chany_bottom_in[13]),
.A1(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_2_X ),
.S(\mem_right_ipin_8.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l2_in_2_ (
.A0(chany_bottom_in[19]),
.A1(chany_top_in[13]),
.S(\mem_right_ipin_8.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l2_in_3_ (
.A0(_02_),
.A1(chany_top_in[19]),
.S(\mem_right_ipin_8.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l3_in_0_ (
.A0(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_8.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l3_in_1_ (
.A0(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_8.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_8_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_8.mux_l4_in_0_ (
.A0(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_8_X ),
.A1(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_7_X ),
.S(\mem_right_ipin_8.ccff_tail ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_9_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_8.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_8.sky130_fd_sc_hd__mux2_1_9_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_24_)
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l1_in_0_ (
.A0(chany_top_in[0]),
.A1(chany_bottom_in[0]),
.S(\mem_right_ipin_9.mem_out[0] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_0_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l2_in_0_ (
.A0(chany_bottom_in[2]),
.A1(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_0_X ),
.S(\mem_right_ipin_9.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_1_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l2_in_1_ (
.A0(chany_bottom_in[6]),
.A1(chany_top_in[2]),
.S(\mem_right_ipin_9.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_2_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l2_in_2_ (
.A0(chany_bottom_in[14]),
.A1(chany_top_in[6]),
.S(\mem_right_ipin_9.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_3_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l2_in_3_ (
.A0(_03_),
.A1(chany_top_in[14]),
.S(\mem_right_ipin_9.mem_out[1] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_4_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l3_in_0_ (
.A0(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_2_X ),
.A1(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_1_X ),
.S(\mem_right_ipin_9.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_5_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l3_in_1_ (
.A0(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_4_X ),
.A1(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_3_X ),
.S(\mem_right_ipin_9.mem_out[2] ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_6_X )
);
sky130_fd_sc_hd__mux2_1 \mux_right_ipin_9.mux_l4_in_0_ (
.A0(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_6_X ),
.A1(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_5_X ),
.S(\mem_right_ipin_10.ccff_head ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_7_X )
);
sky130_fd_sc_hd__buf_4 \mux_right_ipin_9.sky130_fd_sc_hd__buf_4_0_ (
.A(\mux_right_ipin_9.sky130_fd_sc_hd__mux2_1_7_X ),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(left_grid_pin_25_)
);
sky130_fd_sc_hd__buf_8 prog_clk_0_FTB00 (
.A(prog_clk_0_W_in),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(\logical_tile_io_mode_io__0.ltile_phy_iopad_0.EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem.prog_clk )
);
sky130_fd_sc_hd__buf_4 prog_clk_0_N_FTB01 (
.A(prog_clk_0_W_in),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(prog_clk_0_N_out)
);
sky130_fd_sc_hd__buf_4 prog_clk_0_S_FTB01 (
.A(prog_clk_0_W_in),
.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR),
.X(prog_clk_0_S_out)
);
endmodule