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3e968450d5f49805454fa8f29e99f4c668a5830c
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verilog
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fwpayload
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fwrisc
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fwrisc_rv32imc
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tests
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unit
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arith_sub.S
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#include "unit_header.h"
entry
:
li x1
,
5
li x2
,
6
sub x3
,
x2
,
x1
j done
start_expected
:
.word
1
,
5
.word
2
,
6
.word
3
,
1
end_expected
:
