blob: 90f84008cc6ba18993a1096e55b55a9324aa68eb [file] [log] [blame]
Tim Edwards9eda80d2020-10-08 21:36:44 -04001module mprj_io #(
2 parameter AREA1PADS = 18 // Highest numbered pad in area 1
3) (
4 inout vddio,
5 inout vssio,
6 inout vdda,
7 inout vssa,
8 inout vccd,
9 inout vssd,
10
11 inout vdda1,
12 inout vdda2,
13 inout vssa1,
14 inout vssa2,
15 inout vccd1,
16 inout vccd2,
17 inout vssd1,
18 inout vssd2,
19
Tim Edwards04ba17f2020-10-02 22:27:50 -040020 input vddio_q,
21 input vssio_q,
22 input analog_a,
23 input analog_b,
Tim Edwards44bab472020-10-04 22:09:54 -040024 input porb_h,
25 input por,
26 inout [`MPRJ_IO_PADS-1:0] io,
Tim Edwards04ba17f2020-10-02 22:27:50 -040027 input [`MPRJ_IO_PADS-1:0] io_out,
Tim Edwards44bab472020-10-04 22:09:54 -040028 input [`MPRJ_IO_PADS-1:0] oeb,
shalan0d14e6e2020-08-31 16:50:48 +020029 input [`MPRJ_IO_PADS-1:0] hldh_n,
Tim Edwards04ba17f2020-10-02 22:27:50 -040030 input [`MPRJ_IO_PADS-1:0] enh,
shalan0d14e6e2020-08-31 16:50:48 +020031 input [`MPRJ_IO_PADS-1:0] inp_dis,
32 input [`MPRJ_IO_PADS-1:0] ib_mode_sel,
Tim Edwards04ba17f2020-10-02 22:27:50 -040033 input [`MPRJ_IO_PADS-1:0] vtrip_sel,
34 input [`MPRJ_IO_PADS-1:0] slow_sel,
35 input [`MPRJ_IO_PADS-1:0] holdover,
shalan0d14e6e2020-08-31 16:50:48 +020036 input [`MPRJ_IO_PADS-1:0] analog_en,
37 input [`MPRJ_IO_PADS-1:0] analog_sel,
38 input [`MPRJ_IO_PADS-1:0] analog_pol,
39 input [`MPRJ_IO_PADS*3-1:0] dm,
Tim Edwards04ba17f2020-10-02 22:27:50 -040040 output [`MPRJ_IO_PADS-1:0] io_in
shalan0d14e6e2020-08-31 16:50:48 +020041);
Tim Edwards9eda80d2020-10-08 21:36:44 -040042
43 wire [`MPRJ_IO_PADS-1:0] loop1_io;
44
45 s8iom0_gpiov2_pad area1_io_pad [AREA1PADS - 1:0] (
46 `USER1_ABUTMENT_PINS
47 `ifndef TOP_ROUTING
48 .pad(io[AREA1PADS - 1:0]),
49 `endif
50 .out(io_out[AREA1PADS - 1:0]),
51 .oe_n(oeb[AREA1PADS - 1:0]),
52 .hld_h_n(hldh_n[AREA1PADS - 1:0]),
53 .enable_h(enh[AREA1PADS - 1:0]),
54 .enable_inp_h(loop1_io[AREA1PADS - 1:0]),
55 .enable_vdda_h(porb_h),
56 .enable_vswitch_h(vssa),
57 .enable_vddio(vccd),
58 .inp_dis(inp_dis[AREA1PADS - 1:0]),
59 .ib_mode_sel(ib_mode_sel[AREA1PADS - 1:0]),
60 .vtrip_sel(vtrip_sel[AREA1PADS - 1:0]),
61 .slow(slow_sel[AREA1PADS - 1:0]),
62 .hld_ovr(holdover[AREA1PADS - 1:0]),
63 .analog_en(analog_en[AREA1PADS - 1:0]),
64 .analog_sel(analog_sel[AREA1PADS - 1:0]),
65 .analog_pol(analog_pol[AREA1PADS - 1:0]),
66 .dm(dm[AREA1PADS*3 - 1:0]),
67 .pad_a_noesd_h(),
68 .pad_a_esd_0_h(),
69 .pad_a_esd_1_h(),
70 .in(io_in[AREA1PADS - 1:0]),
71 .in_h(),
72 .tie_hi_esd(),
73 .tie_lo_esd(loop1_io[AREA1PADS - 1:0])
74 );
75
76 s8iom0_gpiov2_pad area2_io_pad [`MPRJ_IO_PADS - AREA1PADS - 1:0] (
77 `USER2_ABUTMENT_PINS
78 `ifndef TOP_ROUTING
79 .pad(io[`MPRJ_IO_PADS - AREA1PADS - 1:0]),
80 `endif
81 .out(io_out[`MPRJ_IO_PADS - 1:AREA1PADS]),
82 .oe_n(oeb[`MPRJ_IO_PADS - 1:AREA1PADS]),
83 .hld_h_n(hldh_n[`MPRJ_IO_PADS - 1:AREA1PADS]),
84 .enable_h(enh[`MPRJ_IO_PADS - 1:AREA1PADS]),
85 .enable_inp_h(loop1_io[`MPRJ_IO_PADS - 1:AREA1PADS]),
86 .enable_vdda_h(porb_h),
87 .enable_vswitch_h(vssa),
88 .enable_vddio(vccd),
89 .inp_dis(inp_dis[`MPRJ_IO_PADS - 1:AREA1PADS]),
90 .ib_mode_sel(ib_mode_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
91 .vtrip_sel(vtrip_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
92 .slow(slow_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
93 .hld_ovr(holdover[`MPRJ_IO_PADS - 1:AREA1PADS]),
94 .analog_en(analog_en[`MPRJ_IO_PADS - 1:AREA1PADS]),
95 .analog_sel(analog_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
96 .analog_pol(analog_pol[`MPRJ_IO_PADS - 1:AREA1PADS]),
97 .dm(dm[`MPRJ_IO_PADS*3 - 1:AREA1PADS*3]),
98 .pad_a_noesd_h(),
99 .pad_a_esd_0_h(),
100 .pad_a_esd_1_h(),
101 .in(io_in[`MPRJ_IO_PADS - 1:AREA1PADS]),
102 .in_h(),
103 .tie_hi_esd(),
104 .tie_lo_esd(loop1_io[`MPRJ_IO_PADS - 1:AREA1PADS])
105 );
shalan0d14e6e2020-08-31 16:50:48 +0200106
Tim Edwards04ba17f2020-10-02 22:27:50 -0400107endmodule