Updated makefile for test_1

verilog/dv/caravel/ghazi_top_dffram_csv/test_1/Makefile

diff --git a/verilog/dv/caravel/ghazi_top_dffram_csv/test_1/Makefile b/verilog/dv/caravel/ghazi_top_dffram_csv/test_1/Makefile
index 6cb9bc4..f73f356 100644
--- a/verilog/dv/caravel/ghazi_top_dffram_csv/test_1/Makefile
+++ b/verilog/dv/caravel/ghazi_top_dffram_csv/test_1/Makefile
@@ -1,5 +1,6 @@
 FIRMWARE_PATH = ../..
-RTL_PATH = ../../../../rtl
+VERILOG_PATH = ../../../..
+RTL_PATH = $(VERILOG_PATH)/rtl
 IP_PATH = ../../../../ip
 BEHAVIOURAL_MODELS = ../../
 
@@ -7,6 +8,8 @@
 GCC_PREFIX?=riscv32-unknown-elf
 PDK_PATH?=/ef/tech/SW/sky130A
 
+SIM?=RTL
+
 .SUFFIXES:
 
 PATTERN = test_1
@@ -16,18 +19,24 @@
 hex:  ${PATTERN:=.hex}
 
 %.vvp: %_tb.v %.hex
-	iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ifeq ($(SIM),RTL)
+	iverilog -DFUNCTIONAL -DSIM -I $(BEHAVIOURAL_MODELS) \
 	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
-	-o $@ $<
+	$< -o $@
+else
+	iverilog -DFUNCTIONAL -DSIM -DGL -I $(BEHAVIOURAL_MODELS) \
+	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
+	$< -o $@
+endif
 
 %.vcd: %.vvp
 	vvp $<
 
 %.elf: %.c $(FIRMWARE_PATH)/sections.lds $(FIRMWARE_PATH)/start.s
-	${GCC_PATH}/${GCC_PREFIX}-gcc -march=rv32imc -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $<
+	${GCC_PATH}/${GCC_PREFIX}-gcc -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $<
 
 %.hex: %.elf
-	${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
+	${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@ 
 	# to fix flash base address
 	sed -i 's/@10000000/@00000000/g' $@