Latest config files user_project clean run.
diff --git a/openlane/ghazi_top_dffram_csv/config.tcl b/openlane/ghazi_top_dffram_csv/config.tcl index 0377151..02389b8 100755 --- a/openlane/ghazi_top_dffram_csv/config.tcl +++ b/openlane/ghazi_top_dffram_csv/config.tcl
@@ -5,8 +5,9 @@ # Change if needed set ::env(VERILOG_FILES) [glob $script_dir/../../verilog/rtl/defines.v $script_dir/../../verilog/rtl/ghazi/*.v] set ::env(SYNTH_READ_BLACKBOX_LIB) 1 -set ::env(FP_SIZING) relative +set ::env(FP_SIZING) absolute set ::env(DIE_AREA) "0 0 2300 3000" +set ::env(FP_CORE_UTIL) 50 set ::env(PL_TARGET_DENSITY) 0.3 set ::env(GENERATE_FINAL_SUMMARY_REPORT) 1 set ::env(SYNTH_STRATEGY) 0 @@ -15,6 +16,8 @@ set ::env(PDN_CFG) $script_dir/pdn.tcl set ::env(GLB_RT_MAXLAYER) 5 set ::env(GLB_RT_ALLOW_CONGESTION) 1 +set ::env(DIODE_INSERTION_STRATEGY) 3 +set ::env(GLB_RT_MAX_DIODE_INS_ITERS) 1 #defaults set ::env(BASE_SDC_FILE) $script_dir/ghazi_top_dffram_csv.sdc # Fill this
diff --git a/openlane/ghazi_top_dffram_csv/interactive.tcl b/openlane/ghazi_top_dffram_csv/interactive.tcl new file mode 100644 index 0000000..db5d5df --- /dev/null +++ b/openlane/ghazi_top_dffram_csv/interactive.tcl
@@ -0,0 +1,35 @@ +package require openlane +set script_dir [file dirname [file normalize [info script]]] + +prep -design $script_dir -tag 23_Dec_without_X_Virus +set save_path $script_dir/../.. +run_magic +run_magic_spice_export + + if { [info exists flags_map(-save) ] } { + if { ! [info exists arg_values(-save_path)] } { + set arg_values(-save_path) "" +} + save_views -lef_path $::env(magic_result_file_tag).lef \ + -def_path $::env(tritonRoute_result_file_tag).def \ + -gds_path $::env(magic_result_file_tag).gds \ + -mag_path $::env(magic_result_file_tag).mag \ + -mag_path $::env(magic_result_file_tag).lef.mag \ + -spice_path $::env(magic_result_file_tag).spice \ + -verilog_path $::env(CURRENT_NETLIST) \ + -save_path $arg_values(-save_path) \ + -tag $::env(RUN_TAG) + } + + # Physical verification + + run_magic_drc + + run_lvs; # requires run_magic_spice_export + + run_antenna_check + + generate_final_summary_report + + puts_success "Flow Completed Wajeh, Without Fatal Errors." +
diff --git a/openlane/user_project_wrapper/gen_pdn.tcl b/openlane/user_project_wrapper/gen_pdn.tcl index 5560a81..7854a79 100644 --- a/openlane/user_project_wrapper/gen_pdn.tcl +++ b/openlane/user_project_wrapper/gen_pdn.tcl
@@ -4,7 +4,7 @@ set ::env(_SPACING) 1.7 set ::env(_WIDTH) 3 -set power_domains [list {vccd1 vssd1 1} {vccd2 vssd2 1} {vdda1 vssa1 0} {vdda2 vssa2 0}] +set power_domains [list {vccd1 vssd1 1} {vccd2 vssd2 0} {vdda1 vssa1 0} {vdda2 vssa2 0}] set ::env(_VDD_NET_NAME) vccd1 set ::env(_GND_NET_NAME) vssd1
diff --git a/openlane/user_project_wrapper/interactive.tcl b/openlane/user_project_wrapper/interactive.tcl index 05eeee4..f6532a9 100644 --- a/openlane/user_project_wrapper/interactive.tcl +++ b/openlane/user_project_wrapper/interactive.tcl
@@ -1,7 +1,7 @@ package require openlane set script_dir [file dirname [file normalize [info script]]] -prep -design $script_dir -tag user_project_wrapper_18_Dec_3_pm_powered_netlist -overwrite +prep -design $script_dir -tag 24dec_without_X_Virus set save_path $script_dir/../.. verilog_elaborate @@ -10,39 +10,12 @@ place_io_ol -set ::env(FP_DEF_TEMPATE) $script_dir/../../def/user_project_wrapper_empty.def - -apply_def_template - -add_macro_placement mprj 310 260 N +add_macro_placement mprj 310 216 N manual_macro_placement f -set ::env(_SPACING) 1.8 -set ::env(_WIDTH) 3 - -set power_domains [list {vccd1 vssd1}] - -set ::env(_VDD_NET_NAME) vccd1 -set ::env(_GND_NET_NAME) vssd1 -set ::env(_V_OFFSET) 14 -set ::env(_H_OFFSET) $::env(_V_OFFSET) -set ::env(_V_PITCH) 180 -set ::env(_H_PITCH) 180 -set ::env(_V_PDN_OFFSET) 0 -set ::env(_H_PDN_OFFSET) 0 - -foreach domain $power_domains { - set ::env(_VDD_NET_NAME) [lindex $domain 0] - set ::env(_GND_NET_NAME) [lindex $domain 1] - gen_pdn - set ::env(_V_OFFSET) \ - [expr $::env(_V_OFFSET) + 2*($::env(_WIDTH)+$::env(_SPACING))] - set ::env(_H_OFFSET) \ - [expr $::env(_H_OFFSET) + 2*($::env(_WIDTH)+$::env(_SPACING))] - set ::env(_V_PDN_OFFSET) [expr $::env(_V_PDN_OFFSET)+6*$::env(_WIDTH)] - set ::env(_H_PDN_OFFSET) [expr $::env(_H_PDN_OFFSET)+6*$::env(_WIDTH)] -} +exec -ignorestderr openroad -exit $script_dir/gen_pdn.tcl +set_def $::env(pdn_tmp_file_tag).def global_routing_or detailed_routing @@ -55,7 +28,6 @@ -def_path $::env(tritonRoute_result_file_tag).def \ -gds_path $::env(magic_result_file_tag).gds \ -mag_path $::env(magic_result_file_tag).mag \ - -verilog_path $::env(CURRENT_NETLIST) \ -save_path $save_path \ -tag $::env(RUN_TAG)
diff --git a/openlane/user_project_wrapper/pdn.tcl b/openlane/user_project_wrapper/pdn.tcl index 5838b0c..f5c6149 100644 --- a/openlane/user_project_wrapper/pdn.tcl +++ b/openlane/user_project_wrapper/pdn.tcl
@@ -2,7 +2,7 @@ set ::power_nets $::env(_VDD_NET_NAME) set ::ground_nets $::env(_GND_NET_NAME) -pdngen::specify_grid stdcell { +set stdcell { name grid core_ring { met5 {width $::env(_WIDTH) spacing $::env(_SPACING) core_offset $::env(_H_OFFSET)} @@ -10,16 +10,21 @@ } rails { } - straps { - met4 {width $::env(_WIDTH) pitch $::env(_V_PITCH) offset $::env(_V_PDN_OFFSET)} - met5 {width $::env(_WIDTH) pitch $::env(_H_PITCH) offset $::env(_H_PDN_OFFSET)} - } connect {{met4 met5}} } +if { $::env(_WITH_STRAPS) } { + dict append stdcell straps { + met4 {width $::env(_WIDTH) pitch $::env(_V_PITCH) offset $::env(_V_PDN_OFFSET)} + met5 {width $::env(_WIDTH) pitch $::env(_H_PITCH) offset $::env(_H_PDN_OFFSET)} + } +} + +pdngen::specify_grid stdcell $stdcell + pdngen::specify_grid macro { instance "mprj" - power_pins "VPWR" + power_pins "VPWR" ground_pins "VGND" blockages "li1 met1 met2 met3 met4" straps { @@ -28,20 +33,10 @@ } -pdngen::specify_grid macro { - power_pins $::env(_VDD_NET_NAME) - ground_pins $::env(_GND_NET_NAME) - blockages "" - straps { - } - connect {} -} - -set ::halo 0 +set ::halo 10 # POWER or GROUND #Std. cell rails starting with power or ground rails at the bottom of the core area set ::rails_start_with "POWER" ; # POWER or GROUND #Upper metal stripes starting with power or ground rails at the left/bottom of the core area set ::stripes_start_with "POWER" ; -