[LICENSE] Add SPDX Identifier
diff --git a/verilog/rtl/DFFRAM.v b/verilog/rtl/DFFRAM.v
index 615dfaa..55a03a2 100644
--- a/verilog/rtl/DFFRAM.v
+++ b/verilog/rtl/DFFRAM.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
`ifndef USE_CUSTOM_DFFRAM
diff --git a/verilog/rtl/DFFRAMBB.v b/verilog/rtl/DFFRAMBB.v
index dd2f71d..defb258 100644
--- a/verilog/rtl/DFFRAMBB.v
+++ b/verilog/rtl/DFFRAMBB.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/*
diff --git a/verilog/rtl/caravel_clocking.v b/verilog/rtl/caravel_clocking.v
index e187d47..0235f19 100644
--- a/verilog/rtl/caravel_clocking.v
+++ b/verilog/rtl/caravel_clocking.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
// This routine synchronizes the
diff --git a/verilog/rtl/chip_io.v b/verilog/rtl/chip_io.v
index 55b5832..d45af63 100644
--- a/verilog/rtl/chip_io.v
+++ b/verilog/rtl/chip_io.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
// `default_nettype none
module chip_io(
diff --git a/verilog/rtl/clock_div.v b/verilog/rtl/clock_div.v
index b29ac94..8535243 100644
--- a/verilog/rtl/clock_div.v
+++ b/verilog/rtl/clock_div.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
/* Integer-N clock divider */
`default_nettype none
diff --git a/verilog/rtl/convert_gpio_sigs.v b/verilog/rtl/convert_gpio_sigs.v
index c9aeefa..b197c7d 100644
--- a/verilog/rtl/convert_gpio_sigs.v
+++ b/verilog/rtl/convert_gpio_sigs.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/* Convert the standard set of GPIO signals: input, output, output_enb,
diff --git a/verilog/rtl/counter_timer_high.v b/verilog/rtl/counter_timer_high.v
index 81c8b0e..235e740 100755
--- a/verilog/rtl/counter_timer_high.v
+++ b/verilog/rtl/counter_timer_high.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/* Simple 32-bit counter-timer for Caravel. */
diff --git a/verilog/rtl/counter_timer_low.v b/verilog/rtl/counter_timer_low.v
index 7dd30bc..074fab4 100755
--- a/verilog/rtl/counter_timer_low.v
+++ b/verilog/rtl/counter_timer_low.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/* Simple 32-bit counter-timer for Caravel. */
diff --git a/verilog/rtl/defines.v b/verilog/rtl/defines.v
index eb99a7b..508ef4e 100644
--- a/verilog/rtl/defines.v
+++ b/verilog/rtl/defines.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
// Global parameters
diff --git a/verilog/rtl/digital_pll.v b/verilog/rtl/digital_pll.v
index 395a207..3458349 100644
--- a/verilog/rtl/digital_pll.v
+++ b/verilog/rtl/digital_pll.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
// Digital PLL (ring oscillator + controller)
diff --git a/verilog/rtl/digital_pll_controller.v b/verilog/rtl/digital_pll_controller.v
index 8014131..3b745c7 100644
--- a/verilog/rtl/digital_pll_controller.v
+++ b/verilog/rtl/digital_pll_controller.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
// (True) digital PLL
diff --git a/verilog/rtl/gpio_control_block.v b/verilog/rtl/gpio_control_block.v
index 109dd9a..f4a92bb 100644
--- a/verilog/rtl/gpio_control_block.v
+++ b/verilog/rtl/gpio_control_block.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/*
diff --git a/verilog/rtl/gpio_wb.v b/verilog/rtl/gpio_wb.v
index a89464b..bcd4a22 100644
--- a/verilog/rtl/gpio_wb.v
+++ b/verilog/rtl/gpio_wb.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module gpio_wb # (
diff --git a/verilog/rtl/housekeeping_spi.v b/verilog/rtl/housekeeping_spi.v
index 73a579a..c4bb78e 100644
--- a/verilog/rtl/housekeeping_spi.v
+++ b/verilog/rtl/housekeeping_spi.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
//-------------------------------------
diff --git a/verilog/rtl/la_wb.v b/verilog/rtl/la_wb.v
index 1d9910d..cec862f 100644
--- a/verilog/rtl/la_wb.v
+++ b/verilog/rtl/la_wb.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module la_wb # (
diff --git a/verilog/rtl/mem_wb.v b/verilog/rtl/mem_wb.v
index 23c7b22..10fe839 100644
--- a/verilog/rtl/mem_wb.v
+++ b/verilog/rtl/mem_wb.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module mem_wb (
diff --git a/verilog/rtl/mgmt_core.v b/verilog/rtl/mgmt_core.v
index b706079..f88155c 100644
--- a/verilog/rtl/mgmt_core.v
+++ b/verilog/rtl/mgmt_core.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module mgmt_core (
diff --git a/verilog/rtl/mgmt_protect.v b/verilog/rtl/mgmt_protect.v
index 2e03158..306de34 100644
--- a/verilog/rtl/mgmt_protect.v
+++ b/verilog/rtl/mgmt_protect.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/*----------------------------------------------------------------------*/
diff --git a/verilog/rtl/mgmt_protect_hv.v b/verilog/rtl/mgmt_protect_hv.v
index f2ea418..99e4baf 100644
--- a/verilog/rtl/mgmt_protect_hv.v
+++ b/verilog/rtl/mgmt_protect_hv.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/*----------------------------------------------------------------------*/
diff --git a/verilog/rtl/mprj_ctrl.v b/verilog/rtl/mprj_ctrl.v
index b7f02da..c9648ab 100644
--- a/verilog/rtl/mprj_ctrl.v
+++ b/verilog/rtl/mprj_ctrl.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module mprj_ctrl_wb #(
diff --git a/verilog/rtl/mprj_io.v b/verilog/rtl/mprj_io.v
index 34fb303..16a49a7 100644
--- a/verilog/rtl/mprj_io.v
+++ b/verilog/rtl/mprj_io.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
// `default_nettype none
module mprj_io #(
diff --git a/verilog/rtl/pads.v b/verilog/rtl/pads.v
index 25bc89f..6813066 100644
--- a/verilog/rtl/pads.v
+++ b/verilog/rtl/pads.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
// `default_nettype none
`ifndef TOP_ROUTING
diff --git a/verilog/rtl/ring_osc2x13.v b/verilog/rtl/ring_osc2x13.v
index c371e34..a96167f 100644
--- a/verilog/rtl/ring_osc2x13.v
+++ b/verilog/rtl/ring_osc2x13.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
// Tunable ring oscillator---synthesizable (physical) version.
diff --git a/verilog/rtl/simple_por.v b/verilog/rtl/simple_por.v
index faf7ffb..04bbafe 100644
--- a/verilog/rtl/simple_por.v
+++ b/verilog/rtl/simple_por.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
`timescale 1 ns / 1 ps
diff --git a/verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v b/verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v
index 71ee6b5..1ec81ef 100644
--- a/verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v
+++ b/verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
module sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped (
X ,
diff --git a/verilog/rtl/sram_1rw1r_32_256_8_sky130.v b/verilog/rtl/sram_1rw1r_32_256_8_sky130.v
index 86985ec..5840f13 100644
--- a/verilog/rtl/sram_1rw1r_32_256_8_sky130.v
+++ b/verilog/rtl/sram_1rw1r_32_256_8_sky130.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
// OpenRAM SRAM model
diff --git a/verilog/rtl/storage.v b/verilog/rtl/storage.v
index e671cc5..b519e0d 100644
--- a/verilog/rtl/storage.v
+++ b/verilog/rtl/storage.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
diff --git a/verilog/rtl/storage_bridge_wb.v b/verilog/rtl/storage_bridge_wb.v
index 3e46251..23c81e2 100644
--- a/verilog/rtl/storage_bridge_wb.v
+++ b/verilog/rtl/storage_bridge_wb.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module storage_bridge_wb (
diff --git a/verilog/rtl/sysctrl.v b/verilog/rtl/sysctrl.v
index 93f2dcb..8a694aa 100644
--- a/verilog/rtl/sysctrl.v
+++ b/verilog/rtl/sysctrl.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module sysctrl_wb #(
diff --git a/verilog/rtl/user_id_programming.v b/verilog/rtl/user_id_programming.v
index f25d08f..41fd248 100644
--- a/verilog/rtl/user_id_programming.v
+++ b/verilog/rtl/user_id_programming.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
// This module represents an unprogrammed mask revision
diff --git a/verilog/rtl/user_proj_example.v b/verilog/rtl/user_proj_example.v
index be1cadb..ec99e66 100644
--- a/verilog/rtl/user_proj_example.v
+++ b/verilog/rtl/user_proj_example.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/*
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v
index 6ea1eef..2e5b525 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_project_wrapper.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
/*
diff --git a/verilog/rtl/wb_intercon.v b/verilog/rtl/wb_intercon.v
index e0c7358..e008406 100644
--- a/verilog/rtl/wb_intercon.v
+++ b/verilog/rtl/wb_intercon.v
@@ -11,6 +11,7 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
module wb_intercon #(
