Update DFFRAM config
diff --git a/openlane/DFFRAM/config.tcl b/openlane/DFFRAM/config.tcl index 3e3f4d2..ebd70c9 100644 --- a/openlane/DFFRAM/config.tcl +++ b/openlane/DFFRAM/config.tcl
@@ -3,7 +3,10 @@ set ::env(DESIGN_NAME) DFFRAM # Change if needed -set ::env(VERILOG_FILES) $script_dir/../../verilog/rtl/DFFRAM.v +set ::env(VERILOG_FILES) "\ + $script_dir/../../verilog/rtl/defines.v\ + $script_dir/../../verilog/rtl/DFFRAM.v" + set ::env(SYNTH_TOP_LEVEL) 1 set ::env(SYNTH_READ_BLACKBOX_LIB) 1 # Fill this @@ -17,6 +20,7 @@ set ::env(DIE_AREA) "0 0 750 525" set ::env(PDN_CFG) $script_dir/pdn.tcl +set ::env(GLB_RT_MAXLAYER) 5 set ::env(PL_OPENPHYSYN_OPTIMIZATIONS) 0 set ::env(PL_TARGET_DENSITY) 0.85