Corrected the logic in mgmt_protect; also corrected a problem in the la_test2
Makefile that came from pulling commits from the release branch into this one.
diff --git a/verilog/dv/caravel/user_proj_example/la_test1/la_test1.hex b/verilog/dv/caravel/user_proj_example/la_test1/la_test1.hex
deleted file mode 100755
index 5dfca2f..0000000
--- a/verilog/dv/caravel/user_proj_example/la_test1/la_test1.hex
+++ /dev/null
@@ -1,75 +0,0 @@
-@00000000
-93 00 00 00 93 01 00 00 13 02 00 00 93 02 00 00
-13 03 00 00 93 03 00 00 13 04 00 00 93 04 00 00
-13 05 00 00 93 05 00 00 13 06 00 00 93 06 00 00
-13 07 00 00 93 07 00 00 13 08 00 00 93 08 00 00
-13 09 00 00 93 09 00 00 13 0A 00 00 93 0A 00 00
-13 0B 00 00 93 0B 00 00 13 0C 00 00 93 0C 00 00
-13 0D 00 00 93 0D 00 00 13 0E 00 00 93 0E 00 00
-13 0F 00 00 93 0F 00 00 17 05 00 00 13 05 C5 41
-93 05 00 00 13 06 00 00 63 D8 C5 00 14 41 94 C1
-11 05 91 05 E3 CC C5 FE 13 05 00 00 93 05 00 00
-63 57 B5 00 23 20 05 00 11 05 E3 4D B5 FE 11 22
-01 A0 01 00 B7 02 00 28 13 03 00 12 23 90 62 00
-A3 81 02 00 05 C6 21 4F 93 73 F6 0F 93 DE 73 00
-23 80 D2 01 93 EE 0E 01 23 80 D2 01 86 03 93 F3
-F3 0F 7D 1F E3 14 0F FE 23 80 62 00 A1 C9 13 0F
-00 02 83 23 05 00 A1 4F 93 DE F3 01 23 80 D2 01
-93 EE 0E 01 23 80 D2 01 83 CE 02 00 93 FE 2E 00
-93 DE 1E 00 86 03 B3 E3 D3 01 7D 1F 63 17 0F 00
-23 20 75 00 11 05 83 23 05 00 FD 1F E3 96 0F FC
-FD 15 F1 F1 63 04 0F 00 23 20 75 00 13 03 00 08
-A3 81 62 00 82 80 01 00 00 00 01 11 06 CE 22 CC
-00 10 AA 87 A3 07 F4 FE 03 47 F4 FE A9 47 63 14
-F7 00 35 45 DD 37 B7 07 00 20 91 07 03 47 F4 FE
-98 C3 01 00 F2 40 62 44 05 61 82 80 01 11 06 CE
-22 CC 00 10 23 26 A4 FE 19 A8 83 27 C4 FE 13 87
-17 00 23 26 E4 FE 83 C7 07 00 3E 85 7D 37 83 27
-C4 FE 83 C7 07 00 F5 F3 01 00 F2 40 62 44 05 61
-82 80 41 11 06 C6 22 C4 00 08 B7 07 00 26 93 87
-C7 09 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-87 09 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-47 09 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-07 09 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-C7 08 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-87 08 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-47 08 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-07 08 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-C7 07 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-87 07 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-47 07 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-07 07 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-C7 06 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-87 06 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-47 06 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-07 06 09 67 13 07 97 80 98 C3 B7 07 00 26 93 87
-C7 05 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-87 05 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-47 05 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-07 05 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-C7 04 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-87 04 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-47 04 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-07 04 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-C7 03 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-47 03 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-07 03 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-C7 02 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-87 02 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-47 02 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-07 02 09 67 13 07 87 80 98 C3 B7 07 00 26 93 87
-87 03 09 67 13 07 97 80 98 C3 B7 07 00 20 13 07
-10 27 98 C3 B7 07 00 20 A1 07 05 47 98 C3 B7 07
-00 26 05 47 98 C3 01 00 B7 07 00 26 98 43 85 47
-E3 0C F7 FE B7 07 00 25 C1 07 7D 57 98 C3 B7 07
-00 25 D1 07 23 A0 07 00 B7 07 00 25 E1 07 7D 57
-98 C3 B7 07 00 25 F1 07 7D 57 98 C3 B7 07 00 26
-A1 07 37 07 40 AB 98 C3 B7 07 00 25 91 07 23 A0
-07 00 B7 07 00 25 D1 07 7D 57 98 C3 B7 07 00 25
-98 43 93 07 40 1F E3 FB E7 FE B7 07 00 26 A1 07
-37 07 41 AB 98 C3 01 00 B7 07 00 10 13 85 47 47
-35 33 B7 07 00 10 13 85 87 47 0D 33 B7 07 00 26
-A1 07 37 07 51 AB 98 C3 01 00 B2 40 22 44 41 01
-82 80 00 00 0A 00 00 00 4D 6F 6E 69 74 6F 72 3A
-20 54 65 73 74 20 32 20 50 61 73 73 65 64 0A 0A
-00 00 00 00
diff --git a/verilog/dv/caravel/user_proj_example/la_test2/Makefile b/verilog/dv/caravel/user_proj_example/la_test2/Makefile
index 396a385..0b848c6 100644
--- a/verilog/dv/caravel/user_proj_example/la_test2/Makefile
+++ b/verilog/dv/caravel/user_proj_example/la_test2/Makefile
@@ -24,15 +24,7 @@
vvp $<
%.elf: %.c $(FIRMWARE_PATH)/sections.lds $(FIRMWARE_PATH)/start.s
-<<<<<<< HEAD
-<<<<<<< HEAD
- ${GCC_PATH}/${GCC_PREFIX}-unknown-elf-gcc -march=rv32imc -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $<
-=======
${GCC_PATH}/${GCC_PREFIX}-gcc -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $<
->>>>>>> 6000cbf... Updates to the Makefiles for easier passing of user-specific variables,
-=======
- ${GCC_PATH}/${GCC_PREFIX}-gcc -march=rv32imc -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $<
->>>>>>> 9bc2778... Corrections to the management protection buffer block, and a couple of corrections
%.hex: %.elf
${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
diff --git a/verilog/rtl/mgmt_protect.v b/verilog/rtl/mgmt_protect.v
index 563510b..6368ae4 100644
--- a/verilog/rtl/mgmt_protect.v
+++ b/verilog/rtl/mgmt_protect.v
@@ -76,6 +76,8 @@
wire user1_vdd_powergood;
wire user2_vdd_powergood;
+ wire [127:0] la_data_in_mprj_bar;
+
sky130_fd_sc_hd__conb_1 mprj_logic_high [458:0] (
`ifdef USE_POWER_PINS
.VPWR(vccd1),
@@ -156,7 +158,19 @@
// data input to the management core to be a solid logic 0 when
// the user project is powered down.
- sky130_fd_sc_hd__nor2b_4 user_to_mprj_in_buffers [127:0] (
+ sky130_fd_sc_hd__nand2_4 user_to_mprj_in_gates [127:0] (
+`ifdef USE_POWER_PINS
+ .VPWR(vccd),
+ .VGND(vssd),
+ .VPB(vccd),
+ .VNB(vssd),
+`endif
+ .Y(la_data_in_mprj_bar),
+ .A(la_data_out_core),
+ .B(mprj_logic1[457:330])
+ );
+
+ sky130_fd_sc_hd__inv_8 user_to_mprj_in_buffers [127:0] (
`ifdef USE_POWER_PINS
.VPWR(vccd),
.VGND(vssd),
@@ -164,8 +178,7 @@
.VNB(vssd),
`endif
.Y(la_data_in_mprj),
- .A(mprj_logic1[457:330]),
- .B_N(~la_data_out_core)
+ .A(la_data_in_mprj_bar)
);
// The remaining circuitry guards against the management
