openlane/morphle_ycell/runs/morphle_ycell/results/magic/ycell.lef

VERSION 5.7 ;
  NOWIREEXTENSIONATPIN ON ;
  DIVIDERCHAR "/" ;
  BUSBITCHARS "[]" ;
MACRO ycell
  CLASS BLOCK ;
  FOREIGN ycell ;
  ORIGIN 0.000 0.000 ;
  SIZE 67.490 BY 78.210 ;
  PIN cbitin
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 12.510 74.210 12.790 78.210 ;
    END
  END cbitin
  PIN cbitout
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 6.530 0.000 6.810 4.000 ;
    END
  END cbitout
  PIN confclk
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 7.450 74.210 7.730 78.210 ;
    END
  END confclk
  PIN dempty
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 19.870 0.000 20.150 4.000 ;
    END
  END dempty
  PIN din[0]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 33.210 74.210 33.490 78.210 ;
    END
  END din[0]
  PIN din[1]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 63.490 54.440 67.490 55.040 ;
    END
  END din[1]
  PIN dout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 63.490 23.160 67.490 23.760 ;
    END
  END dout[0]
  PIN dout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 48.850 74.210 49.130 78.210 ;
    END
  END dout[1]
  PIN hempty
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 23.090 74.210 23.370 78.210 ;
    END
  END hempty
  PIN lempty
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 0.000 12.960 4.000 13.560 ;
    END
  END lempty
  PIN lin[0]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 0.000 38.800 4.000 39.400 ;
    END
  END lin[0]
  PIN lin[1]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 0.000 64.640 4.000 65.240 ;
    END
  END lin[1]
  PIN lout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 38.730 74.210 39.010 78.210 ;
    END
  END lout[0]
  PIN lout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 63.490 70.080 67.490 70.680 ;
    END
  END lout[1]
  PIN rempty
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 63.490 7.520 67.490 8.120 ;
    END
  END rempty
  PIN reset
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 2.390 74.210 2.670 78.210 ;
    END
  END reset
  PIN rin[0]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 63.490 38.800 67.490 39.400 ;
    END
  END rin[0]
  PIN rin[1]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 54.370 74.210 54.650 78.210 ;
    END
  END rin[1]
  PIN rout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 43.790 74.210 44.070 78.210 ;
    END
  END rout[0]
  PIN rout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 59.430 74.210 59.710 78.210 ;
    END
  END rout[1]
  PIN uempty
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 17.570 74.210 17.850 78.210 ;
    END
  END uempty
  PIN uin[0]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 33.210 0.000 33.490 4.000 ;
    END
  END uin[0]
  PIN uin[1]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 64.490 74.210 64.770 78.210 ;
    END
  END uin[1]
  PIN uout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 47.010 0.000 47.290 4.000 ;
    END
  END uout[0]
  PIN uout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 60.350 0.000 60.630 4.000 ;
    END
  END uout[1]
  PIN vempty
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 28.150 74.210 28.430 78.210 ;
    END
  END vempty
  PIN VPWR
    DIRECTION INPUT ;
    USE POWER ;
    PORT
      LAYER met4 ;
        RECT 14.075 10.640 15.675 65.520 ;
    END
  END VPWR
  PIN VGND
    DIRECTION INPUT ;
    USE GROUND ;
    PORT
      LAYER met4 ;
        RECT 23.425 10.640 25.025 65.520 ;
    END
  END VGND
  OBS
      LAYER li1 ;
        RECT 5.520 10.795 61.640 65.365 ;
      LAYER met1 ;
        RECT 2.370 10.640 64.790 73.740 ;
      LAYER met2 ;
        RECT 2.950 73.930 7.170 74.210 ;
        RECT 8.010 73.930 12.230 74.210 ;
        RECT 13.070 73.930 17.290 74.210 ;
        RECT 18.130 73.930 22.810 74.210 ;
        RECT 23.650 73.930 27.870 74.210 ;
        RECT 28.710 73.930 32.930 74.210 ;
        RECT 33.770 73.930 38.450 74.210 ;
        RECT 39.290 73.930 43.510 74.210 ;
        RECT 44.350 73.930 48.570 74.210 ;
        RECT 49.410 73.930 54.090 74.210 ;
        RECT 54.930 73.930 59.150 74.210 ;
        RECT 59.990 73.930 64.210 74.210 ;
        RECT 2.400 4.280 64.760 73.930 ;
        RECT 2.400 4.000 6.250 4.280 ;
        RECT 7.090 4.000 19.590 4.280 ;
        RECT 20.430 4.000 32.930 4.280 ;
        RECT 33.770 4.000 46.730 4.280 ;
        RECT 47.570 4.000 60.070 4.280 ;
        RECT 60.910 4.000 64.760 4.280 ;
      LAYER met3 ;
        RECT 4.000 69.680 63.090 70.545 ;
        RECT 4.000 65.640 63.490 69.680 ;
        RECT 4.400 64.240 63.490 65.640 ;
        RECT 4.000 55.440 63.490 64.240 ;
        RECT 4.000 54.040 63.090 55.440 ;
        RECT 4.000 39.800 63.490 54.040 ;
        RECT 4.400 38.400 63.090 39.800 ;
        RECT 4.000 24.160 63.490 38.400 ;
        RECT 4.000 22.760 63.090 24.160 ;
        RECT 4.000 13.960 63.490 22.760 ;
        RECT 4.400 12.560 63.490 13.960 ;
        RECT 4.000 8.520 63.490 12.560 ;
        RECT 4.000 7.655 63.090 8.520 ;
      LAYER met4 ;
        RECT 16.075 10.640 23.025 65.520 ;
        RECT 25.425 10.640 53.085 65.520 ;
  END
END ycell
END LIBRARY