remake macro placement each time, try different power placement

ol_templates/Makefile

diff --git a/ol_templates/Makefile b/ol_templates/Makefile
index af2079f..4e58532 100644
--- a/ol_templates/Makefile
+++ b/ol_templates/Makefile
@@ -16,6 +16,12 @@
 
 
 
+.PHONY: help
+help:
+	@echo "      available commands (do 'make <command>')"
+	@echo
+	@awk '/^.PHONY/{print "    " $$2}' Makefile
+
 .PHONY: init_block_flat
 init_block_flat:
 	@echo
@@ -40,23 +46,14 @@
 	cp config_block2.tcl ../openlane/user_proj_example/config.tcl
 	cp pdn.tcl ../openlane/user_proj_example/pdn.tcl
 	cp pin_order.cfg ../openlane/user_proj_example/pin_order.cfg
-	cp macro_placement.cfg ../openlane/user_proj_example/macro_placement.cfg
-
-.PHONY: help
-help:
-	@echo "      available commands (do 'make <command>')"
-	@echo
-	@awk '/^.PHONY/{print "    " $$2}' Makefile
-
-.PHONY: init_placement_cfg
-init_placement_cfg:
 	@echo
 	@echo "      creating new macro_placement.cfg file"
 	@echo
-	@echo -n >macro_placement.cfg
+	@echo -n >../openlane/user_proj_example/macro_placement.cfg
 	@for r in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15; do \
 		for c in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15; do \
-		echo "blk.column\["$$c"\].row\["$$r"\].yc "$$(printf %.3f $$((40480+80960*(15-$$c)))e-3)" "$$(printf %.3f $$((86400+86400*(15-$$r)))e-3)" N" >> macro_placement.cfg; \
+		echo "blk.column\["$$c"\].row\["$$r"\].yc "$$(printf %.3f $$((40480+80960*(15-$$c)))e-3)" "$$(printf %.3f $$((86400+86400*(15-$$r)))e-3)" N" >> ../openlane/user_proj_example/macro_placement.cfg; \
 		done \
 	done
 
+

ol_templates/pdn.tcl

diff --git a/ol_templates/pdn.tcl b/ol_templates/pdn.tcl
index f6d953c..9c6a94a 100644
--- a/ol_templates/pdn.tcl
+++ b/ol_templates/pdn.tcl
@@ -1,47 +1,34 @@
 # Power nets
-set ::power_nets $::env(_VDD_NET_NAME)
-set ::ground_nets $::env(_GND_NET_NAME)
+set ::power_nets $::env(VDD_PIN)
+set ::ground_nets $::env(GND_PIN)
+
+set ::macro_blockage_layer_list "li1 met1 met2 met3 met4 met5"
 
 pdngen::specify_grid stdcell {
     name grid
-	core_ring {
-		met5 {width $::env(_WIDTH) spacing $::env(_SPACING) core_offset $::env(_H_OFFSET)}
-		met4 {width $::env(_WIDTH) spacing $::env(_SPACING) core_offset $::env(_V_OFFSET)}
-	}
-	rails {
-	}
-    straps {
-	    met4 {width $::env(_WIDTH) pitch $::env(_V_PITCH) offset $::env(_V_PDN_OFFSET)}
-	    met5 {width $::env(_WIDTH) pitch $::env(_H_PITCH) offset $::env(_H_PDN_OFFSET)}
+    rails {
+	    met1 {width 0.48 pitch $::env(PLACE_SITE_HEIGHT) offset 0}
     }
-    connect {{met4 met5}}
+    straps {
+	    met4 {width 1.6 pitch $::env(FP_PDN_VPITCH) offset $::env(FP_PDN_VOFFSET)}
+	    met5 {width 1.6 pitch $::env(FP_PDN_HPITCH) offset $::env(FP_PDN_HOFFSET)}
+    }
+    connect {{met1 met4} {met4 met5}}
 }
 
 pdngen::specify_grid macro {
-	instance "obs_core_obs"
-    power_pins $::env(_VDD_NET_NAME)
-    ground_pins $::env(_GND_NET_NAME)
-    blockages "li1 met1 met2 met3 met4 met5"
+    power_pins "VPWR"
+    ground_pins "VGND"
+    blockages "li1 met1 met2 met3 met4"
     straps { 
     } 
-    connect {}
+    connect {{met4_PIN_ver met5}}
 }
 
-
-pdngen::specify_grid macro {
-    power_pins $::env(_VDD_NET_NAME)
-    ground_pins $::env(_GND_NET_NAME)
-    blockages ""
-    straps { 
-    } 
-    connect {}
-}
-
-set ::halo 0
+set ::halo 5
 
 # POWER or GROUND #Std. cell rails starting with power or ground rails at the bottom of the core area
 set ::rails_start_with "POWER" ;
 
 # POWER or GROUND #Upper metal stripes starting with power or ground rails at the left/bottom of the core area
 set ::stripes_start_with "POWER" ;
-