openlane/morphle_ycell/runs/morphle_ycell/results/magic/ycell.lef

VERSION 5.7 ;
  NOWIREEXTENSIONATPIN ON ;
  DIVIDERCHAR "/" ;
  BUSBITCHARS "[]" ;
MACRO ycell
  CLASS BLOCK ;
  FOREIGN ycell ;
  ORIGIN 0.000 0.000 ;
  SIZE 63.845 BY 74.565 ;
  PIN cbitin
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 17.110 70.565 17.390 74.565 ;
    END
  END cbitin
  PIN cbitout
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 17.110 0.000 17.390 4.000 ;
    END
  END cbitout
  PIN confclk
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 10.210 70.565 10.490 74.565 ;
    END
  END confclk
  PIN confclko
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 10.210 0.000 10.490 4.000 ;
    END
  END confclko
  PIN dempty
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 45.630 0.000 45.910 4.000 ;
    END
  END dempty
  PIN din[0]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 59.890 0.000 60.170 4.000 ;
    END
  END din[0]
  PIN din[1]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 52.990 0.000 53.270 4.000 ;
    END
  END din[1]
  PIN dout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 31.370 0.000 31.650 4.000 ;
    END
  END dout[0]
  PIN dout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 24.470 0.000 24.750 4.000 ;
    END
  END dout[1]
  PIN hempty
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 0.000 30.640 4.000 31.240 ;
    END
  END hempty
  PIN hempty2
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 59.845 43.560 63.845 44.160 ;
    END
  END hempty2
  PIN lempty
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 0.000 43.560 4.000 44.160 ;
    END
  END lempty
  PIN lin[0]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 0.000 68.040 4.000 68.640 ;
    END
  END lin[0]
  PIN lin[1]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 0.000 55.800 4.000 56.400 ;
    END
  END lin[1]
  PIN lout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 0.000 18.400 4.000 19.000 ;
    END
  END lout[0]
  PIN lout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 0.000 6.160 4.000 6.760 ;
    END
  END lout[1]
  PIN rempty
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 59.845 30.640 63.845 31.240 ;
    END
  END rempty
  PIN reset
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 3.310 70.565 3.590 74.565 ;
    END
  END reset
  PIN reseto
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 3.310 0.000 3.590 4.000 ;
    END
  END reseto
  PIN rin[0]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 59.845 18.400 63.845 19.000 ;
    END
  END rin[0]
  PIN rin[1]
    DIRECTION INPUT ;
    PORT
      LAYER met3 ;
        RECT 59.845 6.160 63.845 6.760 ;
    END
  END rin[1]
  PIN rout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 59.845 68.040 63.845 68.640 ;
    END
  END rout[0]
  PIN rout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met3 ;
        RECT 59.845 55.800 63.845 56.400 ;
    END
  END rout[1]
  PIN uempty
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 38.730 70.565 39.010 74.565 ;
    END
  END uempty
  PIN uin[0]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 31.370 70.565 31.650 74.565 ;
    END
  END uin[0]
  PIN uin[1]
    DIRECTION INPUT ;
    PORT
      LAYER met2 ;
        RECT 24.470 70.565 24.750 74.565 ;
    END
  END uin[1]
  PIN uout[0]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 59.890 70.565 60.170 74.565 ;
    END
  END uout[0]
  PIN uout[1]
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 52.990 70.565 53.270 74.565 ;
    END
  END uout[1]
  PIN vempty
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 45.630 70.565 45.910 74.565 ;
    END
  END vempty
  PIN vempty2
    DIRECTION OUTPUT TRISTATE ;
    PORT
      LAYER met2 ;
        RECT 38.730 0.000 39.010 4.000 ;
    END
  END vempty2
  PIN VPWR
    DIRECTION INPUT ;
    USE POWER ;
    PORT
      LAYER met4 ;
        RECT 13.460 10.640 15.060 62.800 ;
    END
  END VPWR
  PIN VGND
    DIRECTION INPUT ;
    USE GROUND ;
    PORT
      LAYER met4 ;
        RECT 22.200 10.640 23.800 62.800 ;
    END
  END VGND
  OBS
      LAYER li1 ;
        RECT 5.520 10.795 57.960 62.645 ;
      LAYER met1 ;
        RECT 3.290 10.240 60.190 62.800 ;
      LAYER met2 ;
        RECT 3.870 70.285 9.930 70.565 ;
        RECT 10.770 70.285 16.830 70.565 ;
        RECT 17.670 70.285 24.190 70.565 ;
        RECT 25.030 70.285 31.090 70.565 ;
        RECT 31.930 70.285 38.450 70.565 ;
        RECT 39.290 70.285 45.350 70.565 ;
        RECT 46.190 70.285 52.710 70.565 ;
        RECT 53.550 70.285 59.610 70.565 ;
        RECT 3.320 4.280 60.160 70.285 ;
        RECT 3.870 4.000 9.930 4.280 ;
        RECT 10.770 4.000 16.830 4.280 ;
        RECT 17.670 4.000 24.190 4.280 ;
        RECT 25.030 4.000 31.090 4.280 ;
        RECT 31.930 4.000 38.450 4.280 ;
        RECT 39.290 4.000 45.350 4.280 ;
        RECT 46.190 4.000 52.710 4.280 ;
        RECT 53.550 4.000 59.610 4.280 ;
      LAYER met3 ;
        RECT 4.400 67.640 59.445 68.505 ;
        RECT 4.000 56.800 59.845 67.640 ;
        RECT 4.400 55.400 59.445 56.800 ;
        RECT 4.000 44.560 59.845 55.400 ;
        RECT 4.400 43.160 59.445 44.560 ;
        RECT 4.000 31.640 59.845 43.160 ;
        RECT 4.400 30.240 59.445 31.640 ;
        RECT 4.000 19.400 59.845 30.240 ;
        RECT 4.400 18.000 59.445 19.400 ;
        RECT 4.000 7.160 59.845 18.000 ;
        RECT 4.400 6.295 59.445 7.160 ;
      LAYER met4 ;
        RECT 30.940 10.640 50.020 62.800 ;
  END
END ycell
END LIBRARY