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Matt Venn08cd6eb2020-11-16 12:01:14 +01001`default_nettype none
Ahmed Ghazy22d29d62020-10-28 03:42:02 +02002// Global parameters
3
4`define MPRJ_IO_PADS 38
5`define MPRJ_PWR_PADS 4 /* vdda1, vccd1, vdda2, vccd2 */
6
7// Size of soc_mem_synth
Ahmed Ghazy22d29d62020-10-28 03:42:02 +02008
9// Type and size of soc_mem
Manarec9b5362020-10-28 22:24:06 +020010// `define USE_OPENRAM
Manar68e03632020-11-09 13:25:13 +020011`define USE_CUSTOM_DFFRAM
Ahmed Ghazy2517fa82020-11-08 23:34:41 +020012// don't change the following without double checking addr widths
Ahmed Ghazy22d29d62020-10-28 03:42:02 +020013`define MEM_WORDS 256
Manar55ec3692020-10-30 16:32:18 +020014
Manar8f131792020-11-11 16:38:32 +020015// Number of columns in the custom memory; takes one of three values:
16// 1 column : 1 KB, 2 column: 2 KB, 4 column: 4KB
17`define COLS 1
18
Manarffe6cad2020-11-09 19:09:04 +020019// not really parameterized but just to easily keep track of the number
20// of ram_block across different modules
manarabdelaty08dd4832020-12-03 19:27:08 +020021`define RAM_BLOCKS 2
22
23// Clock divisor default value
manarabdelaty589a5282020-12-05 01:06:48 +020024`define CLK_DIV 3'b010
25
26// GPIO conrol default mode and enable
27`define DM_INIT 3'b110
28`define OENB_INIT 1'b1