Revert "use external reset pin" This reverts commit 8d64c1e1a0b30fd36c62b3ad21591830625570a6.

diff --git a/verilog/rtl/rapcores.v b/verilog/rtl/rapcores.v
index f917124..b1d46d6 100644
--- a/verilog/rtl/rapcores.v
+++ b/verilog/rtl/rapcores.v

@@ -124,8 +124,6 @@
     assign io_oeb[33] = 1'b1;    // DIRINPUT
     assign io_oeb[11] = 1'b1;    // ENINPUT
     assign io_oeb[10] = 1'b0;    // ENOUTPUT
-    assign io_oeb[9] = 1'b1;    //RESETIN
-
     // unused
     assign io_oeb[0] = 1'b0;    // JTAG I/O
     assign io_oeb[1] = 1'b0;    // SDO
@@ -136,6 +134,7 @@
     assign io_oeb[6] = 1'b0;    // Tx
     assign io_oeb[7] = 1'b0;    // IRQ
     assign io_oeb[8] = 1'b1;
+    assign io_oeb[9] = 1'b1;
 
 
     wire resetn;
@@ -153,7 +152,7 @@
 
         // IO Pads
         .CLK(wb_clk_i),
-        .resetn_in(io_in[9]),
+        .resetn_in(resetn),
         .CHARGEPUMP(io_out[15]),
         .analog_cmp1(io_in[25]),
         .analog_out1(io_out[27]),