use motor to infer boot complete

verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v

diff --git a/verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v b/verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v
index 564a973..e55624b 100644
--- a/verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v
+++ b/verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v
@@ -167,7 +167,9 @@
         .STEPINPUT(mprj_io[32]),
         .DIRINPUT(mprj_io[33]),
         .ENINPUT(mprj_io[11]),
-        .ENOUTPUT(mprj_io[10])
+        .ENOUTPUT(mprj_io[10]),
+		.BOOT_DONE_IN(mprj_io[23])
+
   );
 
 	caravel uut (