| VERSION 5.7 ; |
| NOWIREEXTENSIONATPIN ON ; |
| DIVIDERCHAR "/" ; |
| BUSBITCHARS "[]" ; |
| MACRO gpio_control_block |
| CLASS BLOCK ; |
| FOREIGN gpio_control_block ; |
| ORIGIN 0.000 0.000 ; |
| SIZE 50.000 BY 116.880 ; |
| PIN mgmt_gpio_in |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 44.200 50.000 44.800 ; |
| END |
| END mgmt_gpio_in |
| PIN mgmt_gpio_oeb |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 57.800 50.000 58.400 ; |
| END |
| END mgmt_gpio_oeb |
| PIN mgmt_gpio_out |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 72.080 50.000 72.680 ; |
| END |
| END mgmt_gpio_out |
| PIN pad_gpio_ana_en |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 0.000 2.400 0.600 ; |
| END |
| END pad_gpio_ana_en |
| PIN pad_gpio_ana_pol |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 8.160 2.400 8.760 ; |
| END |
| END pad_gpio_ana_pol |
| PIN pad_gpio_ana_sel |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 16.320 2.400 16.920 ; |
| END |
| END pad_gpio_ana_sel |
| PIN pad_gpio_dm[0] |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 24.480 2.400 25.080 ; |
| END |
| END pad_gpio_dm[0] |
| PIN pad_gpio_dm[1] |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 33.320 2.400 33.920 ; |
| END |
| END pad_gpio_dm[1] |
| PIN pad_gpio_dm[2] |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 41.480 2.400 42.080 ; |
| END |
| END pad_gpio_dm[2] |
| PIN pad_gpio_holdover |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 49.640 2.400 50.240 ; |
| END |
| END pad_gpio_holdover |
| PIN pad_gpio_ib_mode_sel |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 57.800 2.400 58.400 ; |
| END |
| END pad_gpio_ib_mode_sel |
| PIN pad_gpio_in |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 66.640 2.400 67.240 ; |
| END |
| END pad_gpio_in |
| PIN pad_gpio_inenb |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 74.800 2.400 75.400 ; |
| END |
| END pad_gpio_inenb |
| PIN pad_gpio_out |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 82.960 2.400 83.560 ; |
| END |
| END pad_gpio_out |
| PIN pad_gpio_outenb |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 91.120 2.400 91.720 ; |
| END |
| END pad_gpio_outenb |
| PIN pad_gpio_slow_sel |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 99.960 2.400 100.560 ; |
| END |
| END pad_gpio_slow_sel |
| PIN pad_gpio_vtrip_sel |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 108.120 2.400 108.720 ; |
| END |
| END pad_gpio_vtrip_sel |
| PIN resetn |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 2.720 50.000 3.320 ; |
| END |
| END resetn |
| PIN serial_clock |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 16.320 50.000 16.920 ; |
| END |
| END serial_clock |
| PIN serial_data_in |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 29.920 50.000 30.520 ; |
| END |
| END serial_data_in |
| PIN serial_data_out |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 0.000 116.280 2.400 116.880 ; |
| END |
| END serial_data_out |
| PIN user_gpio_in |
| DIRECTION OUTPUT TRISTATE ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 85.680 50.000 86.280 ; |
| END |
| END user_gpio_in |
| PIN user_gpio_oeb |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 99.960 50.000 100.560 ; |
| END |
| END user_gpio_oeb |
| PIN user_gpio_out |
| DIRECTION INPUT ; |
| PORT |
| LAYER met3 ; |
| RECT 47.600 113.560 50.000 114.160 ; |
| END |
| END user_gpio_out |
| PIN VPWR |
| DIRECTION INPUT ; |
| USE POWER ; |
| PORT |
| LAYER met5 ; |
| RECT 5.520 22.925 44.160 24.525 ; |
| END |
| END VPWR |
| PIN VGND |
| DIRECTION INPUT ; |
| USE GROUND ; |
| PORT |
| LAYER met5 ; |
| RECT 5.520 40.135 44.160 41.735 ; |
| END |
| END VGND |
| OBS |
| LAYER li1 ; |
| RECT 5.520 6.675 44.160 107.485 ; |
| LAYER met1 ; |
| RECT 5.520 6.520 44.160 113.480 ; |
| LAYER met2 ; |
| RECT 7.000 0.115 41.310 116.765 ; |
| LAYER met3 ; |
| RECT 2.800 115.880 47.600 116.745 ; |
| RECT 2.400 114.560 47.600 115.880 ; |
| RECT 2.400 113.160 47.200 114.560 ; |
| RECT 2.400 109.120 47.600 113.160 ; |
| RECT 2.800 107.720 47.600 109.120 ; |
| RECT 2.400 100.960 47.600 107.720 ; |
| RECT 2.800 99.560 47.200 100.960 ; |
| RECT 2.400 92.120 47.600 99.560 ; |
| RECT 2.800 90.720 47.600 92.120 ; |
| RECT 2.400 86.680 47.600 90.720 ; |
| RECT 2.400 85.280 47.200 86.680 ; |
| RECT 2.400 83.960 47.600 85.280 ; |
| RECT 2.800 82.560 47.600 83.960 ; |
| RECT 2.400 75.800 47.600 82.560 ; |
| RECT 2.800 74.400 47.600 75.800 ; |
| RECT 2.400 73.080 47.600 74.400 ; |
| RECT 2.400 71.680 47.200 73.080 ; |
| RECT 2.400 67.640 47.600 71.680 ; |
| RECT 2.800 66.240 47.600 67.640 ; |
| RECT 2.400 58.800 47.600 66.240 ; |
| RECT 2.800 57.400 47.200 58.800 ; |
| RECT 2.400 50.640 47.600 57.400 ; |
| RECT 2.800 49.240 47.600 50.640 ; |
| RECT 2.400 45.200 47.600 49.240 ; |
| RECT 2.400 43.800 47.200 45.200 ; |
| RECT 2.400 42.480 47.600 43.800 ; |
| RECT 2.800 41.080 47.600 42.480 ; |
| RECT 2.400 34.320 47.600 41.080 ; |
| RECT 2.800 32.920 47.600 34.320 ; |
| RECT 2.400 30.920 47.600 32.920 ; |
| RECT 2.400 29.520 47.200 30.920 ; |
| RECT 2.400 25.480 47.600 29.520 ; |
| RECT 2.800 24.080 47.600 25.480 ; |
| RECT 2.400 17.320 47.600 24.080 ; |
| RECT 2.800 15.920 47.200 17.320 ; |
| RECT 2.400 9.160 47.600 15.920 ; |
| RECT 2.800 7.760 47.600 9.160 ; |
| RECT 2.400 3.720 47.600 7.760 ; |
| RECT 2.400 2.320 47.200 3.720 ; |
| RECT 2.400 1.000 47.600 2.320 ; |
| RECT 2.800 0.135 47.600 1.000 ; |
| LAYER met4 ; |
| RECT 11.210 6.520 38.785 107.640 ; |
| LAYER met5 ; |
| RECT 5.520 43.335 44.160 93.350 ; |
| END |
| END gpio_control_block |
| END LIBRARY |
| |