| `default_nettype wire |
| module gpio_control_block (mgmt_gpio_in, |
| mgmt_gpio_oeb, |
| mgmt_gpio_out, |
| one, |
| pad_gpio_ana_en, |
| pad_gpio_ana_pol, |
| pad_gpio_ana_sel, |
| pad_gpio_holdover, |
| pad_gpio_ib_mode_sel, |
| pad_gpio_in, |
| pad_gpio_inenb, |
| pad_gpio_out, |
| pad_gpio_outenb, |
| pad_gpio_slow_sel, |
| pad_gpio_vtrip_sel, |
| resetn, |
| serial_clock, |
| serial_data_in, |
| serial_data_out, |
| user_gpio_in, |
| user_gpio_oeb, |
| user_gpio_out, |
| zero, |
| vccd, |
| vssd, |
| vccd1, |
| vssd1, |
| pad_gpio_dm); |
| output mgmt_gpio_in; |
| input mgmt_gpio_oeb; |
| input mgmt_gpio_out; |
| output one; |
| output pad_gpio_ana_en; |
| output pad_gpio_ana_pol; |
| output pad_gpio_ana_sel; |
| output pad_gpio_holdover; |
| output pad_gpio_ib_mode_sel; |
| input pad_gpio_in; |
| output pad_gpio_inenb; |
| output pad_gpio_out; |
| output pad_gpio_outenb; |
| output pad_gpio_slow_sel; |
| output pad_gpio_vtrip_sel; |
| input resetn; |
| input serial_clock; |
| input serial_data_in; |
| output serial_data_out; |
| output user_gpio_in; |
| input user_gpio_oeb; |
| input user_gpio_out; |
| output zero; |
| input vccd; |
| input vccd1; |
| input vssd1; |
| input vssd; |
| output [2:0] pad_gpio_dm; |
| |
| sky130_fd_sc_hd__or2_4 _041_ (.A(clknet_1_1_0_serial_clock), |
| .B(resetn), |
| .X(_027_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _042_ (.A(_027_), |
| .X(_028_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _043_ (.A(_028_), |
| .X(_025_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _044_ (.A(_025_), |
| .X(_024_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _045_ (.A(_025_), |
| .X(_023_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _046_ (.A(_025_), |
| .X(_022_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _047_ (.A(_025_), |
| .X(_021_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _048_ (.A(_028_), |
| .X(_029_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _049_ (.A(_029_), |
| .X(_020_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _050_ (.A(_029_), |
| .X(_019_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _051_ (.A(_029_), |
| .X(_018_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _052_ (.A(_029_), |
| .X(_017_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _053_ (.A(_029_), |
| .X(_016_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _054_ (.A(_028_), |
| .X(_030_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _055_ (.A(_030_), |
| .X(_015_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _056_ (.A(_030_), |
| .X(_014_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _057_ (.A(_030_), |
| .X(_013_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _058_ (.A(_030_), |
| .X(_012_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _059_ (.A(_030_), |
| .X(_011_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _060_ (.A(_028_), |
| .X(_031_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _061_ (.A(_031_), |
| .X(_010_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _062_ (.A(_031_), |
| .X(_009_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _063_ (.A(_031_), |
| .X(_008_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _064_ (.A(_031_), |
| .X(_007_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _065_ (.A(_031_), |
| .X(_006_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _066_ (.A(_027_), |
| .X(_032_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _067_ (.A(_032_), |
| .X(_005_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _068_ (.A(_032_), |
| .X(_004_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _069_ (.A(_032_), |
| .X(_003_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _070_ (.A(_032_), |
| .X(_002_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _071_ (.A(_032_), |
| .X(_001_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__inv_2 _072_ (.A(gpio_outenb), |
| .Y(_033_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__or2_4 _073_ (.A(_033_), |
| .B(pad_gpio_inenb), |
| .X(_040_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__inv_2 _074_ (.A(mgmt_ena), |
| .Y(_034_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__a32o_4 _075_ (.A1(gpio_outenb), |
| .A2(mgmt_gpio_oeb), |
| .A3(mgmt_ena), |
| .B1(user_gpio_oeb), |
| .B2(_034_), |
| .X(pad_gpio_outenb), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__inv_2 _076_ (.A(pad_gpio_dm[2]), |
| .Y(_035_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__and3_4 _077_ (.A(mgmt_gpio_oeb), |
| .B(_035_), |
| .C(pad_gpio_dm[1]), |
| .X(_036_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__or2_4 _078_ (.A(mgmt_gpio_out), |
| .B(_036_), |
| .X(_037_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__nand2_4 _079_ (.A(pad_gpio_dm[0]), |
| .B(_036_), |
| .Y(_038_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__a32o_4 _080_ (.A1(mgmt_ena), |
| .A2(_037_), |
| .A3(_038_), |
| .B1(_034_), |
| .B2(user_gpio_out), |
| .X(pad_gpio_out), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__inv_2 _081_ (.A(pad_gpio_in), |
| .Y(_000_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__inv_2 _082_ (.A(resetn), |
| .Y(_039_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__and2_4 _083_ (.A(clknet_1_1_0_serial_clock), |
| .B(_039_), |
| .X(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__buf_2 _084_ (.A(_028_), |
| .X(_026_), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__ebufn_2 _085_ (.A(pad_gpio_in), |
| .TE_B(_040_), |
| .Z(mgmt_gpio_in), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfstp_4 _086_ (.D(\shift_register[0] ), |
| .Q(mgmt_ena), |
| .SET_B(_001_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _087_ (.D(\shift_register[2] ), |
| .Q(pad_gpio_holdover), |
| .RESET_B(_002_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _088_ (.D(\shift_register[8] ), |
| .Q(pad_gpio_slow_sel), |
| .RESET_B(_003_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _089_ (.D(\shift_register[9] ), |
| .Q(pad_gpio_vtrip_sel), |
| .RESET_B(_004_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _090_ (.D(\shift_register[3] ), |
| .Q(pad_gpio_inenb), |
| .RESET_B(_005_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _091_ (.D(\shift_register[4] ), |
| .Q(pad_gpio_ib_mode_sel), |
| .RESET_B(_006_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfstp_4 _092_ (.D(\shift_register[1] ), |
| .Q(gpio_outenb), |
| .SET_B(_007_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _093_ (.D(\shift_register[10] ), |
| .Q(pad_gpio_dm[0]), |
| .RESET_B(_008_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfstp_4 _094_ (.D(\shift_register[11] ), |
| .Q(pad_gpio_dm[1]), |
| .SET_B(_009_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfstp_4 _095_ (.D(serial_data_out), |
| .Q(pad_gpio_dm[2]), |
| .SET_B(_010_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _096_ (.D(\shift_register[5] ), |
| .Q(pad_gpio_ana_en), |
| .RESET_B(_011_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _097_ (.D(\shift_register[6] ), |
| .Q(pad_gpio_ana_sel), |
| .RESET_B(_012_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _098_ (.D(\shift_register[7] ), |
| .Q(pad_gpio_ana_pol), |
| .RESET_B(_013_), |
| .CLK(load_data), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _099_ (.D(serial_data_in), |
| .Q(\shift_register[0] ), |
| .RESET_B(_014_), |
| .CLK(clknet_1_1_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _100_ (.D(\shift_register[0] ), |
| .Q(\shift_register[1] ), |
| .RESET_B(_015_), |
| .CLK(clknet_1_1_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _101_ (.D(\shift_register[1] ), |
| .Q(\shift_register[2] ), |
| .RESET_B(_016_), |
| .CLK(clknet_1_1_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _102_ (.D(\shift_register[2] ), |
| .Q(\shift_register[3] ), |
| .RESET_B(_017_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _103_ (.D(\shift_register[3] ), |
| .Q(\shift_register[4] ), |
| .RESET_B(_018_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _104_ (.D(\shift_register[4] ), |
| .Q(\shift_register[5] ), |
| .RESET_B(_019_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _105_ (.D(\shift_register[5] ), |
| .Q(\shift_register[6] ), |
| .RESET_B(_020_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _106_ (.D(\shift_register[6] ), |
| .Q(\shift_register[7] ), |
| .RESET_B(_021_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _107_ (.D(\shift_register[7] ), |
| .Q(\shift_register[8] ), |
| .RESET_B(_022_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _108_ (.D(\shift_register[8] ), |
| .Q(\shift_register[9] ), |
| .RESET_B(_023_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _109_ (.D(\shift_register[9] ), |
| .Q(\shift_register[10] ), |
| .RESET_B(_024_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _110_ (.D(\shift_register[10] ), |
| .Q(\shift_register[11] ), |
| .RESET_B(_025_), |
| .CLK(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__dfrtp_4 _111_ (.D(\shift_register[11] ), |
| .Q(serial_data_out), |
| .RESET_B(_026_), |
| .CLK(clknet_1_1_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__conb_1 const_source (.HI(one), |
| .LO(zero), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__einvp_8 gpio_in_buf (.A(_000_), |
| .TE(gpio_logic1), |
| .Z(user_gpio_in), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__conb_1 gpio_logic_high (.HI(gpio_logic1), |
| .VGND(vssd1), |
| .VNB(vssd1), |
| .VPB(vccd1), |
| .VPWR(vccd1)); |
| sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_6 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_7 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_8 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_9 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_10 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_11 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_12 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_13 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_14 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_15 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_16 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_17 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_18 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_19 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_20 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_21 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_22 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_23 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_24 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_25 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_26 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_27 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_28 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_29 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_30 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_31 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_32 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 PHY_33 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_34 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_35 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_36 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_37 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_38 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_39 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_40 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_41 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_42 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_43 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_44 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_45 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_46 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_47 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_48 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_49 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_50 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_51 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_52 (.VGND(vssd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__clkbuf_16 clkbuf_0_serial_clock (.A(serial_clock), |
| .X(clknet_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__clkbuf_1 clkbuf_1_0_0_serial_clock (.A(clknet_0_serial_clock), |
| .X(clknet_1_0_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__clkbuf_1 clkbuf_1_1_0_serial_clock (.A(clknet_0_serial_clock), |
| .X(clknet_1_1_0_serial_clock), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__diode_2 ANTENNA_0 (.DIODE(mgmt_gpio_out), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__diode_2 ANTENNA_1 (.DIODE(serial_data_in), |
| .VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_12 FILLER_0_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_8 FILLER_0_15 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_0_23 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_0_29 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_6 FILLER_0_32 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_0_38 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_0_63 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_4 FILLER_1_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_1_7 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_1_36 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_1_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 FILLER_2_15 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_2_41 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_2_50 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_2_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_3_30 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_4_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_4_40 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_4_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_5_30 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_5_32 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 FILLER_5_37 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_6_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_6_59 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_6_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_7_30 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_7_36 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_8_50 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_8_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_9_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_9_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_10_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_11_30 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_11_32 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_12_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_12_57 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_12_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_6 FILLER_13_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_13_9 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_13_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_14_57 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_14_62 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_3 FILLER_15_3 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_15_32 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_12 FILLER_16_6 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_2 FILLER_16_18 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__decap_4 FILLER_16_32 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_16_36 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__fill_1 FILLER_16_63 (.VGND(vssd), |
| .VNB(vssd), |
| .VPB(vccd), |
| .VPWR(vccd)); |
| sky130_fd_sc_hd__tapvpwrvgnd_1 gpio_logic_high_tap ( |
| .VGND(vssd1), |
| .VPWR(vccd1)); |
| assign vssd1 = vssd; |
| endmodule |
