| shalan | fd13eb5 | 2020-08-21 16:48:07 +0200 | [diff] [blame] | 1 | .section .text |
| 2 | |
| 3 | start: |
| 4 | |
| 5 | # zero-initialize register file |
| 6 | addi x1, zero, 0 |
| 7 | # x2 (sp) is initialized by reset |
| 8 | addi x3, zero, 0 |
| 9 | addi x4, zero, 0 |
| 10 | addi x5, zero, 0 |
| 11 | addi x6, zero, 0 |
| 12 | addi x7, zero, 0 |
| 13 | addi x8, zero, 0 |
| 14 | addi x9, zero, 0 |
| 15 | addi x10, zero, 0 |
| 16 | addi x11, zero, 0 |
| 17 | addi x12, zero, 0 |
| 18 | addi x13, zero, 0 |
| 19 | addi x14, zero, 0 |
| 20 | addi x15, zero, 0 |
| 21 | addi x16, zero, 0 |
| 22 | addi x17, zero, 0 |
| 23 | addi x18, zero, 0 |
| 24 | addi x19, zero, 0 |
| 25 | addi x20, zero, 0 |
| 26 | addi x21, zero, 0 |
| 27 | addi x22, zero, 0 |
| 28 | addi x23, zero, 0 |
| 29 | addi x24, zero, 0 |
| 30 | addi x25, zero, 0 |
| 31 | addi x26, zero, 0 |
| 32 | addi x27, zero, 0 |
| 33 | addi x28, zero, 0 |
| 34 | addi x29, zero, 0 |
| 35 | addi x30, zero, 0 |
| 36 | addi x31, zero, 0 |
| 37 | |
| 38 | # zero initialize scratchpad memory |
| 39 | # setmemloop: |
| 40 | # sw zero, 0(x1) |
| 41 | # addi x1, x1, 4 |
| 42 | # blt x1, sp, setmemloop |
| 43 | |
| 44 | # copy data section |
| 45 | la a0, _sidata |
| 46 | la a1, _sdata |
| 47 | la a2, _edata |
| 48 | bge a1, a2, end_init_data |
| 49 | loop_init_data: |
| 50 | lw a3, 0(a0) |
| 51 | sw a3, 0(a1) |
| 52 | addi a0, a0, 4 |
| 53 | addi a1, a1, 4 |
| 54 | blt a1, a2, loop_init_data |
| 55 | end_init_data: |
| 56 | |
| 57 | # zero-init bss section |
| 58 | la a0, _sbss |
| 59 | la a1, _ebss |
| 60 | bge a0, a1, end_init_bss |
| 61 | loop_init_bss: |
| 62 | sw zero, 0(a0) |
| 63 | addi a0, a0, 4 |
| 64 | blt a0, a1, loop_init_bss |
| 65 | end_init_bss: |
| 66 | |
| 67 | # call main |
| 68 | call main |
| 69 | loop: |
| 70 | j loop |
| 71 | |
| 72 | .global flashio_worker_begin |
| 73 | .global flashio_worker_end |
| 74 | |
| 75 | .balign 4 |
| 76 | |
| 77 | flashio_worker_begin: |
| 78 | # a0 ... data pointer |
| 79 | # a1 ... data length |
| 80 | # a2 ... optional WREN cmd (0 = disable) |
| 81 | |
| 82 | # address of SPI ctrl reg |
| 83 | li t0, 0x28000000 |
| 84 | |
| 85 | # Set CS high, IO0 is output |
| 86 | li t1, 0x120 |
| 87 | sh t1, 0(t0) |
| 88 | |
| 89 | # Enable Manual SPI Ctrl |
| 90 | sb zero, 3(t0) |
| 91 | |
| 92 | # Send optional WREN cmd |
| 93 | beqz a2, flashio_worker_L1 |
| 94 | li t5, 8 |
| 95 | andi t2, a2, 0xff |
| 96 | flashio_worker_L4: |
| 97 | srli t4, t2, 7 |
| 98 | sb t4, 0(t0) |
| 99 | ori t4, t4, 0x10 |
| 100 | sb t4, 0(t0) |
| 101 | slli t2, t2, 1 |
| 102 | andi t2, t2, 0xff |
| 103 | addi t5, t5, -1 |
| 104 | bnez t5, flashio_worker_L4 |
| 105 | sb t1, 0(t0) |
| 106 | |
| 107 | # SPI transfer |
| 108 | flashio_worker_L1: |
| 109 | |
| 110 | # If byte count is zero, we're done |
| 111 | beqz a1, flashio_worker_L3 |
| 112 | |
| 113 | # Set t5 to count down 32 bits |
| 114 | li t5, 32 |
| 115 | # Load t2 from address a0 (4 bytes) |
| 116 | lw t2, 0(a0) |
| 117 | |
| 118 | flashio_worker_LY: |
| 119 | # Set t6 to count down 8 bits |
| 120 | li t6, 8 |
| 121 | |
| 122 | flashio_worker_L2: |
| 123 | # Clock out the bit (msb first) on IO0 and read bit in from IO1 |
| 124 | srli t4, t2, 31 |
| 125 | sb t4, 0(t0) |
| 126 | ori t4, t4, 0x10 |
| 127 | sb t4, 0(t0) |
| 128 | lbu t4, 0(t0) |
| 129 | andi t4, t4, 2 |
| 130 | srli t4, t4, 1 |
| 131 | slli t2, t2, 1 |
| 132 | or t2, t2, t4 |
| 133 | |
| 134 | # Decrement 32 bit count |
| 135 | addi t5, t5, -1 |
| 136 | bnez t5, flashio_worker_LX |
| 137 | |
| 138 | sw t2, 0(a0) |
| 139 | addi a0, a0, 4 |
| 140 | lw t2, 0(a0) |
| 141 | |
| 142 | flashio_worker_LX: |
| 143 | addi t6, t6, -1 |
| 144 | bnez t6, flashio_worker_L2 |
| 145 | addi a1, a1, -1 |
| 146 | bnez a1, flashio_worker_LY |
| 147 | |
| 148 | beqz t5, flashio_worker_L3 |
| 149 | sw t2, 0(a0) |
| 150 | |
| 151 | flashio_worker_L3: |
| 152 | # Back to MEMIO mode |
| 153 | li t1, 0x80 |
| 154 | sb t1, 3(t0) |
| 155 | |
| 156 | ret |
| 157 | .balign 4 |
| 158 | flashio_worker_end: |
| 159 | |
