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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-007 / ca2f318bb428801e0739cc341d80def2d8c70559 / . / verilog / rtl / pads.v
blob: 472f6ec9ab108d072b34a03f678f6e61e733c8b9 [file] [log] [blame]
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]1`ifndef TOP_ROUTING
2 `define ABUTMENT_PINS \
3 .amuxbus_a(analog_a),\
4 .amuxbus_b(analog_b),\
5 .vssa(vss),\
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]6 .vdda(vdd3v3),\
7 .vswitch(vdd3v3),\
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]8 .vddio_q(vddio_q),\
9 .vcchib(vdd1v8),\
Tim Edwards61bfc1f2020-10-03 11:51:17 -0400[diff] [blame]10 .vddio(vdd3v3),\
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]11 .vccd(vdd1v8),\
12 .vssio(vss),\
13 .vssd(vss),\
14 .vssio_q(vssio_q),
15`else
16 `define ABUTMENT_PINS
17`endif
18
19`define INPUT_PAD(X,Y) \
20 wire loop_``X; \
21 s8iom0_gpiov2_pad X``_pad ( \
22 `ABUTMENT_PINS \
23 `ifndef TOP_ROUTING \
24 .pad(X), \
25 `endif \
26 .out(vss), \
27 .oe_n(vdd1v8), \
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]28 .hld_h_n(vdd3v3), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]29 .enable_h(porb_h), \
30 .enable_inp_h(loop_``X), \
31 .enable_vdda_h(porb_h), \
32 .enable_vswitch_h(vss), \
33 .enable_vddio(vdd1v8), \
34 .inp_dis(por), \
35 .ib_mode_sel(vss), \
36 .vtrip_sel(vss), \
37 .slow(vss), \
38 .hld_ovr(vss), \
39 .analog_en(vss), \
40 .analog_sel(vss), \
41 .analog_pol(vss), \
42 .dm({vss, vss, vdd1v8}), \
43 .pad_a_noesd_h(), \
44 .pad_a_esd_0_h(), \
45 .pad_a_esd_1_h(), \
46 .in(Y), \
47 .in_h(), \
48 .tie_hi_esd(), \
49 .tie_lo_esd(loop_``X) )
50
51`define INPUT_PAD_ANALOG(X,SEL,POL) \
52 wire loop_``X; \
53 s8iom0_gpiov2_pad X``_pad ( \
54 `ABUTMENT_PINS \
55 `ifndef TOP_ROUTING \
56 .pad(X), \
57 `endif \
58 .out(vss), \
59 .oe_n(vdd1v8), \
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]60 .hld_h_n(vdd3v3), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]61 .enable_h(porb_h), \
62 .enable_inp_h(loop_``X), \
63 .enable_vdda_h(porb_h), \
64 .enable_vswitch_h(vss), \
65 .enable_vddio(vdd1v8), \
66 .inp_dis(vdd1v8), \
67 .ib_mode_sel(vss), \
68 .vtrip_sel(vss), \
69 .slow(vss), \
70 .hld_ovr(vss), \
71 .analog_en(vdd1v8), \
72 .analog_sel(SEL), \
73 .analog_pol(POL), \
74 .dm({vss, vss, vss}), \
75 .pad_a_noesd_h(), \
76 .pad_a_esd_0_h(), \
77 .pad_a_esd_1_h(), \
78 .in(), \
79 .in_h(), \
80 .tie_hi_esd(), \
81 .tie_lo_esd() )
82
83`define INPUT_PAD_V(X,Y,V) \
84 wire [V-1:0] loop_``X; \
85 s8iom0_gpiov2_pad X``_pad [V-1:0] ( \
86 `ABUTMENT_PINS \
87 `ifndef TOP_ROUTING \
88 .pad(X),\
89 `endif \
90 .out(), \
91 .oe_n(vdd1v8), \
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]92 .hld_h_n(vdd3v3), \
93 .enable_h(vdd3v3), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]94 .enable_inp_h(loop_``X), \
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]95 .enable_vdda_h(vdd3v3), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]96 .enable_vswitch_h(vss), \
97 .enable_vddio(vdd1v8), \
98 .inp_dis(por), \
99 .ib_mode_sel(vss), \
100 .vtrip_sel(vss), \
101 .slow(vss), \
102 .hld_ovr(vss), \
103 .analog_en(vss), \
104 .analog_sel(vss), \
105 .analog_pol(vss), \
106 .dm({vss, vss, vdd1v8}), \
107 .pad_a_noesd_h(), \
108 .pad_a_esd_0_h(), \
109 .pad_a_esd_1_h(), \
110 .in(Y), \
111 .in_h(), \
112 .tie_hi_esd(), \
113 .tie_lo_esd(loop_``X) )
114
115`define OUTPUT_PAD(X,Y,INP_DIS,OUT_EN_N) \
116 wire loop_``X; \
117 s8iom0_gpiov2_pad X``_pad ( \
118 `ABUTMENT_PINS \
119 `ifndef TOP_ROUTING \
120 .pad(X), \
121 `endif \
122 .out(Y), \
123 .oe_n(OUT_EN_N), \
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]124 .hld_h_n(vdd3v3), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]125 .enable_h(porb_h), \
126 .enable_inp_h(loop_``X), \
127 .enable_vdda_h(porb_h), \
128 .enable_vswitch_h(vss), \
129 .enable_vddio(vdd1v8), \
130 .inp_dis(INP_DIS), \
131 .ib_mode_sel(vss), \
132 .vtrip_sel(vss), \
133 .slow(vss), \
134 .hld_ovr(vss), \
135 .analog_en(vss), \
136 .analog_sel(vss), \
137 .analog_pol(vss), \
138 .dm({vdd1v8, vdd1v8, vss}), \
139 .pad_a_noesd_h(), \
140 .pad_a_esd_0_h(), \
141 .pad_a_esd_1_h(), \
142 .in(), \
143 .in_h(), \
144 .tie_hi_esd(), \
145 .tie_lo_esd(loop_``X))
146
147`define INOUT_PAD_V(X,Y,Y_OUT,V,INP_DIS,OUT_EN_N,MODE) \
148 wire [V-1:0] loop_``X; \
149 s8iom0_gpiov2_pad X``_pad [V-1:0] ( \
150 `ABUTMENT_PINS \
151 `ifndef TOP_ROUTING \
152 .pad(X),\
153 `endif \
154 .out(Y_OUT), \
155 .oe_n(OUT_EN_N), \
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]156 .hld_h_n(vdd3v3), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]157 .enable_h(porb_h), \
158 .enable_inp_h(loop_``X), \
159 .enable_vdda_h(porb_h), \
160 .enable_vswitch_h(vss), \
161 .enable_vddio(vdd1v8), \
162 .inp_dis(INP_DIS), \
163 .ib_mode_sel(vss), \
164 .vtrip_sel(vss), \
165 .slow(vss), \
166 .hld_ovr(vss), \
167 .analog_en(vss), \
168 .analog_sel(vss), \
169 .analog_pol(vss), \
170 .dm(MODE), \
171 .pad_a_noesd_h(), \
172 .pad_a_esd_0_h(), \
173 .pad_a_esd_1_h(), \
174 .in(Y), \
175 .in_h(), \
176 .tie_hi_esd(), \
177 .tie_lo_esd(loop_``X) )
178
179`define INOUT_PAD(X,Y,Y_OUT,INP_DIS,OUT_EN_N,MODE) \
180 s8iom0_gpiov2_pad X``_pad ( \
181 `ABUTMENT_PINS \
182 `ifndef TOP_ROUTING \
183 .pad(X),\
184 `endif \
185 .out(Y_OUT), \
186 .oe_n(OUT_EN_N), \
Tim Edwardsef8312e2020-09-22 17:20:06 -0400[diff] [blame]187 .hld_h_n(vdd3v3), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]188 .enable_h(porb_h), \
189 .enable_inp_h(loop_``X), \
190 .enable_vdda_h(porb_h), \
191 .enable_vswitch_h(vss), \
192 .enable_vddio(vdd1v8), \
193 .inp_dis(INP_DIS), \
194 .ib_mode_sel(vss), \
195 .vtrip_sel(vss), \
196 .slow(vss), \
197 .hld_ovr(vss), \
198 .analog_en(vss), \
199 .analog_sel(vss), \
200 .analog_pol(vss), \
201 .dm(MODE), \
202 .pad_a_noesd_h(), \
203 .pad_a_esd_0_h(), \
204 .pad_a_esd_1_h(), \
205 .in(Y), \
206 .in_h(), \
207 .tie_hi_esd(), \
208 .tie_lo_esd(loop_``X) )
209
Tim Edwards04ba17f2020-10-02 22:27:50 -0400[diff] [blame]210`define MPRJ_IO_PAD_V(X,Y,Y_OUT,V,OUT_EN_N,HLD_N, ENH, INP_DIS, MODE_SEL, VTRIP_SEL, SLOW_SEL, HOLD_SEL, AN_EN, AN_SEL, AN_POL, MODE) \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]211 wire [V-1:0] loop_``X; \
212 s8iom0_gpiov2_pad X``_pad [V-1:0] ( \
213 `ABUTMENT_PINS \
214 `ifndef TOP_ROUTING \
215 .pad(X),\
216 `endif \
217 .out(Y_OUT), \
218 .oe_n(OUT_EN_N), \
219 .hld_h_n(HLD_N), \
220 .enable_h(ENH), \
221 .enable_inp_h(loop_``X), \
222 .enable_vdda_h(porb_h), \
223 .enable_vswitch_h(vss), \
224 .enable_vddio(vdd1v8), \
225 .inp_dis(INP_DIS), \
226 .ib_mode_sel(MODE_SEL), \
Tim Edwards04ba17f2020-10-02 22:27:50 -0400[diff] [blame]227 .vtrip_sel(VTRIP_SEL), \
228 .slow(SLOW_SEL), \
229 .hld_ovr(HOLD_SEL), \
shalan0d14e6e2020-08-31 16:50:48 +0200[diff] [blame]230 .analog_en(AN_EN), \
231 .analog_sel(AN_SEL), \
232 .analog_pol(AN_POL), \
233 .dm(MODE), \
234 .pad_a_noesd_h(), \
235 .pad_a_esd_0_h(), \
236 .pad_a_esd_1_h(), \
237 .in(Y), \
238 .in_h(), \
239 .tie_hi_esd(), \
240 .tie_lo_esd(loop_``X) )