Created a new test program

verilog/dv/caravel/user_proj_example/ibtida/ibtida_test.c

diff --git a/verilog/dv/caravel/user_proj_example/ibtida/ibtida_test.c b/verilog/dv/caravel/user_proj_example/ibtida/ibtida_test.c
index 738c6cf..12395e3 100644
--- a/verilog/dv/caravel/user_proj_example/ibtida/ibtida_test.c
+++ b/verilog/dv/caravel/user_proj_example/ibtida/ibtida_test.c
@@ -10,7 +10,6 @@
   reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_NOPULL;
   // reg_mprj_io_6 = GPIO_MODE_USER_STD_OUTPUT;
   // reg_mprj_io_7 = GPIO_MODE_USER_STD_OUTPUT;
-  reg_mprj_io_36 = GPIO_MODE_USER_STD_OUTPUT;
   reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT;
 
   reg_mprj_xfer = 1;
@@ -24,11 +23,6 @@
   reg_la0_data = 0x00000000;
   reg_mprj_datah = 0x20;
   reg_mprj_datah = 0x0;
-  reg_mprj_io_37 = GPIO_MODE_USER_STD_OUTPUT;
-
-  reg_mprj_xfer = 1;
-  while(reg_mprj_xfer == 1);
-
   
 
 }
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