1. d0dcdcf Add a conb cell in gpio_control_block by Ahmed Ghazy · 4 years, 1 month ago
  2. 442825e Refactor mgmt_protect.v into separate islands by Ahmed Ghazy · 4 years, 1 month ago
  3. 6c766a8 [LICENSE] Copyright -> SPDX-FileCopyrightText: by agorararmard · 4 years, 1 month ago
  4. c752431 Added more macros under GL by manarabdelaty · 4 years, 1 month ago
  5. 589a528 RTL updates to fix gl sim by manarabdelaty · 4 years, 1 month ago
  6. 31c3465 First pruned version of the repo (~470MB w/o .git) by Ahmed Ghazy · 4 years, 1 month ago
  7. 65065c6 Correct path of sky130_ef_io__gpiov2_pad_wrapped.v by Ahmed Ghazy · 4 years, 1 month ago
  8. a115bdd Added GL simulations by manarabdelaty · 4 years, 1 month ago
  9. 1d1679d Wrap lsbufhv2lv to eliminate li1 pins at the top by Ahmed Ghazy · 4 years, 1 month ago
  10. 14645b9 Merge branch 'develop' into new_wrapper by ax3ghazy · 4 years, 1 month ago
  11. 886f48b Merge pull request #9 from ax3ghazy/develop-fork by ax3ghazy · 4 years, 1 month ago
  12. fe9c3bb Add two more missing USE_POWER_PINS guards by Ahmed Ghazy · 4 years, 1 month ago
  13. 27200e9 Add more missing USE_POWER_PINS by Ahmed Ghazy · 4 years, 1 month ago
  14. df4dd88 Minor RTL fixes, switching to wrapped GPIOV2 by Ahmed Ghazy · 4 years, 1 month ago
  15. bc03551 Split the high voltage part of the mgmt_protect.v module into its own by Tim Edwards · 4 years, 1 month ago
  16. 43e5c60 Corrections to the management protection buffer block, and a couple of corrections by Tim Edwards · 4 years, 2 months ago
  17. 581068f Corrected the mess caused by introducing default_nettype none into the design by Tim Edwards · 4 years, 2 months ago
  18. 69663c7 Eliminate the two inverters at the top level by Ahmed Ghazy · 4 years, 2 months ago
  19. 08cd6eb add default nettype none by Matt Venn · 4 years, 2 months ago
  20. 61dce92 Renamed lvs guard to use_power_pins by Manar · 4 years, 2 months ago
  21. ffe6cad Updated storage area by Manar · 4 years, 2 months ago
  22. 68e0363 Added power pins to the custom memory cells by Manar · 4 years, 2 months ago
  23. 2517fa8 Add USE_CUSTOM_DFFRAM guard by Ahmed Ghazy · 4 years, 2 months ago
  24. 55ec369 Connected storage area to mgmt_core by Manar · 4 years, 2 months ago
  25. 22d29d6 Add a global defines.v and rely less on parameters by Ahmed Ghazy · 4 years, 2 months ago
  26. ba32890 Revised the mprj_ctrl to treat the power control as a single bit by Tim Edwards · 4 years, 2 months ago
  27. 496a08a Corrected an issue with the JTAG and SDO pins that prevented them from by Tim Edwards · 4 years, 2 months ago
  28. 14d35ac Added synthesized memory (4kb) by Manar · 4 years, 3 months ago
  29. 05ad4fc Added two additional signals for monitoring the user areas 1 and 2 by Tim Edwards · 4 years, 3 months ago
  30. 2a62066 Merge pull request #19 from Manarabdelaty/rm_xbar by R. Timothy Edwards · 4 years, 3 months ago
  31. 32d0542 Added two additional features: (1) Timer chaining, which allows one by Tim Edwards · 4 years, 3 months ago
  32. 98a7adc Removed cross bar switch port from mgmt core by Manar · 4 years, 3 months ago
  33. b6dd152 Updated testbenches to declare 38 bits for the user project GPIO pins. by Tim Edwards · 4 years, 3 months ago
  34. 6d9739d Removed references to "Mega-Project" and replaced them with "User Project". by Tim Edwards · 4 years, 3 months ago
  35. b86fc84 (1) Added a wrapper interface between the top level verilog and the user project by Tim Edwards · 4 years, 3 months ago
  36. 21a9aac Testbench simulations are now all working correctly with the pre-release by Tim Edwards · 4 years, 3 months ago
  37. e2ef673 Additional corrections to the pads and connections for sky130_fd_io. by Tim Edwards · 4 years, 3 months ago
  38. 4c73335 Modified I/O references to match the sky130_fd_io release. Mostly by Tim Edwards · 4 years, 3 months ago
  39. 7a8cbb1 Added a secondary clock output, going to the user area, that is derived by Tim Edwards · 4 years, 3 months ago
  40. 53d9218 Added additional protection for all the signals output to the user by Tim Edwards · 4 years, 3 months ago
  41. ef2b68d Made a few testbench corrections and added the missing OEB lines from the by Tim Edwards · 4 years, 3 months ago
  42. 4286ae1 Made a change to all of the testbench Makefiles to define PDK_PATH as the by Tim Edwards · 4 years, 3 months ago
  43. 3245e2f Revised the clocking scheme in several ways: (1) Removed the output by Tim Edwards · 4 years, 3 months ago
  44. 9eda80d Split the main power supply into managment and two user areas. Mostly by Tim Edwards · 4 years, 3 months ago
  45. 0553751 Most testbenches are working again now. Renamed "mprj_counter" to "user_proj_example" by Tim Edwards · 4 years, 3 months ago
  46. ca2f318 Various corrections to simplify the user project I/O wiring by Tim Edwards · 4 years, 3 months ago
  47. f51dd08 Added a simple power-on-reset circuit with schmitt trigger output, and by Tim Edwards · 4 years, 3 months ago
  48. 89f0924 Made corrections; GPIO testbench now passes. by Tim Edwards · 4 years, 3 months ago
  49. 251e0df Serial chain loading of the I/O configurations is now working. by Tim Edwards · 4 years, 3 months ago
  50. 44bab47 In spite of many errors that still need fixing, this is a major advance by Tim Edwards · 4 years, 3 months ago
  51. c18c474 Fixed the syntactical loose ends from yesterday. There are by Tim Edwards · 4 years, 3 months ago
  52. 04ba17f Vast and substantial changes: Removed the old GPIO control with the new one by Tim Edwards · 4 years, 3 months ago
  53. c5265b8 Corrected some things from the initial pass of removing unused GPIO by Tim Edwards · 4 years, 3 months ago
  54. ef8312e Caravel 2nd phase (branch phase2): First pass at removing the analog by Tim Edwards · 4 years, 3 months ago
  55. fd13eb5 initial commit by shalan · 4 years, 5 months ago
  56. cd64af5 Started adding RTL for the Caravel project by Tim Edwards · 4 years, 5 months ago