| commit | e87be5a9d74865972a29d1efb2a27a6401ab2db9 | [log] [tgz] |
|---|---|---|
| author | Bryce-Readyhough <brycereadyhough@gmail.com> | Mon Dec 14 16:05:05 2020 -0800 |
| committer | Bryce-Readyhough <brycereadyhough@gmail.com> | Mon Dec 14 16:05:05 2020 -0800 |
| tree | 8bd62c200e5cece8d708ffbabf4457bd0ea9749c | |
| parent | aabc889a51052a7d0ca8227fe062eb7d89d9118e [diff] | |
| parent | fb2f115e179a5f302f8f68c7a5cf91454085d7b0 [diff] |
Merge branch 'main' of https://github.com/Bryce-Readyhough/caravel_UNCC_MPW_1 into main
diff --git a/verilog/gl/user_project_wrapper.v b/verilog/gl/user_project_wrapper.v index 0bb022d..2ee3b1f 100644 --- a/verilog/gl/user_project_wrapper.v +++ b/verilog/gl/user_project_wrapper.v
@@ -6,6 +6,7 @@ input io_in[36:0]; inout vssa1; inout vdda1; + inout vdda2; inout analog_io[30:0]; 10good 10good_0();